公开(公告)号：US5665421A

公开(公告)日：1997-09-09

申请号：US725941

申请日：1996-10-08

Applicant: David L. Bergeron ,  John M. Macaulay ,  Roger W. Barton ,  Jeffrey D. Morse

Inventor： David L. Bergeron ,  John M. Macaulay ,  Roger W. Barton ,  Jeffrey D. Morse

IPC: H01J3/02 ,  H01J9/02 ,  B05D5/12

CPC classification number: B82Y10/00 ,  H01J3/022 ,  H01J9/025 ,  H01J2201/30403 ,  H01J2201/319

Abstract: A method is provided for creating gated filament structures for a field emission display. A multi-layer structure is provided that includes a substrate, an insulating layer, a metal gate layer positioned on a top surface of the insulating layer and a gate encapsulation layer positioned on a top surface of the metal gate layer. A plurality of gates are provided and define a plurality of apertures on the top of the insulating layer. A plurality of spacers are formed in the apertures at their edges on the top surface of the insulating layer. The spacers are used as masks for etching the insulating layer and form a plurality of pores in the insulating layer. The pores are plated with a filament material to create a plurality of filaments. The pores can be overplated to create the plurality of filaments. The filaments are vertically self-aligned in the pores.

Abstract translation: 提供了一种用于产生用于场致发射显示器的门控灯丝结构的方法。 提供了一种多层结构，其包括基板，绝缘层，位于绝缘层的顶表面上的金属栅极层和位于金属栅极层顶表面上的栅极封装层。 提供多个栅极并且在绝缘层的顶部上限定多个孔。 在绝缘层的顶表面上的边缘处的孔中形成多个间隔物。 间隔物用作蚀刻绝缘层并在绝缘层中形成多个孔的掩模。 用细丝材料电镀细孔以产生多根长丝。 孔可以被过度铺展以产生多根细丝。 细丝在孔中垂直自对准。

公开(公告)号：US5647785A

公开(公告)日：1997-07-15

申请号：US527520

申请日：1995-09-13

Applicant: Gary Wayne Jones ,  Ching-Tzong Sune

Inventor： Gary Wayne Jones ,  Ching-Tzong Sune

IPC: H01J1/304 ,  H01J9/02 ,  H01J29/04 ,  H01J29/87 ,  H01J31/12 ,  H01J1/30

CPC classification number: H01J3/021 ,  H01J1/3042 ,  H01J9/025 ,  H01J2201/319

Abstract: A vertical microelectronic field emitter is formed by first forming tips on the face of a substrate and then forming trenches in the substrate around the tips to form columns in the substrate, with the tips lying on top of the columns. The trenches are filled with a dielectric and a conductor layer is formed on the dielectric. Alternatively, trenches may be formed in the face of the substrate with the trenches defining columns in the substrate. Then, tips are formed on top of the columns. The trenches are filled with dielectric and the conductor layer is formed on the dielectric to form the extraction electrodes.

Abstract translation: 通过在衬底的表面上首先形成尖端然后在衬底周围形成尖端的沟槽以在衬底中形成柱，其中尖端位于柱的顶部上，形成垂直微电子场发射器。 沟槽填充有电介质，并且在电介质上形成导体层。 或者，可以在衬底的表面形成沟槽，其中沟槽限定在衬底中的列。 然后，尖端形成在列的顶部。 沟槽用电介质填充，并且导体层形成在电介质上以形成提取电极。

公开(公告)号：US5642017A

公开(公告)日：1997-06-24

申请号：US284762

申请日：1994-08-02

Applicant: Glen E. Hush

Inventor： Glen E. Hush

IPC: G09G3/20 ,  G09G3/22 ,  H01J17/36 ,  H05B41/36

CPC classification number: B82Y10/00 ,  G09G3/22 ,  G09G2300/0809 ,  G09G2310/0248 ,  G09G2310/0259 ,  G09G2320/0606 ,  G09G2320/0626 ,  G09G2320/066 ,  G09G3/2011 ,  G09G3/2014 ,  H01J2201/319

Abstract: This invention is a space-efficient pixel control circuit for a field emission flat panel matrix-addressable array display. The invention reduces by one the number of transistors required at the intersection of each row line and column line within the array. In addition, only two lines need be routed through the array (i.e., row and column). The array space saved by increased layout efficiency may be used to increase pixel density within the array. The new space-efficient pixel control circuit has a single transistor in a base electrode grounding path that is directly controlled by a row line. A current-limiting resistor is interposed between the single grounding transistor and a column line to which an inverse video signal is applied. The magnitude of the current through the current-limiting resistor is inversely proportional to the inverse column signal voltage. Thus, pixel brightness is directly proportional to the voltage drop across the current-limiting resistor.

Abstract translation: 本发明是用于场发射平板矩阵寻址阵列显示器的节省空间的像素控制电路。 本发明将阵列内的每行行和列线的交叉点所需的晶体管数减少一个。 另外，只有两条线需要通过阵列（即行和列）路由。 通过增加布局效率节省的阵列空间可用于增加阵列内的像素密度。 新的节省空间的像素控制电路在基极电极接地路径中具有由行线直接控制的单个晶体管。 在单个接地晶体管和施加反向视频信号的列线之间插入限流电阻。 通过限流电阻的电流的大小与反向列信号电压成反比。 因此，像素亮度与限流电阻两端的压降成正比。

公开(公告)号：US5628659A

公开(公告)日：1997-05-13

申请号：US427464

申请日：1995-04-24

Applicant: Chenggang Xie ,  Nalin Kumar ,  Howard K. Schmidt

Inventor： Chenggang Xie ,  Nalin Kumar ,  Howard K. Schmidt

IPC: H01J9/02 ,  H01J1/30 ,  H01J9/42

CPC classification number: H01J9/025 ,  H01J2201/30426 ,  H01J2201/30457 ,  H01J2201/319

Abstract: A system and method is available for fabricating a field emitter device, where in an emitter material, such as copper, is deposited over a resistive layer which has been deposited upon a substrate. Two ion beam sources are utilized. The first ion beam source is directed at a target material, such as molybdenum, for sputtering molybdenum onto the emitter material. The second ion beam source is utilized to etch the emitter material to produce cones or micro-tips. A low work function material, such as amorphous diamond, is then deposited over the micro-tips.

Abstract translation: 一种系统和方法可用于制造场致发射器件，其中发射极材料（例如铜）沉积在已沉积在衬底上的电阻层上。 使用两个离子束源。 第一离子束源指向诸如钼的靶材料，用于将钼溅射到发射极材料上。 第二离子束源用于蚀刻发射体材料以产生锥体或微尖端。 然后将诸如无定形金刚石的低功函数材料沉积在微尖端上。

公开(公告)号：US5616991A

公开(公告)日：1997-04-01

申请号：US530562

申请日：1995-09-19

Applicant: Stephen L. Casper ,  Glen E. Hush ,  Thomas W. Voshell

Inventor： Stephen L. Casper ,  Glen E. Hush ,  Thomas W. Voshell

IPC: G09G3/00 ,  G09G3/20 ,  G09G3/22 ,  H01J31/12 ,  H05B33/12 ,  H05B41/36 ,  H05B41/392

CPC classification number: G09G3/006 ,  G09G3/22 ,  H01J31/127 ,  G09G2300/0809 ,  G09G2310/0248 ,  G09G2310/0259 ,  G09G2320/0606 ,  G09G2320/0626 ,  G09G2320/066 ,  G09G3/2011 ,  G09G3/2014 ,  H01J2201/319 ,  Y10S315/07

Abstract: This invention is directed to an improvement of a field emission display architecture in which low-voltage row and column address signals control a much higher pixel activation voltage. Instead of using a pair of series-coupled transistors in the emitter node grounding path as in the original architecture (one of which is gated by a column signal and the other of which is gated by a row signal), only a single transistor is utilized in the emitter node grounding path, thus eliminating an intermediate node between the two transistors that was responsible for unwanted emissions under certain operating conditions. In a preferred embodiment of the invention, a current regulating resistor is placed in the grounding path in series with the primary grounding transistor, with the resistor being directly coupled to ground. Additionally, for the preferred embodiment of the invention, the gate of the grounding transistor is coupled via a second field-effect transistor to either a row signal or a column signal. In the case where the gate of the first transistor is coupled to a row signal, the gate of the second transistor is coupled to a column signal. Likewise, where the gate of the first transistor is coupled to a column signal, the gate of the second transistor is coupled to a row signal. Numerous other equivalent circuits are possible, and several examples of such equivalent circuits are depicted in this disclosure.

Abstract translation: 本发明涉及一种场致发射显示结构的改进，其中低电压行和列地址信号控制高得多的像素激活电压。 不像原始架构（其中之一由列信号门控，另一个由行信号门控）在发射极节点接地路径中使用一对串联耦合晶体管，而是仅使用单个晶体管 在发射极节点接地路径中，从而消除了在某些工作条件下负责无用发射的两个晶体管之间的中间节点。 在本发明的优选实施例中，电流调节电阻器被放置在与主接地晶体管串联的接地路径中，电阻器直接耦合到地。 此外，对于本发明的优选实施例，接地晶体管的栅极经由第二场效应晶体管耦合到行信号或列信号。 在第一晶体管的栅极耦合到行信号的情况下，第二晶体管的栅极耦合到列信号。 类似地，在第一晶体管的栅极耦合到列信号的情况下，第二晶体管的栅极耦合到行信号。 许多其他等效电路是可能的，并且在本公开中描述了这些等效电路的几个示例。

公开(公告)号：US5608283A

公开(公告)日：1997-03-04

申请号：US269283

申请日：1994-06-29

Applicant: Jonathan C. Twichell ,  George R. Brandes ,  Michael W. Geis ,  John M. Macaulay ,  Robert M. Duboc, Jr. ,  Christopher J. Curtin

Inventor： Jonathan C. Twichell ,  George R. Brandes ,  Michael W. Geis ,  John M. Macaulay ,  Robert M. Duboc, Jr. ,  Christopher J. Curtin

IPC: H01J1/304 ,  H01J9/02 ,  H01J1/30

CPC classification number: H01J1/3042 ,  H01J9/025 ,  H01J2201/30403 ,  H01J2201/30457 ,  H01J2201/319 ,  Y10T428/24124 ,  Y10T428/24198

Abstract: In one electron-emitting device, non-insulating particle bonding material (24) securely bonds electron-emissive carbon-containing particles (22) to an underlying non-insulating region (12). The carbon in each carbon-containing particle is in the form of diamond, graphite, amorphous carbon, or/and silicon carbide. In another electron-emitting device, electron-emissive pillars (22/28) overlie a non-insulating region (12). Each pillar is formed with an electron-emissive particle (22) and an underlying non-insulating pedestal (28).

Abstract translation: 在一个电子发射器件中，非绝缘粒子接合材料（24）将电子发射含碳颗粒（22）牢固地粘合到下面的非绝缘区域（12）上。 每个含碳颗粒中的碳为金刚石，石墨，无定形碳或/和碳化硅的形式。 在另一个电子发射器件中，电子发射柱（22/28）覆盖在非绝缘区（12）上。 每个柱形成有电子发射颗粒（22）和下面的非绝缘基座（28）。

公开(公告)号：US5601466A

公开(公告)日：1997-02-11

申请号：US424833

申请日：1995-04-19

Applicant: Chi-Cheong Shen ,  Lester L. Hodson

Inventor： Chi-Cheong Shen ,  Lester L. Hodson

IPC: H01J9/02

CPC classification number: H01J9/025 ,  H01J2201/319

Abstract: Methods of fabricating an emitter plate 10 having titanium tungsten (Ti:W) and aluminum (Al) used in a sublayering arrangement as the metallization material for the gate electrodes 60, cathode electrodes 20, bond pads 80 and 130, lead interconnects 100, 101, 120 and 121, and integrated circuit (IC) mount pads 90 and 91. In a disclosed embodiment, titanium tungsten and aluminum sublayers are combined with niobium to provide the metallization material.

Abstract translation: 在子层布置中制造具有钛钨（Ti：W）和铝（Al）的发射极板10的方法，用作栅电极60，阴极20，接合焊盘80和130的金属化材料，引线互连100,101 ，120和121以及集成电路（IC）安装焊盘90和91.在所公开的实施例中，钛钨和铝子层与铌组合以提供金属化材料。

公开(公告)号：US5591352A

公开(公告)日：1997-01-07

申请号：US429730

申请日：1995-04-27

Applicant: Chao-Chi Peng

Inventor： Chao-Chi Peng

IPC: H01J9/02 ,  B44C1/22

CPC classification number: H01J9/025 ,  H01J1/304 ,  H01J31/127 ,  H01J2201/319 ,  H01J2329/0494

Abstract: The object of the present invention is to provide a cold cathode field emission display whose resolution is not limited by the provision of individual ballast resistors for each pixel or by the wiring system used to deliver voltage to the cold cathodes. This has been achieved by providing additional layers beneath the cold cathodes arrays so that said resistors and voltage delivery systems are located directly below the cold cathode arrays instead of alongside of them. Six different embodiments of the invention are described.

Abstract translation: 本发明的目的是提供一种冷阴极场致发射显示器，其分辨率不受每个像素提供单个镇流电阻器的限制，或者通过用于向冷阴极传送电压的布线系统来限制。 这已经通过在冷阴极阵列之下提供附加层来实现，使得所述电阻器和电压输送系统位于冷阴极阵列的正下方而不是它们旁边。 描述本发明的六个不同实施例。

公开(公告)号：US5585301A

公开(公告)日：1996-12-17

申请号：US502388

申请日：1995-07-14

Applicant: John K. Lee ,  David A. Cathey, Jr. ,  Kevin Tjaden

Inventor： John K. Lee ,  David A. Cathey, Jr. ,  Kevin Tjaden

IPC: H01J1/304 ,  H01J9/02 ,  H01J29/04 ,  H01J31/12 ,  H01L21/02 ,  H01L21/822 ,  H01L27/04 ,  H01L21/70

CPC classification number: H01L28/24 ,  H01J9/025 ,  H01L28/20 ,  H01J2201/319

Abstract: A method for forming resistors for regulating current in a field emission display comprises integrating a high resistance resistor into circuitry for the field emission display. The resistor is in electrical communication with emitter sites for the field emission display and with other circuit components such as ground. The high resistance resistor can be formed as a layer of a high resistivity material, such as intrinsic polycrystalline silicon, polycrystalline silicon doped with a conductivity-degrading dopant, lightly doped polysilicon, titanium oxynitride, tantalum oxynitride or a glass type material deposited on a baseplate of the field emission display. Contacts are formed in the high resistivity material to establish electrical communication between the resistor and the emitter sites and between the resistor and the other circuit components. The contacts can be formed as low resistance contacts (e.g., ohmic contacts) or as high resistance contacts (e.g., Schottky contacts).

Abstract translation: 用于形成用于调节场致发射显示器中的电流的电阻器的方法包括将高电阻电阻集成到用于场发射显示的电路中。 电阻器与发射器位置电气连通，用于场发射显示器和其他电路部件，例如接地。 高电阻电阻器可以形成为高电阻率材料的层，例如本征多晶硅，掺杂有导电性降解掺杂剂的多晶硅，轻掺杂多晶硅，氮氧化钛，氮氧化钽或沉积在基板上的玻璃类型材料 的场发射显示。 在高电阻率材料中形成触点，以在电阻器和发射极部位之间以及电阻器和其它电路部件之间建立电连通。 触点可以形成为低电阻触点（例如欧姆接触）或作为高电阻触点（例如肖特基触点）。

公开(公告)号：US5581159A

公开(公告)日：1996-12-03

申请号：US554853

申请日：1995-11-07

Applicant: John K. Lee ,  Eugene H. Cloud ,  David A. Cathey, Jr.

Inventor： John K. Lee ,  Eugene H. Cloud ,  David A. Cathey, Jr.

IPC: G09G3/00 ,  G09G3/20 ,  G09G3/22 ,  H01J31/12 ,  H05B41/36 ,  H01J17/36

CPC classification number: G09G3/006 ,  G09G3/22 ,  H01J31/127 ,  G09G2300/0809 ,  G09G2310/0248 ,  G09G3/2011 ,  G09G3/2014 ,  H01J2201/319 ,  Y10S315/07

Abstract: A circuit for regulating the pixel current in a field emission display so as to enhance pixel-to-pixel uniformity of pixel current. The pixel current flows through a pair of diodes connected back-to-back. A transistor circuit controls the voltage across the back-to-back diode pair, so that the voltage/current transfer characteristic of the diode pair determines the pixel current.

Abstract translation: 用于调节场发射显示器中的像素电流以增强像素电流的像素到像素均匀性的电路。 像素电流流过一对背对背连接的二极管。 晶体管电路控制背对背二极管对上的电压，使得二极管对的电压/电流传递特性确定像素电流。