公开(公告)号：US20110067083A1

公开(公告)日：2011-03-17

申请号：US12883575

申请日：2010-09-16

申请人： Pieter Vorenkamp ,  Klaas Bult ,  Frank Carr ,  Christopher M. Ward ,  Ralph Duncan ,  Tom W. Kwan ,  James Y.C. Chang ,  Haideh Khorramabadi

发明人： Pieter Vorenkamp ,  Klaas Bult ,  Frank Carr ,  Christopher M. Ward ,  Ralph Duncan ,  Tom W. Kwan ,  James Y.C. Chang ,  Haideh Khorramabadi

IPC分类号： H04N5/50 ,  H04N7/173

CPC分类号： H03D3/18 ,  H01F17/0006 ,  H01F17/0013 ,  H01F27/34 ,  H01F27/40 ,  H01F27/42 ,  H01F2017/0053 ,  H01F2021/125 ,  H01L23/5227 ,  H01L27/0248 ,  H01L27/0251 ,  H01L27/08 ,  H01L2924/0002 ,  H01L2924/3011 ,  H03B5/04 ,  H03B5/364 ,  H03D7/161 ,  H03D7/18 ,  H03F1/26 ,  H03F1/3211 ,  H03F3/195 ,  H03F3/45183 ,  H03F3/45188 ,  H03F3/68 ,  H03F3/72 ,  H03F2200/111 ,  H03F2200/294 ,  H03F2200/372 ,  H03F2200/447 ,  H03F2200/63 ,  H03F2203/45264 ,  H03F2203/45286 ,  H03G1/0023 ,  H03G1/0029 ,  H03G3/3052 ,  H03H7/25 ,  H03H11/04 ,  H03H11/1291 ,  H03H11/53 ,  H03H11/54 ,  H03H19/004 ,  H03J1/0075 ,  H03J3/04 ,  H03J3/08 ,  H03J3/185 ,  H03J2200/10 ,  H03L7/10 ,  H03L7/183 ,  H03L7/23 ,  H03L2207/06 ,  H01L2924/00

摘要： An integrated receiver with channel selection and image rejection substantially implemented on a single CMOS integrated circuit is described. A receiver front end provides programmable attenuation and a programmable gain low noise amplifier. Frequency conversion circuitry advantageously uses LC filters integrated onto the substrate in conjunction with image reject mixers to provide sufficient image frequency rejection. Filter tuning and inductor Q compensation over temperature are performed on chip. The filters utilize multi track spiral inductors. The filters are tuned using local oscillators to tune a substitute filter, and frequency scaling during filter component values to those of the filter being tuned. In conjunction with filtering, frequency planning provides additional image rejection. The advantageous choice of local oscillator signal generation methods on chip is by PLL out of band local oscillation and by direct synthesis for in band local oscillator. The VCOs in the PLLs are centered using a control circuit to center the tuning capacitance range. A differential crystal oscillator is advantageously used as a frequency reference. Differential signal transmission is advantageously used throughout the receiver.

摘要翻译： 描述了基本上在单个CMOS集成电路上实现的具有信道选择和图像抑制的集成接收机。 接收机前端提供可编程衰减和可编程增益低噪声放大器。 频率转换电路有利地使用集成到衬底上的LC滤波器与图像抑制混合器结合，以提供足够的图像频率抑制。 过滤器调谐和电感Q补偿温度在芯片上执行。 滤波器采用多轨螺旋电感。 使用本地振荡器调整滤波器以调整替代滤波器，以及滤波器组件值期间的频率缩放与被调谐的滤波器的频率缩放。 结合滤波，频率规划提供了额外的镜像抑制。 片上本地振荡器信号产生方法的有利选择是通过PLL带外本地振荡和通过频带本地振荡器的直接合成。 PLL中的VCO使用控制电路居中，使调谐电容范围居中。 差分晶体振荡器有利地用作频率参考。 差分信号传输有利地用于整个接收机。

公开(公告)号：US07902916B2

公开(公告)日：2011-03-08

申请号：US12254429

申请日：2008-10-20

申请人： Chan Yong Jeong

发明人： Chan Yong Jeong

IPC分类号： H03B1/00 ,  H03K5/00 ,  H04B1/10

CPC分类号： H03K3/0322 ,  H03F3/005 ,  H03H19/004 ,  H03K5/249 ,  H03K7/08 ,  H03M3/406

摘要： Provided is a switched capacitor resonator including at least one integrator circuit having a differential operational amplifier and a sub feedback circuit configured with a switched capacitor circuit. A main feedback circuit connecting main input and output terminals of the switched capacitor resonator to each other may be configured with the switched capacitor circuit. The main feedback circuit may be connected to the sub feedback circuit included in one of the integrator circuits. A capacitor of the main feedback circuit can serve as an integration capacitor connected between the input and output terminals of the differential operational amplifier. Consequently, it is possible to improve an operating speed by reducing a settling time constant of the integrator circuit.

摘要翻译： 提供一种开关电容谐振器，其包括至少一个具有差分运算放大器的积分器电路和配置有开关电容器电路的子反馈电路。 将开关电容谐振器的主输入和输出端彼此连接的主反馈电路可以配置有开关电容器电路。 主反馈电路可以连接到包括在积分器电路之一中的子反馈电路。 主反馈电路的电容器可以用作连接在差分运算放大器的输入和输出端之间的积分电容器。 因此，可以通过减小积分器电路的稳定时间常数来提高工作速度。

公开(公告)号：US07885620B2

公开(公告)日：2011-02-08

申请号：US12325821

申请日：2008-12-01

申请人： Alyosha Molnar ,  Rahul Magoon

发明人： Alyosha Molnar ,  Rahul Magoon

IPC分类号： H04B1/26 ,  H04B15/00

CPC分类号： H03D7/1441 ,  H03D7/1458 ,  H03D7/1466 ,  H03D7/1483 ,  H03D7/165 ,  H03D2200/0088 ,  H03H19/004 ,  H04B1/006 ,  H04B1/48

摘要： A receiver circuit comprising a quadrature passive mixer having an input and an output, and an input impedance of the quadrature passive mixer provides a band-pass response. One or more output impedances coupled to the output of the quadrature passive mixer. A low noise amplifier (LNA) having an input and an output coupled to the quadrature passive mixer, the LNA configured to provide substantially linear transconductance over a predetermined input range.

摘要翻译： 包括具有输入和输出的正交无源混频器和正交无源混频器的输入阻抗的接收机电路提供带通响应。 耦合到正交无源混频器的输出的一个或多个输出阻抗。 具有耦合到所述正交无源混频器的输入和输出的低噪声放大器（LNA），所述LNA被配置为在预定输入范围上提供基本上线性的跨导。

公开(公告)号：US20100321105A1

公开(公告)日：2010-12-23

申请号：US12487965

申请日：2009-06-19

申请人： Hernan D. Romero

发明人： Hernan D. Romero

IPC分类号： H03K5/00

CPC分类号： H03H19/004

摘要： A switched capacitor notch filter for sampling an input signal using multiple sampling capacitors and multiple non-overlapping time periods. The charge from the sampling capacitors is averaged and transferred to the filter output during another non-overlapping time period.

摘要翻译： 开关电容器陷波滤波器，用于使用多个采样电容器和多个非重叠时间段对输入信号进行采样。 来自采样电容器的电荷被平均，并在另一非重叠时间段期间传送到滤波器输出。

公开(公告)号：US20100267354A1

公开(公告)日：2010-10-21

申请号：US12470789

申请日：2009-05-22

申请人： Ahmad Mirzaei ,  Hooman Darabi ,  John Leete

发明人： Ahmad Mirzaei ,  Hooman Darabi ,  John Leete

IPC分类号： H04B1/10

CPC分类号： H04B1/30 ,  H03D7/1458 ,  H03D7/1466 ,  H03H19/004

摘要： Embodiments of a frequency translated filter (FTF) are presented. An FTF includes a passive mixer and a baseband impedance. The baseband impedance includes a network of one or more passive components (e.g., resistors, inductors, and capacitors) that form a low-Q filter. The passive mixer is configured to translate the baseband impedance to a higher frequency. The translated baseband impedance forms a high-Q filter and is presented at the input of the FTF. The FTF can be fully integrated in CMOS IC technology (or others, e.g., Bipolar, BiCMOS, and SiGe) and applied in wireless receiver systems including GSM, Wideband Code Division Multiple Access (WCDMA), Bluetooth, and wireless LANs (e.g., IEEE 802.11).

摘要翻译： 提出了频率转换滤波器（FTF）的实施例。 FTF包括无源混频器和基带阻抗。 基带阻抗包括形成低Q滤波器的一个或多个无源组件（例如，电阻器，电感器和电容器）的网络。 无源混频器被配置为将基带阻抗转换到更高的频率。 转换的基带阻抗形成高Q滤波器，并在FTF的输入端呈现。 FTF可以完全集成在CMOS IC技术（或其他，例如双极，BiCMOS和SiGe）中，并且应用于包括GSM，宽带码分多址（WCDMA），蓝牙和无线LAN（例如IEEE）的无线接收机系统中 802.11）。

公开(公告)号：US07808412B2

公开(公告)日：2010-10-05

申请号：US12389916

申请日：2009-02-20

申请人： Akihiro Fukuzawa ,  Satoru Ito ,  Nobuyuki Imai

发明人： Akihiro Fukuzawa ,  Satoru Ito ,  Nobuyuki Imai

IPC分类号： H03M1/00

CPC分类号： H03G5/24 ,  H03H19/004

摘要： An integrated circuit device includes an amplifier circuit that receives an input signal and performs an offset adjustment corresponding to a DC offset of the input signal and a gain adjustment corresponding to an amplitude of the input signal, a filter that is provided in a subsequent stage of the amplifier circuit, a cut-off frequency of the filter being variably set corresponding to a frequency band of the input signal, an A/D converter that is provided in a subsequent stage of the filter and performs an A/D conversion process on a signal amplified by the amplifier circuit, and a control circuit that sets an offset adjustment of the amplifier circuit, a gain adjustment of the amplifier circuit, and the cut-off frequency of the filter.

摘要翻译： 集成电路装置包括：放大器电路，其接收输入信号并执行与输入信号的DC偏移相对应的偏移调整和对应于输入信号的幅度的增益调整;滤波器，其被设置在 所述放大器电路，对应于所述输入信号的频带可变地设置所述滤波器的截止频率; A / D转换器，其设置在所述滤波器的后续级中，并对所述滤波器进行A / D转换处理 由放大器电路放大的信号，以及设置放大器电路的偏移调整，放大器电路的增益调整和滤波器的截止频率的控制电路。

公开(公告)号：US20100198898A1

公开(公告)日：2010-08-05

申请号：US12366363

申请日：2009-02-05

申请人： Chengzhi Pan ,  Joseph P. Burke

发明人： Chengzhi Pan ,  Joseph P. Burke

IPC分类号： G06F17/17 ,  G06F17/10

CPC分类号： H03H17/0248 ,  H03H15/023 ,  H03H19/004 ,  H03H2007/0192

摘要： Passive switched-capacitor (PSC) filters are described herein. In one design, a PSC filter implements a second-order infinite impulse response (IIR) filter with two complex first-order IIR sections. Each complex first-order IIR section includes three sets of capacitors. A first set of capacitors receives a real input signal and an imaginary delayed signal, stores and shares electrical charges, and provides a real filtered signal. A second set of capacitors receives an imaginary input signal and a real delayed signal, stores and shares electrical charges, and provides an imaginary filtered signal. A third set of capacitors receives the real and imaginary filtered signals, stores and shares electrical charges, and provides the real and imaginary delayed signals. In another design, a PSC filter implements a finite impulse response (FIR) section and an IIR section for a complex first-order IIR section. The IIR section includes multiple complex filter sections operating in an interleaved manner.

摘要翻译： 本文描述了无源开关电容器（PSC）滤波器。 在一个设计中，PSC滤波器实现具有两个复杂的一阶IIR部分的二阶无限脉冲响应（IIR）滤波器。 每个复杂的一阶IIR部分包括三组电容器。 第一组电容器接收实际输入信号和虚拟延迟信号，存储和共享电荷，并提供实际滤波信号。 第二组电容器接收虚拟输入信号和实际延迟信号，存储和共享电荷，并提供虚数滤波信号。 第三组电容器接收实际和虚拟滤波信号，存储和共享电荷，并提供实时和虚拟延迟信号。 在另一种设计中，PSC滤波器实现复杂一阶IIR部分的有限脉冲响应（FIR）部分和IIR部分。 IIR部分包括以交错方式操作的多个复杂滤波器部分。

公开(公告)号：US07729676B2

公开(公告)日：2010-06-01

申请号：US11698162

申请日：2007-01-26

申请人： Klaas Bult ,  Ramon A. Gomez

发明人： Klaas Bult ,  Ramon A. Gomez

IPC分类号： H04B1/06 ,  H04Q7/20

CPC分类号： H03D3/18 ,  H01F17/0006 ,  H01F17/0013 ,  H01F27/34 ,  H01F27/40 ,  H01F27/42 ,  H01F2017/0053 ,  H01F2021/125 ,  H01L23/5227 ,  H01L27/0248 ,  H01L27/0251 ,  H01L27/08 ,  H01L2924/0002 ,  H01L2924/3011 ,  H03B5/04 ,  H03B5/364 ,  H03D7/161 ,  H03D7/18 ,  H03F1/26 ,  H03F1/3211 ,  H03F3/195 ,  H03F3/45183 ,  H03F3/45188 ,  H03F3/68 ,  H03F3/72 ,  H03F2200/111 ,  H03F2200/294 ,  H03F2200/372 ,  H03F2200/447 ,  H03F2200/63 ,  H03F2203/45264 ,  H03F2203/45286 ,  H03G1/0023 ,  H03G1/0029 ,  H03G3/3052 ,  H03H7/25 ,  H03H11/04 ,  H03H11/1291 ,  H03H11/53 ,  H03H11/54 ,  H03H19/004 ,  H03J1/0075 ,  H03J3/04 ,  H03J3/08 ,  H03J3/185 ,  H03J2200/10 ,  H03L7/10 ,  H03L7/183 ,  H03L7/23 ,  H03L2207/06 ,  H01L2924/00

摘要： An integrated receiver with channel selection and image rejection substantially implemented on a single CMOS integrated circuit is described. A receiver front end provides programmable attenuation and a programmable gain low noise amplifier. Frequency conversion circuitry advantageously uses LC filters integrated onto the substrate in conjunction with image reject mixers to provide sufficient image frequency rejection. Filter tuning and inductor Q compensation over temperature are performed on chip. The filters utilize multi track spiral inductors. The filters are tuned using local oscillators to tune a substitute filter, and frequency scaling during filter component values to those of the filter being tuned. In conjunction with filtering, frequency planning provides additional image rejection. The advantageous choice of local oscillator signal generation methods on chip is by PLL out of band local oscillation and by direct synthesis for in band local oscillator. The VCOs in the PLLs are centered using a control circuit to center the tuning capacitance range. A differential crystal oscillator is advantageously used as a frequency reference. Differential signal transmission is advantageously used throughout the receiver.

摘要翻译： 描述了基本上在单个CMOS集成电路上实现的具有信道选择和图像抑制的集成接收机。 接收机前端提供可编程衰减和可编程增益低噪声放大器。 频率转换电路有利地使用集成到衬底上的LC滤波器与图像抑制混合器结合，以提供足够的图像频率抑制。 过滤器调谐和电感Q补偿温度在芯片上执行。 滤波器采用多轨螺旋电感。 使用本地振荡器调整滤波器以调整替代滤波器，以及滤波器组件值期间的频率缩放与被调谐的滤波器的频率缩放。 结合滤波，频率规划提供了额外的镜像抑制。 片上本地振荡器信号产生方法的有利选择是通过PLL带外本地振荡和通过频带本地振荡器的直接合成。 PLL中的VCO使用控制电路居中，使调谐电容范围居中。 差分晶体振荡器有利地用作频率参考。 差分信号传输有利地用于整个接收机。

公开(公告)号：US20100105349A1

公开(公告)日：2010-04-29

申请号：US12309253

申请日：2007-07-09

申请人： Xuecheng Qian

发明人： Xuecheng Qian

IPC分类号： H04B1/26

CPC分类号： H03D3/006 ,  H03H19/004 ,  H04B1/0003 ,  H04B1/0007 ,  H04B1/406

摘要： The invention relates to an RF signal sampling apparatus for a wireless receiver, comprising a first transconductor circuit (Gmi), for converting received RF voltage signals into current signals, a first HR filter, for down-sampling and filtering the current signals, and an FIR filter, for further filtering, down-sampling and outputting the signals which are outputted by the first HR filter.

摘要翻译： 本发明涉及一种用于无线接收机的RF信号采样装置，包括用于将接收的RF电压信号转换为电流信号的第一跨导电路（Gmi），用于对当前信号进行下采样和滤波的第一HR滤波器，以及 FIR滤波器，用于进一步滤波，下采样和输出由第一HR滤波器输出的信号。

公开(公告)号：US20100066465A1

公开(公告)日：2010-03-18

申请号：US12388502

申请日：2009-02-18

申请人： Ming-Feng Huang

发明人： Ming-Feng Huang

IPC分类号： H03H7/00

CPC分类号： H03H19/004

摘要： A down conversion filter with a plurality of sampling capacitor, wherein at least one sampling capacitor is discharged in sampling phases or charge-summing phases of the other sampling capacitors.

摘要翻译： 具有多个采样电容器的下变频滤波器，其中至少一个采样电容器在其它采样电容器的采样相位或电荷求和相位中放电。