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公开(公告)号:US20210033646A1
公开(公告)日:2021-02-04
申请号:US16527636
申请日:2019-07-31
发明人: Wade Bussing , Alexander Latham
摘要: A current sensor can include a lead frame. The lead frame can include a first lead and a second lead, wherein the first and second leads are coupled together at a first junction region of the lead frame, wherein the current sensor is operable to sense a magnetic field generated by a first current passing through the first junction region. The current sensor can further include a first die disposed proximate to the lead frame. The first die can include a first magnetic field sensing element disposed on a surface of the first die, a first circuit coupled to the first magnetic field sensing element for generating a first signal indicative of a first current, and a first node coupled to the first signal. The current sensor can further include a second die disposed proximate to the lead frame. The second die can include a second magnetic field sensing element disposed on a surface of the second die, a second circuit coupled to the second magnetic field sensing element for generating a second signal indicative of the first current passing through the first junction region or indicative of a second current passing through the lead frame and a second node coupled to the second signal.
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公开(公告)号:US10892400B2
公开(公告)日:2021-01-12
申请号:US16512503
申请日:2019-07-16
发明人: Eun-sun Noh , Ju-hyun Kim , Joon-myoung Lee , Woo-chang Lim
IPC分类号: H01L43/04 , H01L27/22 , H01L43/06 , H01L43/10 , G11C11/16 , H01F10/32 , H01F41/30 , G11C11/18 , H01L43/14
摘要: A magnetic memory device includes a buffer layer on a substrate, a magnetic tunnel junction structure including a fixed layer structure, a tunnel barrier, and a free layer that are sequentially arranged on the buffer layer, and a spin-orbit torque (SOT) structure on the magnetic tunnel junction structure and including a topological insulator material, wherein the free layer includes a Heusler material.
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公开(公告)号:US10891999B1
公开(公告)日:2021-01-12
申请号:US16458651
申请日:2019-07-01
发明人: Goran Mihajlovic , Michael Grobis
摘要: A MRAM memory cell comprises a SHE layer, a magnetic bit layer with perpendicular anisotropy and an Oersted layer. The magnetic bit layer has a switchable direction of magnetization in order to store data. Data is written to the MRAM memory cell using the Spin Hall Effect so that spin current generated in the SHE layer exerts a torque on the magnetic bit layer while the Oersted layer provides heat and an Oersted field to enable deterministic switching. Data is read form the MRAM memory cell using the Anomalous Hall Effect and sensing voltage at the Oersted layer.
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44.
公开(公告)号:US10833254B2
公开(公告)日:2020-11-10
申请号:US16431490
申请日:2019-06-04
发明人: Chando Park , Jimmy Jianan Kan , Peiyuan Wang , Seung Hyuk Kang
摘要: A perpendicular magnetic tunnel junction may include a free layer, a reference layer, and a barrier layer. The barrier layer may be arranged between the free layer and the reference layer. The barrier layer may include a first interface and a second interface. The first interface may face the free layer, and a second interface may face the reference layer. The first interface may not physically correlate with the second interface.
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公开(公告)号:US20200350490A1
公开(公告)日:2020-11-05
申请号:US16935631
申请日:2020-07-22
申请人: TDK CORPORATION
发明人: Yohei SHIOKAWA
摘要: A spin-orbit-torque type magnetoresistance effect element includes: a first ferromagnetic layer; a second ferromagnetic layer; a non-magnetic layer which is located between the first ferromagnetic layer and the second ferromagnetic layer; and a spin-orbit-torque wiring which has the first ferromagnetic layer laminated thereon, wherein the spin-orbit-torque wiring extends in a second direction intersecting a first direction corresponding to an orthogonal direction of the first ferromagnetic layer, wherein the first ferromagnetic layer includes a first laminated structure and an interface magnetic layer in order from the spin-orbit-torque wiring, wherein the first laminated structure is a structure in which a ferromagnetic conductor layer and an inorganic compound containing layer are disposed in order from the spin-orbit-torque wiring, wherein the ferromagnetic conductor layer contains a ferromagnetic metal element, and wherein the inorganic compound containing layer contains at least one inorganic compound selected from a group consisting of carbide, nitride, and sulfide.
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公开(公告)号:US10797233B2
公开(公告)日:2020-10-06
申请号:US15858765
申请日:2017-12-29
申请人: SPIN MEMORY, INC.
摘要: The various implementations described herein include methods, devices, and systems for fabricating magnetic memory devices. In one aspect, a method of fabricating a magnetic memory device includes: (1) providing a dielectric substrate with a metallic core protruding from the dielectric substrate, where: (a) a first portion of the metallic core is surrounded by the dielectric substrate and a second portion of the metallic core protrudes away from a surface of the dielectric substrate; and (b) the second portion includes: (i) a surface offset from the surface of the dielectric substrate and (ii) sidewalls extending away from the surface of the dielectric substrate to the offset surface; (2) depositing a first ferromagnetic layer on exposed surfaces of the metallic core and the dielectric substrate; (3) depositing a spacer layer on exposed surfaces of the first ferromagnetic layer; and (4) depositing a second ferromagnetic layer on exposed surfaces of the spacer layer.
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公开(公告)号:US10759276B2
公开(公告)日:2020-09-01
申请号:US16093741
申请日:2017-06-27
IPC分类号: B60K20/02 , G01B7/30 , G01R33/09 , G01R33/02 , G01D5/14 , H01L43/08 , H01L27/22 , G01D5/245 , H01L43/06
摘要: A magnetic sensor includes a magneto-resistive element, a Hall element, and a detection circuit that receives a signal from the magneto-resistive element and a signal from the Hall element input thereto. The detection circuit includes an output terminal and an interrupt generation unit. The output terminal outputs, to the outside as an output signal, a signal obtained by performing to the signal input from the magneto-resistive element, at least one processing selected from amplification, analog-to-digital conversion, offset correction, and temperature-characteristics correction. The interrupt generation unit outputs an interrupt signal when the signal input from the Hall element is larger than a predetermined threshold. The magnetic sensor is high accurate and highly reliable.
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公开(公告)号:US20200259073A1
公开(公告)日:2020-08-13
申请号:US16784950
申请日:2020-02-07
发明人: David Daughton , Patrick Gleeson , Bo-Kuai Lai , Daniel Hoy
摘要: A magnetic field magnetic field sensor and method of making the sensor. The sensor and method of making the sensor may comprise a material or structure that prevents the admission of light in certain wavelengths to enhance the stability of the magnetic field sensor over a period of time. The sensor and method of making the sensor may comprise an adsorption prevention layer which protects the semiconductor portion of the magnetic. The sensor may also comprise an insulating layer formed between semiconductor layers and a substrate layer.
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49.
公开(公告)号:US20200212294A1
公开(公告)日:2020-07-02
申请号:US16709965
申请日:2019-12-11
申请人: Academia Sinica
发明人: Hsin LIN , Shih-Yu WU , Chuang-Han HSU
摘要: An electrically controlled nanomagnet and a spin orbit torque magnetic random access memory (SOT-MRAM) including the same are provided. The electrically controlled nanomagnet includes: a first spin-Hall material layer including a first spin-Hall material; a second spin-Hall material layer including a second spin-Hall material; and a first magnetic layer disposed between the first spin-Hall material layer and the second spin-Hall material layer, wherein the first spin-Hall material and the second spin-Hall material are substantially mirror image to each other.
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公开(公告)号:US10685953B2
公开(公告)日:2020-06-16
申请号:US16037617
申请日:2018-07-17
发明人: Hyun Chul Kim , Hee Baeg An , In Chul Jung , Jung Hwan Lee , Kyung Ho Lee
IPC分类号: H01L29/78 , H01L29/08 , H01L29/66 , H01L21/762 , H01L31/113 , H01L27/02 , H01L27/092 , H01L27/22 , H01L21/8238 , H01L21/761 , H01L43/06
摘要: An integrated semiconductor device includes a first transistor and a second transistor formed on a semiconductor substrate, and an isolation structure located adjacent to the transistors, including deep trenches, trapping regions formed between the deep trenches, and trench bottom doping regions formed at the end of each of the deep trenches, wherein each of the trapping regions includes a buried layer, a well region formed on the buried layer, and a highly doped region formed on the well region.
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