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公开(公告)号:US20250089552A1
公开(公告)日:2025-03-13
申请号:US18944379
申请日:2024-11-12
Applicant: Samsung Electronics Co., Ltd. , SAMSUNG SDI CO., LTD.
Inventor: Myungsun SIM , Sunghun LEE , Yoonhyun KWAK , Jiwhan KIM , Jeoungin YI , Mitsunori ITO , Wataru SOTOYAMA , Kum Hee LEE , Byoungki CHOI , Sunghyun JUNG , Dalho HUH , Hyungsun KIM
IPC: H10K85/30 , C07F15/00 , C09K11/02 , C09K11/06 , H10K50/11 , H10K50/15 , H10K50/16 , H10K50/17 , H10K50/18 , H10K101/00 , H10K101/30
Abstract: Provided are a composition and an organic light-emitting device including the same, wherein the composition includes a platinum-containing organometallic compound, a first compound, a second compound, and a third compound.
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公开(公告)号:US20250089551A1
公开(公告)日:2025-03-13
申请号:US18824412
申请日:2024-09-04
Applicant: Samsung Electronics Co., Ltd.
Inventor: Hwang Suk Kim , Sangmo Kim , Minsik Min , Hyejin Bae , Yeon Sook Chung , Hyesung Choi , Joon Heo , Hosuk Kang , Jong Soo Kim , Joonghyuk Kim , Youngmok Son , Yeonkyung Lee , Daun Jeong , Kyeongsik Ju
Abstract: An organometallic compound represented by Formula 1: wherein M1 is a transition metal; Y1 to Y3 are each independently C or N; R4 is a substituted or unsubstituted C1-C60 alkyl group; ring CY2 to ring CY5 are each independently a C5-C60 carbocyclic group or a C1-C60 heterocyclic group; L1 is a single bond, O, S, Se, N(R61), B(R61), C(R61)(R62), or Si(R61)(R62); a1 is 1, 2, 3, 4, or 5; b10, b20, b30, b40, and b50 are each independently 1, 2, 3, 4, 5, 6, 7, 8, 9, or 10; and the remaining substituent groups of Formula 1 are as provided herein.
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公开(公告)号:US20250089394A1
公开(公告)日:2025-03-13
申请号:US18627797
申请日:2024-04-05
Applicant: Samsung Electronics Co., Ltd.
Inventor: Young Woo CHUNG , Soo Eon KIM , Yo Seph KIM , Chan Hyeon SEONG
IPC: H01L27/146
Abstract: An image sensor and a manufacturing method thereof are provided. The image sensor includes a substrate including first and second surfaces opposed to each other, a first pixel group in the substrate including a first to forth unit pixels adjacent to one another in a plan view, a photoelectric conversion area in the first to fourth unit pixels, a first isolation trench in the substrate surrounding the first pixel group, a second isolation trench in the substrate between the first unit pixel and the fourth unit pixel and between the second unit pixel and the third unit pixel, the second isolation trench in contact with the second surface of the substrate, and a first color filter on the second surface of the substrate covering the first pixel group.
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公开(公告)号:US20250089326A1
公开(公告)日:2025-03-13
申请号:US18960198
申请日:2024-11-26
Applicant: Samsung Electronics Co., Ltd.
Inventor: Sunkyu HWANG , Jongseob KIM
IPC: H01L29/40 , H01L29/20 , H01L29/66 , H01L29/778
Abstract: A method of manufacturing a power semiconductor device includes forming a channel separation pattern on a substrate; forming a passivation layer on the substrate and the channel separation pattern; forming a gate hole, a source hole, and a drain hole penetrating the passivation layer in a same process step; and simultaneously forming a gate electrode pattern, a source electrode pattern, and a drain electrode pattern. The gate electrode pattern may be formed on the channel separation pattern. A side surface of the gate electrode pattern and a side surface of the channel separation pattern may have a step difference.
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公开(公告)号:US20250089314A1
公开(公告)日:2025-03-13
申请号:US18588089
申请日:2024-02-27
Applicant: Samsung Electronics Co., Ltd.
Inventor: Donghoon HWANG , Hyojin KIM , Byungho MOON , Myungil KANG , Doyoung CHOI
IPC: H01L29/06 , H01L27/092 , H01L29/417 , H01L29/423 , H01L29/775 , H01L29/786
Abstract: A three-dimensional semiconductor device includes a first active region on a substrate, including a first active region on a substrate, including a lower channel pattern and lower source/drain patterns connected to the lower channel pattern, the lower channel pattern including a plurality of lower semiconductor patterns stacked and spaced apart from each other in a first direction that is perpendicular to an upper surface of the substrate, and the lower semiconductor patterns including a lowermost first semiconductor pattern, a second active region stacked on the first active region, including an upper channel pattern and an upper source/drain pattern connected to the upper channel pattern, a lower gate electrode on the lower channel pattern, and a lower insulating pattern under the first semiconductor pattern, the first semiconductor pattern spaced apart from the lower insulating pattern in the first direction. The lower gate electrode includes a first portion adjacent to a first sidewall of the lower insulating pattern and extending in the first direction from an upper surface to a bottom surface of the lower gate electrode, a second portion adjacent to a second sidewall of the lower insulating pattern and extending in the first direction from the upper surface to the bottom surface of the lower gate electrode, the second sidewall facing the first sidewall in a second direction which is perpendicular to the first direction, and a third portion in contact with a bottom surface of the lower insulating pattern and extending from the first portion to the second portion in the second direction.
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公开(公告)号:US20250089299A1
公开(公告)日:2025-03-13
申请号:US18960679
申请日:2024-11-26
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Junbeom Park , Sangsu Kim , Junggil Yang
IPC: H01L29/423 , H01L29/417
Abstract: A semiconductor device includes a first source/drain structure having a first length in a horizontal direction, as viewed in a planar cross-sectional view, the horizontal direction being perpendicular to a vertical direction, a second source/drain structure having a second length in the horizontal direction, as viewed in the planar cross-sectional view, the second length being less than the first length, channels extending between the first source/drain structure and the second source/drain structure, the channels being spaced apart from each other in the vertical direction, at least one sacrificial pattern between adjacent ones of the channels, and a trench penetrating the channels and the at least one sacrificial pattern.
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公开(公告)号:US20250089270A1
公开(公告)日:2025-03-13
申请号:US18540222
申请日:2023-12-14
Applicant: Samsung Electronics Co., Ltd.
Inventor: Kiyeon YANG , Haeryong KIM , Hajun SUNG , Changseung LEE
Abstract: Provided are a memory device, a manufacturing method thereof, and an electronic apparatus including the memory device. The memory device may include a plurality of first conductors arranged apart from each other and perpendicular to a substrate, a second conductor extending perpendicular to the substrate, a chalcogenide layer extending perpendicular to the substrate between the plurality of first conductors and the second conductor, and a plurality of first diffusion barrier layers selectively arranged only on the plurality of first conductors between the plurality of first conductors and the chalcogenide layer. The plurality of first diffusion barrier layers each may include a carbon-based material.
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公开(公告)号:US20250089261A1
公开(公告)日:2025-03-13
申请号:US18739636
申请日:2024-06-11
Applicant: Samsung Electronics Co., Ltd.
Inventor: Sea Hoon LEE , Jun Hee LIM , Jun Seok OH , Seong Pil CHANG
Abstract: A transistor that may provide improved durability and reliability is disclosed. The transistor includes a substrate including an active region, an element isolation film in the substrate that defines the active region, a first impurity region on a lower surface of the element isolation film, a second impurity region in the substrate, a gate electrode on the substrate and extending in a first direction, a source/drain area on at least one side of the gate electrode, a first source/drain contact group on the source/drain area, and a second source/drain contact group on the source/drain area and spaced apart from the first source/drain contact group in the first direction, wherein the second impurity region is between the first source/drain contact group and the second source/drain contact group.
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公开(公告)号:US20250089188A1
公开(公告)日:2025-03-13
申请号:US18810701
申请日:2024-08-21
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Wookjin LEE , Hyun JI
IPC: H05K5/02 , G06F1/18 , H01L25/075 , H05K5/00
Abstract: A display apparatus including a display module, a cabinet to support the display module, the cabinet including an opening, an adjustment part arrangeable in the display module such that while the adjustment part is arranged in the display module, the adjustment part is movable with respect to the cabinet, a support member, moveable within the cabinet, and configured to support the adjustment part such that the adjustment part is moveable while supported on the support member, a rotation member coupleable to the support member and while coupled to the support member, the rotation member is configured to be rotatable such that the support member, the adjustment part, and the display module are moved based on a rotation of the rotation member. The rotation member is accessible through the opening of the cabinet to allow the rotation of the rotation member while the display module is supported on the cabinet.
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公开(公告)号:US20250089166A1
公开(公告)日:2025-03-13
申请号:US18774603
申请日:2024-07-16
Applicant: Samsung Electronics Co., Ltd.
Inventor: Keonwoo KIM , Moonyoung KIM , Jinhyung LEE , Junyoung KO , Kangmoon SEO
Abstract: A hybrid printed circuit board includes: an insulating substrate; a printed circuit board disposed on an upper surface of the insulating substrate and including at least one through hole configured to accommodate a surface mount device; and an adhesive member comprising an adhesive material provided between the insulating substrate and the printed circuit board.
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