公开(公告)号：US20100240182A1

公开(公告)日：2010-09-23

申请号：US12791103

申请日：2010-06-01

申请人： James Kai ,  George Matamis ,  Tuan Duc Pham ,  Masaaki Higashitani ,  Takashi Orimoto

发明人： James Kai ,  George Matamis ,  Tuan Duc Pham ,  Masaaki Higashitani ,  Takashi Orimoto

IPC分类号： H01L21/336

CPC分类号： H01L27/115 ,  H01L27/11521 ,  H01L27/11524

摘要： High density semiconductor devices and methods of fabricating the same are provided. Spacer fabrication techniques are utilized to form circuit elements having reduced feature sizes, which in some instances are smaller than the smallest lithographically resolvable element size of the process being used. Spacers are formed that serve as a mask for etching one or more layers beneath the spacers. An etch stop pad layer having a material composition substantially similar to the spacer material is provided between a dielectric layer and an insulating sacrificial layer such as silicon nitride. When etching the sacrificial layer, the matched pad layer provides an etch stop to avoid damaging and reducing the size of the dielectric layer. The matched material compositions further provide improved adhesion for the spacers, thereby improving the rigidity and integrity of the spacers.

摘要翻译： 提供了高密度半导体器件及其制造方法。 利用间隔制造技术来形成具有减小的特征尺寸的电路元件，其在一些情况下小于正在使用的工艺的最小光刻可分辨元件尺寸。 形成隔板，其用作蚀刻间隔物下面的一个或多个层的掩模。 具有与间隔物材料基本相似的材料组成的蚀刻停止垫层设置在电介质层和诸如氮化硅的绝缘牺牲层之间。 当蚀刻牺牲层时，匹配的焊盘层提供蚀刻停止以避免损坏并减小电介质层的尺寸。 匹配的材料组合物还提供了用于间隔物的改进的粘合性，从而提高了间隔物的刚度和完整性。

公开(公告)号：US07800956B2

公开(公告)日：2010-09-21

申请号：US12163073

申请日：2008-06-27

申请人： Dana Lee ,  Deepanshu Dutta ,  Yingda Dong

发明人： Dana Lee ,  Deepanshu Dutta ,  Yingda Dong

IPC分类号： G11C11/34

CPC分类号： G11C11/5628 ,  G11C2211/5621

摘要： Programming time is reduced in a non-volatile memory in a multi-pass programming process. In a first programming pass, high state cells are programmed by a sequence of program pulses to identify fast and slow high state cells, while lower state cells are locked out from programming. Once identified, the fast high state cells are temporarily locked out from programming while the slow high state cells continue being programmed to their final intended state. Further, the program pulses are sharply stepped up to program the slow high state cells. In a second programming pass, the fast high state cells are programmed along with the other, lower state cells, until they all reach their respective intended states. A time savings is realized compared to approaches in which all high state cells are programmed in the first programming pass.

摘要翻译： 在多遍编程过程中，非易失性存储器中的编程时间会减少。 在第一编程通道中，高状态单元通过一系列编程脉冲进行编程，以识别快速和慢速的高状态单元，而较低状态单元被从编程中锁定。 一旦识别，快速高状态单元暂时被禁止编程，而缓慢的高状态单元继续被编程到其最终预期状态。 此外，编程脉冲急剧地升高以对慢速高状态单元进行编程。 在第二个编程过程中，快速高状态单元与其他较低状态单元一起编程，直到它们都达到各自的预期状态。 与在第一编程通路中编程所有高状态单元的方法相比，实现了时间节省。

公开(公告)号：US07795080B2

公开(公告)日：2010-09-14

申请号：US12014689

申请日：2008-01-15

申请人： Takashi Orimoto ,  George Matamis ,  James Kai ,  Tuan Pham ,  Masaaki Higashitani ,  Henry Chien

发明人： Takashi Orimoto ,  George Matamis ,  James Kai ,  Tuan Pham ,  Masaaki Higashitani ,  Henry Chien

IPC分类号： H01L21/82

CPC分类号： H01L27/115 ,  G11C16/0483 ,  H01L27/11521

摘要： Methods of fabricating integrated circuit devices are provided using composite spacer formation processes. A composite spacer structure is used to pattern and etch the layer stack when forming select features of the devices. A composite storage structure includes a first spacer formed from a first layer of spacer material and second and third spacers formed from a second layer of spacer material. The process is suitable for making devices with line and space sizes at less then the minimum resolvable feature size of the photolithographic processes being used. Moreover, equal line and space sizes at less than the minimum feature size are possible. In one embodiment, an array of dual control gate non-volatile flash memory storage elements is formed using composite spacer structures. When forming the active areas of the substrate, with overlying strips of a layer stack and isolation regions therebetween, a composite spacer structure facilitates equal lengths of the strips and isolation regions therebetween.

摘要翻译： 使用复合间隔物形成工艺提供制造集成电路器件的方法。 当形成设备的选择特征时，使用复合间隔物结构来图案化和蚀刻层堆叠。 复合存储结构包括由第一隔离物材料层形成的第一间隔物和由第二隔离物材料层形成的第二和第三间隔物。 该方法适用于制造具有小于所使用的光刻工艺的最小可分辨特征尺寸的线和空间尺寸的装置。 此外，等于线和空间尺寸小于最小特征尺寸是可能的。 在一个实施例中，使用复合间隔结构形成双控制非易失性闪存存储元件阵列。 当形成衬底的活性区域时，具有叠层的叠层和隔离区之间的复合间隔结构有利于条之间的等长长度和隔离区。

公开(公告)号：US07780477B2

公开(公告)日：2010-08-24

申请号：US11771730

申请日：2007-06-29

申请人： Jonathan Hubert ,  Jason P. Hanlon ,  Matthijs Hutten

发明人： Jonathan Hubert ,  Jason P. Hanlon ,  Matthijs Hutten

IPC分类号： H05K1/00

CPC分类号： H01R31/06 ,  G06K19/07741 ,  G06K19/07743 ,  H01R27/00 ,  H05K5/0265 ,  H05K5/0282 ,  Y10S439/945

摘要： An adapter system is disclosed including a pair of adapters operating in conjunction with each other to allow a variety of different, off-the-shelf memory cards to be used within the ExpressCard slot.

摘要翻译： 公开了一种适配器系统，其包括彼此结合操作的一对适配器，以允许在ExpressCard插槽内使用各种不同的现成的存储卡。

公开(公告)号：US07774027B2

公开(公告)日：2010-08-10

申请号：US11536155

申请日：2006-09-28

申请人： Dhaval Parikh ,  Rajeev Nagabhirava

发明人： Dhaval Parikh ,  Rajeev Nagabhirava

IPC分类号： H04B1/38

CPC分类号： H04W88/06 ,  H04M1/6091 ,  H04M1/7253 ,  H04W8/245 ,  H04W84/18

摘要： A portable flash memory drive includes a Bluetooth controller with only a subset of the layers of a Bluetooth stack necessary for operation. This enables usage of a generic Bluetooth controller in the flash drive. Specific configuration for profiles and other aspects of Bluetooth communication are handled by upper layers of the Bluetooth stack that are stored in the flash memory of the drive and thereafter loaded into a host computer. The configuration and make up of the Bluetooth stack can therefore be easily updated and changed when desired.

摘要翻译： 便携式闪存驱动器包括仅具有操作所需的蓝牙堆栈的层的一部分的蓝牙控制器。 这使得在闪存驱动器中使用通用蓝牙控制器。 蓝牙通信的配置文件和其他方面的具体配置由存储在驱动器的闪存中并随后加载到主机中的蓝牙堆栈的上层来处理。 因此，当需要时，可以容易地更新和改变蓝牙堆叠的配置和组成。

公开(公告)号：US07773403B2

公开(公告)日：2010-08-10

申请号：US11623315

申请日：2007-01-15

申请人： James Kai ,  George Matamis ,  Tuan Duc Pham ,  Masaaki Higashitani ,  Takashi Orimoto

发明人： James Kai ,  George Matamis ,  Tuan Duc Pham ,  Masaaki Higashitani ,  Takashi Orimoto

IPC分类号： G11C5/06

CPC分类号： H01L27/115 ,  H01L27/11521 ,  H01L27/11524

摘要： High density semiconductor devices and methods of fabricating the same are provided. Spacer fabrication techniques are utilized to form circuit elements having reduced feature sizes, which in some instances are smaller than the smallest lithographically resolvable element size of the process being used. Spacers are formed that serve as a mask for etching one or more layers beneath the spacers. An etch stop pad layer having a material composition substantially similar to the spacer material is provided between a dielectric layer and an insulating sacrificial layer such as silicon nitride. When etching the sacrificial layer, the matched pad layer provides an etch stop to avoid damaging and reducing the size of the dielectric layer. The matched material compositions further provide improved adhesion for the spacers, thereby improving the rigidity and integrity of the spacers.

摘要翻译： 提供了高密度半导体器件及其制造方法。 利用间隔器制造技术来形成具有减小的特征尺寸的电路元件，其在一些情况下小于正在使用的工艺的最小可光刻解析的元件尺寸。 形成隔板，其用作蚀刻间隔物下面的一个或多个层的掩模。 具有与间隔物材料基本相似的材料组成的蚀刻停止垫层设置在电介质层和诸如氮化硅的绝缘牺牲层之间。 当蚀刻牺牲层时，匹配的焊盘层提供蚀刻停止以避免损坏并减小电介质层的尺寸。 匹配的材料组合物还提供了用于间隔物的改进的粘合性，从而提高了间隔物的刚度和完整性。

公开(公告)号：US07772107B2

公开(公告)日：2010-08-10

申请号：US11538220

申请日：2006-10-03

申请人： Cheemen Yu ,  Hem Takiar ,  Chih-Chin Liao

发明人： Cheemen Yu ,  Hem Takiar ,  Chih-Chin Liao

IPC分类号： H01L21/44 ,  H01L21/48 ,  H01L21/50

CPC分类号： H01L21/4846 ,  H01L21/486 ,  H01L23/49827 ,  H01L2224/48091 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/00014

摘要： Methods of forming a semiconductor package including a single-sided substrate are disclosed. In a first embodiment of the present invention, a substrate may include a conductive layer on a top surface of the substrate, i.e., on the same side of the substrate as where the die are mounted. In a second embodiment of the present invention, a substrate may include a conductive layer on a bottom of the substrate, i.e., on the opposite side of the substrate as where the die are mounted.

摘要翻译： 公开了形成包括单面基板的半导体封装的方法。 在本发明的第一实施例中，衬底可以在衬底的顶表面上，即在衬底的与安装裸片相同的一侧上包括导电层。 在本发明的第二实施例中，衬底可以包括在衬底的底部上的导电层，即衬底的安装模具的相反侧。

公开(公告)号：US07762849B2

公开(公告)日：2010-07-27

申请号：US12103533

申请日：2008-04-15

申请人： Jonathan Hubert ,  Jason P. Hanlon ,  Kevin M. Conley

发明人： Jonathan Hubert ,  Jason P. Hanlon ,  Kevin M. Conley

IPC分类号： H01R24/00

CPC分类号： G06K19/077 ,  G06K19/07732

摘要： An expandable and collapsible peripheral device is disclosed, along with methods of manufacturing same. When in an expanded state, the peripheral device may have a length which conforms to the ExpressCard standard, and when in a collapsed state, the peripheral device may have a form factor approximating that of a CompactFlash card. Peripheral devices of the present invention may operate according to standards other than the ExpressCard standard, and may have sizes in the expanded and collapsed positions unrelated to ExpressCards and/or CompactFlash cards.

摘要翻译： 公开了可扩展和可折叠的外围设备及其制造方法。 当处于扩展状态时，外围设备可以具有符合ExpressCard标准的长度，并且当处于折叠状态时，外围设备可以具有接近CompactFlash卡的形状因子。 本发明的外围设备可以根据ExpressCard标准以外的标准进行操作，并且可以具有与ExpressCard和/或CompactFlash卡无关的扩展位置和折叠位置的尺寸。

公开(公告)号：US07745234B2

公开(公告)日：2010-06-29

申请号：US12165383

申请日：2008-06-30

申请人： King Hoo Ong ,  Robertito Piaduche ,  Ning Ye ,  Hem Takiar

发明人： King Hoo Ong ,  Robertito Piaduche ,  Ning Ye ,  Hem Takiar

IPC分类号： H01L21/70

CPC分类号： H01L23/5382 ,  H01L24/98 ,  H01L2224/98 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01018 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/19041 ,  H01L2224/48 ,  H01L2924/00

摘要： A method of forming a semiconductor card. A semiconductor package having a damaged controller die is reclaimed. The reclaim process includes severing the electrical connections between the controller die and the semiconductor package substrate without exposing the passive component. In one embodiment, the cutting tool comprises a saw blade. An electrically insulating material is deposited over the exposed bond wires to complete the reclaim process. The reclaimed package and a new controller die are affixed to a second substrate to electrically couple the memory die of the reclaimed package with the new controller die—forming a new package. The new package is encapsulated to form a new memory card.

摘要翻译： 一种形成半导体卡的方法。 回收具有损坏的控制器管芯的半导体封装。 回收过程包括切断控制器管芯和半导体封装衬底之间的电连接，而不暴露被动元件。 在一个实施例中，切割工具包括锯片。 电绝缘材料沉积在暴露的接合线上以完成回收过程。 将回收的包装和新的控制器管芯固定到第二基板上以将再生包装的存储管芯与新的控制器电连接，从而形成新的封装。 新封装封装形成新的存储卡。

公开(公告)号：US20100153672A1

公开(公告)日：2010-06-17

申请号：US12336445

申请日：2008-12-16

申请人： FABRICE JOGAND-COULOMB ,  ROBERT CHANG ,  PO YUAN ,  MEI YAN ,  XIAN JUN LIU

发明人： FABRICE JOGAND-COULOMB ,  ROBERT CHANG ,  PO YUAN ,  MEI YAN ,  XIAN JUN LIU

IPC分类号： G06F12/14

CPC分类号： G11C16/22 ,  G06F13/4243 ,  G06F21/6218

摘要： A method of controlling data access to non-volatile memory is disclosed. The method includes storing a data file in a non-volatile memory. The non-volatile memory includes a memory array including a plurality of address ranges one or more of which corresponding to a protected portion of the memory array and one or more of which corresponding to an unprotected portion of the memory array. The method also includes communicating to a host device an indication that a memory request with respect to the protected portion of the memory array is denied. The indication is communicated for instructing the host device to avoid a timeout when the memory request is denied.

摘要翻译： 公开了一种控制对非易失性存储器的数据访问的方法。 该方法包括将数据文件存储在非易失性存储器中。 非易失性存储器包括存储器阵列，其包括多个地址范围，其中一个或多个对应于存储器阵列的受保护部分，并且其中一个或多个对应于存储器阵列的未受保护部分。 所述方法还包括向主机设备传送关于存储器阵列的受保护部分的存储器请求被拒绝的指示。 通知该指示用于指示主机设备在存储器请求被拒绝时避免超时。