公开(公告)号：US08796675B2

公开(公告)日：2014-08-05

申请号：US13613566

申请日：2012-09-13

申请人： Je-Hun Lee ,  Ki-Won Kim ,  Do-Hyun Kim ,  Woo-Geun Lee ,  Kap-Soo Yoon

发明人： Je-Hun Lee ,  Ki-Won Kim ,  Do-Hyun Kim ,  Woo-Geun Lee ,  Kap-Soo Yoon

IPC分类号： H01L35/24

CPC分类号： H01L27/1225 ,  H01L21/0214 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/02554 ,  H01L21/02565 ,  H01L23/53238 ,  H01L27/124 ,  H01L27/1248 ,  H01L27/1262 ,  H01L29/45 ,  H01L29/4908 ,  H01L29/513 ,  H01L29/518 ,  H01L29/66969 ,  H01L29/78603 ,  H01L29/7869 ,  H01L2924/0002 ,  H01L2924/00

摘要： A TFT array substrate includes a semiconductive oxide layer disposed on an insulating substrate and including a channel portion, a gate electrode overlapping the semiconductive oxide layer, a gate insulating layer interposed between the semiconductive oxide layer and the gate electrode, and a passivation layer disposed on the semiconductive oxide layer and the gate electrode. At least one of the gate insulating layer and the passivation layer includes an oxynitride layer, and the oxynitride layer has a higher concentration of oxygen than that of nitrogen in a location of the oxynitride layer closer to the semiconductive oxide layer.

摘要翻译： TFT阵列基板包括设置在绝缘基板上并包括沟道部分的半导体氧化物层，与半导体氧化物层重叠的栅极电极，插入在半导体氧化物层和栅电极之间的栅极绝缘层，以及设置在 半导体氧化物层和栅电极。 栅极绝缘层和钝化层中的至少一个包括氧氮化物层，并且氧氮化物层在氧氮化物层的位置更靠近半导体氧化物层的位置处具有比氮的浓度高的氧氮化物层。

公开(公告)号：US08735890B2

公开(公告)日：2014-05-27

申请号：US13328658

申请日：2011-12-16

申请人： Ki-Won Kim ,  Je-Hun Lee ,  Sung-Haeng Cho ,  Woo-Geun Lee ,  Kap-Soo Yoon ,  Do-Hyun Kim ,  Seung-Ha Choi

发明人： Ki-Won Kim ,  Je-Hun Lee ,  Sung-Haeng Cho ,  Woo-Geun Lee ,  Kap-Soo Yoon ,  Do-Hyun Kim ,  Seung-Ha Choi

IPC分类号： H01L29/786

CPC分类号： H01L27/1225 ,  H01L27/1288

摘要： In a display substrate and a method of manufacturing the display substrate, the display substrate includes a data line, a channel pattern, an insulating pattern and a pixel electrode. The data line extends in a direction on a base substrate. The channel pattern is disposed in a separate region between an input electrode connected to the data line and an output electrode spaced apart from the input electrode. The channel pattern makes contact with the input electrode and the output electrode on the input and output electrodes. The insulating pattern is spaced apart from the channel pattern on the base substrate and includes a contact hole exposing the output electrode. The pixel electrode is formed on the insulating pattern to make contact with the output electrode through the contact hole. Thus, a damage of the oxide semiconductor layer may be minimized and a manufacturing process may be simplified.

摘要翻译： 在显示基板和显示基板的制造方法中，显示基板包括数据线，通道图案，绝缘图案和像素电极。 数据线沿着基底基板上的方向延伸。 通道图案设置在与数据线连接的输入电极和与输入电极间隔开的输出电极之间的分离区域中。 通道图案与输入电极和输出电极上的输出电极接触。 绝缘图案与基底基板上的沟道图案间隔开，并且包括暴露输出电极的接触孔。 像素电极形成在绝缘图案上，以通过接触孔与输出电极接触。 因此，可以使氧化物半导体层的损伤最小化，并且可以简化制造工艺。

公开(公告)号：US08698144B2

公开(公告)日：2014-04-15

申请号：US12731380

申请日：2010-03-25

申请人： Kyung-Sook Jeon ,  Kap-Soo Yoon ,  Woong-Kwon Kim ,  Sang-Youn Han ,  Jun-Ho Song ,  Sung-Hoon Yang ,  Byeong-Hoon Cho ,  Dae-Cheol Kim ,  Ki-Hun Jeong ,  Jung-Suk Bang

发明人： Kyung-Sook Jeon ,  Kap-Soo Yoon ,  Woong-Kwon Kim ,  Sang-Youn Han ,  Jun-Ho Song ,  Sung-Hoon Yang ,  Byeong-Hoon Cho ,  Dae-Cheol Kim ,  Ki-Hun Jeong ,  Jung-Suk Bang

IPC分类号： H01L33/00

CPC分类号： G02F1/13338 ,  G02F2001/13312 ,  G02F2203/11 ,  G06F3/0412 ,  G06F3/042

摘要： A display panel that includes: a substrate, a sensing transistor disposed on the substrate, and a readout transistor connected to the sensing transistor and transmitting a detecting signal is presented. The sensing transistor includes a semiconductor layer disposed on the upper substrate, a source electrode and a drain electrode disposed on the semiconductor layer, and a gate electrode overlapping the semiconductor layer on the source electrode and the drain electrode. Accordingly, in a display device and a manufacturing method thereof, an infrared sensing transistor, a visible light sensing transistor, and a readout transistor are simultaneously formed with a top gate structure such that the number of manufacturing processes and the manufacturing cost may be reduced.

摘要翻译： 一种显示面板，包括：衬底，设置在衬底上的感测晶体管，以及连接到感测晶体管并传输检测信号的读出晶体管。 感测晶体管包括设置在上基板上的半导体层，设置在半导体层上的源电极和漏电极以及与源电极和漏电极上的半导体层重叠的栅电极。 因此，在显示装置及其制造方法中，同时形成具有顶栅结构的红外感测晶体管，可见光感测晶体管和读出晶体管，从而可以减少制造工艺的数量和制造成本。

公开(公告)号：US20130214299A1

公开(公告)日：2013-08-22

申请号：US13618308

申请日：2012-09-14

申请人： Hye Young RYU ,  Hee Jun BYEON ,  Woo Geun LEE ,  Kap Soo YOON ,  Yoon Ho KIM ,  Chun Won BYUN

发明人： Hye Young RYU ,  Hee Jun BYEON ,  Woo Geun LEE ,  Kap Soo YOON ,  Yoon Ho KIM ,  Chun Won BYUN

IPC分类号： H01L29/786 ,  H01L21/336

CPC分类号： H01L27/127 ,  G02F1/134363 ,  G02F1/136227 ,  G02F1/136286 ,  G02F1/1368 ,  G02F2001/136222 ,  G02F2001/136295 ,  H01L27/1225 ,  H01L27/124 ,  H01L27/1248 ,  H01L27/1262

摘要： A thin film transistor array panel and a manufacturing method thereof according to an exemplary embodiment of the present invention form a contact hole in a second passivation layer formed of an organic insulator, protect a side of the contact hole by covering with a protection member formed of the same layer as the first field generating electrode and formed of a transparent conductive material, and etch the first passivation layer below the second passivation layer using the protection member as a mask. Therefore, it is possible to prevent the second passivation layer formed of an organic insulator from being overetched while etching the insulating layer below the second passivation layer so that the contact hole is prevented from being made excessively wide.

摘要翻译： 根据本发明的示例性实施例的薄膜晶体管阵列面板及其制造方法在由有机绝缘体形成的第二钝化层中形成接触孔，通过用由保护构件形成的保护构件覆盖来保护接触孔的一侧 与第一场产生电极相同的层并由透明导电材料形成，并且使用保护构件作为掩模，将第二钝化层下面的第一钝化层蚀刻。 因此，可以防止由有机绝缘体形成的第二钝化层在蚀刻第二钝化层下方的绝缘层的同时进行过蚀刻，从而防止接触孔过宽。

公开(公告)号：US08409916B2

公开(公告)日：2013-04-02

申请号：US13233399

申请日：2011-09-15

申请人： Kap-Soo Yoon ,  Sung-Hoon Yang ,  Byoung-June Kim ,  Czang-Ho Lee ,  Sung-Ryul Kim ,  Hwa-Yeul Oh ,  Jae-Ho Choi ,  Yong-Mo Choi

发明人： Kap-Soo Yoon ,  Sung-Hoon Yang ,  Byoung-June Kim ,  Czang-Ho Lee ,  Sung-Ryul Kim ,  Hwa-Yeul Oh ,  Jae-Ho Choi ,  Yong-Mo Choi

IPC分类号： H01L21/00 ,  H01L21/16

CPC分类号： H01L29/7869 ,  H01L27/1225

摘要： A thin film transistor substrate includes an insulating plate; a gate electrode disposed on the insulating plate; a semiconductor layer comprising a metal oxide, wherein the metal oxide has oxygen defects of less than or equal to 3%, and wherein the metal oxide comprises about 0.01 mole/cm3 to about 0.3 mole/cm3 of a 3d transition metal; a gate insulating layer disposed between the gate electrode and the semiconductor layer; and a source electrode and a drain electrode disposed on the semiconductor layer. Also described is a display substrate. The metal oxide has oxygen defects of less than or equal to 3%, and is doped with about 0.01 mole/cm3 to about 0.3 mole/cm3 of 3d transition metal. The metal oxide comprises indium oxide or titanium oxide. The 3d transition metal includes at least one 3d transition metal selected from the group consisting of chromium, cobalt, nickel, iron, manganese, and mixtures thereof.

摘要翻译： 薄膜晶体管基板包括绝缘板; 设置在绝缘板上的栅电极; 包含金属氧化物的半导体层，其中所述金属氧化物具有小于或等于3％的氧缺陷，并且其中所述金属氧化物包含约0.01mol / cm 3至约0.3mol / cm 3的3d过渡金属; 设置在所述栅极电极和所述半导体层之间的栅极绝缘层; 以及设置在半导体层上的源电极和漏电极。 还描述了显示基板。 金属氧化物具有小于或等于3％的氧缺陷，并且掺杂有约0.01摩尔/ cm3至约0.3摩尔/ cm3的3d过渡金属。 金属氧化物包括氧化铟或二氧化钛。 3d过渡金属包括选自铬，钴，镍，铁，锰及其混合物中的至少一种3d过渡金属。

公开(公告)号：US20120217493A1

公开(公告)日：2012-08-30

申请号：US13365704

申请日：2012-02-03

申请人： Jin-Won LEE ,  Woo Geun LEE ,  Kap Soo YOON ,  Ki-Won KIM ,  Hyun-Jung LEE ,  Hee-Jun BYEON ,  Ji-Soo OH

发明人： Jin-Won LEE ,  Woo Geun LEE ,  Kap Soo YOON ,  Ki-Won KIM ,  Hyun-Jung LEE ,  Hee-Jun BYEON ,  Ji-Soo OH

IPC分类号： H01L29/786 ,  H01L33/02 ,  H01L29/24

CPC分类号： H01L27/1225 ,  H01L29/41733

摘要： A thin film transistor array panel includes: a gate electrode disposed on an insulation substrate; a gate insulating layer disposed on the gate electrode; a first electrode and an oxide semiconductor disposed directly on the gate insulating layer; a source electrode and a drain electrode formed on the oxide semiconductor; a passivation layer disposed on the first electrode, the source electrode, and the drain electrode; and a second electrode disposed on the passivation layer.

摘要翻译： 薄膜晶体管阵列面板包括：设置在绝缘基板上的栅电极; 设置在栅电极上的栅极绝缘层; 直接设置在栅极绝缘层上的第一电极和氧化物半导体; 形成在所述氧化物半导体上的源电极和漏电极; 设置在所述第一电极，所述源电极和所述漏电极上的钝化层; 以及设置在钝化层上的第二电极。

公开(公告)号：US08253896B2

公开(公告)日：2012-08-28

申请号：US12898250

申请日：2010-10-05

申请人： Kap-Soo Yoon ,  Sung-Hoon Yang ,  Ki-Hun Jeong ,  Kyung-Sook Jeon ,  Seung-Mi Seo

发明人： Kap-Soo Yoon ,  Sung-Hoon Yang ,  Ki-Hun Jeong ,  Kyung-Sook Jeon ,  Seung-Mi Seo

IPC分类号： G02F1/1335

CPC分类号： H01L27/1446 ,  B82Y15/00 ,  B82Y20/00 ,  G02B5/201 ,  H01L31/09 ,  H01L31/1804 ,  Y02E10/547 ,  Y02P70/521

摘要： A photonic sensor includes a first electrode layer, a second electrode layer, a third electrode layer, a first photon absorption layer, a second photon absorption layer, a third photon absorption layer and a charge blocking layer. The first photon absorption layer includes a dispersion of first nanoparticles, and is configured to transduce a first colored light into corresponding electric charge. The second photon absorption layer includes a dispersion of second nanoparticles, and is configured to transduce a second colored light into corresponding electric charge according to light intensity. The third photon absorption layer includes a dispersion of third nanoparticles, and is configured to transduce a third colored light into corresponding electric charge according to light intensity. The charge blocking layer is formed between the first and second photon absorption layers to block flow of electric charge between the first and second photon absorption layers.

摘要翻译： 光子传感器包括第一电极层，第二电极层，第三电极层，第一光子吸收层，第二光子吸收层，第三光子吸收层和电荷阻挡层。 第一光子吸收层包括第一纳米颗粒的分散体，并且被配置为将第一有色光转换成相应的电荷。 第二光子吸收层包括第二纳米颗粒的分散体，并且被配置为根据光强度将第二有色光转换成相应的电荷。 第三光子吸收层包括第三纳米颗粒的分散体，并且被配置为根据光强度将第三有色光转换成相应的电荷。 电荷阻挡层形成在第一和第二光子吸收层之间以阻止第一和第二光子吸收层之间的电荷流动。

公开(公告)号：US08189131B2

公开(公告)日：2012-05-29

申请号：US12188956

申请日：2008-08-08

申请人： Kap-Soo Yoon ,  Sung-Hoon Yang ,  Sung-Ryul Kim ,  Hwa-Yeul Oh ,  Jae-Ho Choi ,  Yong-Mo Choi

发明人： Kap-Soo Yoon ,  Sung-Hoon Yang ,  Sung-Ryul Kim ,  Hwa-Yeul Oh ,  Jae-Ho Choi ,  Yong-Mo Choi

IPC分类号： G02F1/136

CPC分类号： H01L29/78696 ,  B82Y10/00 ,  H01L29/778 ,  H01L29/78687

摘要： A thin-film transistor (TFT) includes a gate electrode, a semiconductor pattern, a source electrode, and a drain electrode. The semiconductor pattern includes an active layer being overlapped with the gate electrode and a low band gap portion having a lower energy band gap than the active layer. The source and drain electrodes are spaced apart from each other to be overlapped with the semiconductor pattern. Therefore, the semiconductor pattern includes a low band gap portion having a lower energy band gap than the active layer, so that electron mobility may be increased in a channel formed along the low band gap portion so that electric characteristics of the TFT may be enhanced.

摘要翻译： 薄膜晶体管（TFT）包括栅电极，半导体图案，源电极和漏电极。 半导体图案包括与栅电极重叠的有源层和具有比有源层更低的能带隙的低带隙部分。 源极和漏极彼此间隔开以与半导体图案重叠。 因此，半导体图案包括具有比有源层低的能带隙的低带隙部分，使得沿着低带隙部分形成的沟道中的电子迁移率可能增加，从而可以提高TFT的电特性。

公开(公告)号：US08022411B2

公开(公告)日：2011-09-20

申请号：US12499009

申请日：2009-07-07

申请人： Kap-Soo Yoon ,  Ki-Won Kim ,  Sung-Ryul Kim ,  Sung-Hoon Yang ,  Woo-Geun Lee

发明人： Kap-Soo Yoon ,  Ki-Won Kim ,  Sung-Ryul Kim ,  Sung-Hoon Yang ,  Woo-Geun Lee

IPC分类号： H01L51/52

CPC分类号： H01L27/1248 ,  H01L27/1214 ,  H01L27/1225 ,  H01L27/1288 ,  H01L29/4908 ,  H01L29/7869

摘要： Provided are a thin-film transistor (TFT) display panel having improved electrical properties that can be fabricated time-effectively and a method of fabricating the TFT display panel. The TFT display panel includes: gate wirings which are formed on an insulating substrate; oxide active layer patterns which are formed on the gate wirings; data wirings which are formed on the oxide active layer patterns to cross the gate wirings; a passivation layer which is formed on the oxide active layer patterns and the data wirings and is made of silicon nitride (SiNx); and a pixel electrode which is formed on the passivation layer.

摘要翻译： 提供了一种薄膜晶体管（TFT）显示面板，其具有可以有效制造的改进的电气特性，以及制造TFT显示面板的方法。 TFT显示面板包括：形成在绝缘基板上的栅极布线; 形成在栅极布线上的氧化物有源层图案; 形成在氧化物有源层图案上以跨过栅极布线的数据布线; 形成在氧化物有源层图案和数据布线上并由氮化硅（SiNx）制成的钝化层; 以及形成在钝化层上的像素电极。

公开(公告)号：US20110193076A1

公开(公告)日：2011-08-11

申请号：US12957743

申请日：2010-12-01

申请人： Pil-Sang YUN ,  Ki-Won KIM ,  Hye-Young RYU ,  Woo-Geun LEE ,  Seung-Ha CHOI ,  Jae-Hyoung YOUN ,  Kyoung-Jae CHUNG ,  Young-Wook LEE ,  Je-Hun LEE ,  Kap-Soo YOON ,  Do-Hyun KIM ,  Dong-Ju YANG ,  Young-Joo CHOI

发明人： Pil-Sang YUN ,  Ki-Won KIM ,  Hye-Young RYU ,  Woo-Geun LEE ,  Seung-Ha CHOI ,  Jae-Hyoung YOUN ,  Kyoung-Jae CHUNG ,  Young-Wook LEE ,  Je-Hun LEE ,  Kap-Soo YOON ,  Do-Hyun KIM ,  Dong-Ju YANG ,  Young-Joo CHOI

IPC分类号： H01L29/786 ,  H01L21/336

CPC分类号： H01L29/41733 ,  H01L21/44 ,  H01L21/441 ,  H01L21/465 ,  H01L21/475 ,  H01L21/47573 ,  H01L21/47635 ,  H01L27/1214 ,  H01L27/1225 ,  H01L27/127 ,  H01L27/1288 ,  H01L29/66969 ,  H01L29/78606 ,  H01L29/7869 ,  H01L29/78696

摘要： A thin film transistor panel includes an insulating substrate, a gate insulating layer disposed on the insulating substrate, an oxide semiconductor layer disposed on the gate insulating layer, an etch stopper disposed on the oxide semiconductor layer, and a source electrode and a drain electrode disposed on the etch stopper.

摘要翻译： 薄膜晶体管面板包括绝缘基板，设置在绝缘基板上的栅极绝缘层，设置在栅极绝缘层上的氧化物半导体层，设置在氧化物半导体层上的蚀刻停止器，以及设置在源极电极和漏极上的 在蚀刻停止器上。