公开(公告)号：US06956270B2

公开(公告)日：2005-10-18

申请号：US10771548

申请日：2004-02-05

申请人： Yoshiaki Fukuzumi

发明人： Yoshiaki Fukuzumi

IPC分类号： G11C11/15 ,  H01L21/8246 ,  H01L27/105 ,  H01L27/22 ,  H01L29/82 ,  H01L43/00

CPC分类号： H01L27/222 ,  G11C11/15

摘要： A magnetic memory device comprises a plurality of magneto-resistance effect elements arranged in a matrix form. The each of a plurality of magneto-resistance effect elements have a pattern shape which substantially internally touches an ellipse having major and minor axes of the magneto-resistance effect element as major and minor axes thereof and a pitch between the adjacent magneto-resistance effect elements in a direction of the major axis is longer than that in a direction of the minor axis.

公开(公告)号：US20050207216A1

公开(公告)日：2005-09-22

申请号：US10933323

申请日：2004-09-03

申请人： Yoshiaki Fukuzumi ,  Hiroaki Yoda

发明人： Yoshiaki Fukuzumi ,  Hiroaki Yoda

IPC分类号： H01L27/105 ,  G11C11/00 ,  G11C11/15 ,  H01L21/8246 ,  H01L43/08

CPC分类号： G11C11/15 ,  H01L27/228

摘要： A semiconductor integrated circuit device includes a magneto-resistive effect element and a plug. The magneto-resistive effect element includes a first magnetic layer whose magnetization direction is fixed and a second magnetic layer whose magnetization direction can be changed. The plug is formed to penetrate through the second magnetic layer in the film thickness direction of the second magnetic layer and used to apply a write magnetic field to the second magnetic layer.

摘要翻译： 半导体集成电路器件包括磁阻效应元件和插头。 磁阻效应元件包括其磁化方向固定的第一磁性层和其磁化方向可改变的第二磁性层。 插塞形成为在第二磁性层的膜厚度方向上穿过第二磁性层，并用于向第二磁性层施加写入磁场。

公开(公告)号：US20050205909A1

公开(公告)日：2005-09-22

申请号：US10895138

申请日：2004-07-21

申请人： Yoshiaki Fukuzumi

发明人： Yoshiaki Fukuzumi

IPC分类号： G11C11/15 ,  H01L21/00 ,  H01L21/8246 ,  H01L27/105 ,  H01L27/22 ,  H01L29/76 ,  H01L43/08

CPC分类号： G11C11/16 ,  H01L27/222 ,  H01L43/08

摘要： A magnetic random access memory includes a first write wiring line which runs in a first direction, a second write wiring line which has first and second regions run in the first and second directions, a magnetoresistive element formed between the first write wiring line and the first region, first and second yoke layers, the magnetoresistive element having a recording layer which has an easy axis of magnetization whose direction in a non-energized state tilts by 30° to 60° with respect to the first direction, first and second ferromagnetic layers which are formed from a ferromagnetic material whose direction of magnetization in the non-energized state is aligned to the first direction, and magnetically coupled to the recording layer, and first and second nonmagnetic layers formed between the recording layer and the first and second ferromagnetic layers, respectively.

摘要翻译： 磁性随机存取存储器包括沿第一方向延伸的第一写入布线，具有沿第一和第二方向延伸的第一和第二区域的第二写入布线;形成在第一写入布线和第一写入布线之间的磁阻元件 所述磁阻元件具有记录层，所述记录层具有相对于所述第一方向倾斜30°至60°的方向的易磁化磁化轴，第一和第二铁磁层， 由铁磁材料形成，其非通电状态的磁化方向与第一方向对准，并且磁耦合到记录层，以及形成在记录层与第一和第二铁磁层之间的第一和第二非磁性层， 分别。

公开(公告)号：US20050199926A1

公开(公告)日：2005-09-15

申请号：US10895074

申请日：2004-07-21

申请人： Yoshiaki Fukuzumi ,  Shigeki Takahashi

发明人： Yoshiaki Fukuzumi ,  Shigeki Takahashi

IPC分类号： G11C11/15 ,  H01L21/027 ,  H01L21/8246 ,  H01L27/105 ,  H01L27/22 ,  H01L43/08 ,  H01L43/12

CPC分类号： H01L43/08 ,  G11C11/16 ,  H01L27/228

摘要： According to an aspect of the present invention, there is disclosed a magnetic resistive element comprising a first magnetic layer whose magnetized state changes in accordance with data, a nonmagnetic layer disposed on the first magnetic layer, and a second magnetic layer which is disposed on the nonmagnetic layer and whose magnetized state is fixed, wherein the first magnetic layer has a cross shape in which a maximum length of a first direction is L1 and a maximum length of a second direction crossing the first direction at right angles is L2, and the second magnetic layer has a tetragonal shape in which the maximum length of the first direction is L3 (≦L1) and the maximum length of the second direction is L4 (

摘要翻译： 根据本发明的一个方面，公开了一种磁阻元件，其包括磁化状态根据数据变化的第一磁性层，设置在第一磁性层上的非磁性层和设置在第一磁性层上的第二磁性层 非磁性层并且其磁化状态是固定的，其中第一磁性层具有第一方向的最大长度为L1并且与第一方向垂直的第二方向的最大长度为L2的十字形状，并且第二磁性层 磁性层具有四边形形状，其中第一方向的最大长度为L3（<= L1），第二方向的最大长度为L4（

公开(公告)号：US06936924B2

公开(公告)日：2005-08-30

申请号：US10356640

申请日：2003-02-03

申请人： Yoshiaki Fukuzumi

发明人： Yoshiaki Fukuzumi

IPC分类号： H01L21/302 ,  H01L21/28 ,  H01L21/3065 ,  H01L21/3205 ,  H01L21/60 ,  H01L21/768 ,  H01L21/8242 ,  H01L23/485 ,  H01L23/522 ,  H01L27/108 ,  H01L23/48

CPC分类号： H01L21/76846 ,  H01L21/76804 ,  H01L21/76807 ,  H01L21/7681 ,  H01L21/76855 ,  H01L21/76856 ,  H01L21/76895 ,  H01L21/76897 ,  H01L23/485 ,  H01L2924/0002 ,  H01L2924/00

摘要： In a semiconductor device having a wire structure, the thickness of a first insulation film substantially corresponds to the depth of a contact hole. A surface of a second insulation film serves as a bottom face of a wire groove. Regarding the contact hole, only a side wall portion intersecting a direction of the wire groove has a substantial taper angle. This configuration can be attained under conditions where an etching selectivity of the first insulation film to the second insulation film is set to be slightly lower and a portion of the second insulation film where a opening edge of an opening portion is exposed is slightly etched during etching process of the wire groove. With a semiconductor device having this structure, a conductive material embedding characteristic can be enhanced, while preventing possibility of short-circuit even when an interval between wires is reduced.

摘要翻译： 在具有线结构的半导体器件中，第一绝缘膜的厚度基本上对应于接触孔的深度。 第二绝缘膜的表面用作线槽的底面。 关于接触孔，只有与线槽的方向相交的侧壁部分具有大的锥角。 在第一绝缘膜与第二绝缘膜的蚀刻选择性被设定为略低的条件下，在蚀刻时稍微蚀刻露出开口部的开口边缘的第二绝缘膜的一部分的条件下， 线槽工艺。 通过具有这种结构的半导体器件，即使减少导线之间的间隔，也可以防止导电材料嵌入特性的提高，同时防止短路的可能性。

公开(公告)号：US06762482B2

公开(公告)日：2004-07-13

申请号：US10336956

申请日：2003-01-06

申请人： Wen-Chung Liu ,  Bor-Ru Sheu ,  Yoshiaki Fukuzumi

发明人： Wen-Chung Liu ,  Bor-Ru Sheu ,  Yoshiaki Fukuzumi

IPC分类号： H01L2993

CPC分类号： H01L21/7687 ,  H01L21/3212 ,  H01L21/76828 ,  H01L21/76832 ,  H01L21/76834 ,  H01L21/76877 ,  H01L28/60 ,  H01L28/90

摘要： A memory device with composite contact plug and method for manufacturing the same. The composite contact plug comprises a first insulating layer deposited on a semiconductor substrate. A contact hole is formed to penetrate through the first insulation layer. A barrier layer is deposited in the contact hole and fills a portion of the contact hole. A contact plug is formed on the barrier layer and fills the contact hole. The first insulating layer is etched back until the surface of the first insulating layer is below the contact plug. A diffusion barrier layer is then deposited on the first insulating layer and the contact plug. The diffusion barrier layer is planarized until the contact plug is exposed to form a composite contact plug. The memory device is constructed on the composite contact plug.

摘要翻译： 具有复合接触插头的记忆装置及其制造方法。 复合接触插塞包括沉积在半导体衬底上的第一绝缘层。 形成穿过第一绝缘层的接触孔。 阻挡层沉积在接触孔中并填充接触孔的一部分。 接触塞形成在阻挡层上并填充接触孔。 第一绝缘层被回蚀刻直到第一绝缘层的表面在接触插塞之下。 然后在第一绝缘层和接触插塞上沉积扩散阻挡层。 扩散阻挡层被平坦化，直到接触塞被暴露以形成复合接触塞。 存储器件构造在复合接触插头上。

公开(公告)号：US06693002B2

公开(公告)日：2004-02-17

申请号：US10241521

申请日：2002-09-12

申请人： Shunji Nakamura ,  Akiyoshi Hatada ,  Yoshiaki Fukuzumi

发明人： Shunji Nakamura ,  Akiyoshi Hatada ,  Yoshiaki Fukuzumi

IPC分类号： H01L218234

CPC分类号： H01L28/92 ,  H01L27/10814 ,  H01L28/91

摘要： A semiconductor device having: a substrate having a first area and a second area surrounding the first area; an insulating film formed in the second area; electrodes formed above the surface of the substrate in the first area; dielectric films formed above the electrodes; and an opposing electrode formed above the dielectric films, wherein the shape of a side wall of the insulating film includes a shape reflecting the outer peripheral shape of a side wall of the electrode facing the side wall of the insulating film. The semiconductor device of high integration, low cost and high reliability can be realized.

摘要翻译： 一种半导体器件，具有：具有第一区域的基板和围绕所述第一区域的第二区域; 形成在第二区域中的绝缘膜; 形成在第一区域中的衬底表面上方的电极; 形成在电极上方的电介质膜; 以及形成在所述电介质膜上方的对置电极，其中所述绝缘膜的侧壁的形状包括反映所述电极的与所述绝缘膜的侧壁相对的侧壁的外周形状的形状。 可以实现高集成，低成本，高可靠性的半导体器件。

公开(公告)号：US06563157B2

公开(公告)日：2003-05-13

申请号：US09893515

申请日：2001-06-29

申请人： Yoshiaki Fukuzumi

发明人： Yoshiaki Fukuzumi

IPC分类号： H01L27108

CPC分类号： H01L27/10852 ,  H01L27/10814 ,  H01L27/10894 ,  H01L28/55 ,  H01L28/91

摘要： A semiconductor device includes a contact plug formed in a first interlayer insulating film on a semiconductor substrate, a second interlayer insulating film formed on the first interlayer insulating film and having an opening formed therein to reach the first interlayer insulating film, a liner film formed on the bottom and side surfaces of the opening, a capacitor lower electrode of a stacked capacitor formed to be at least partly filled in the opening, the capacitor lower electrode being formed in contact with the first and second interlayer insulating films with the liner film disposed therebetween, a capacitor insulating film formed on the capacitor lower electrode, and a capacitor upper electrode formed on the capacitor insulating film. The capacitor lower electrode is formed of a platinum group material and the capacitor insulating film is formed of a high-dielectric-constant material.

摘要翻译： 半导体器件包括：形成在半导体衬底上的第一层间绝缘膜中的接触插塞;形成在第一层间绝缘膜上的第二层间绝缘膜，并形成在其中形成的开口以到达第一层间绝缘膜;衬垫膜， 开口的底部和侧表面，形成为至少部分地填充在开口中的堆叠电容器的电容器下电极，电容器下电极形成为与第一和第二层间绝缘膜接触，衬里膜设置在其间 形成在电容器下电极上的电容器绝缘膜，以及形成在电容器绝缘膜上的电容器上电极。 电容器下电极由铂族材料形成，电容器绝缘膜由高介电常数材料形成。

公开(公告)号：US06222722B1

公开(公告)日：2001-04-24

申请号：US09283280

申请日：1999-04-01

申请人： Yoshiaki Fukuzumi ,  Yusuke Kohyama

发明人： Yoshiaki Fukuzumi ,  Yusuke Kohyama

IPC分类号： H01G4008

CPC分类号： H01L28/82 ,  H01L27/10814 ,  H01L28/84 ,  H01L28/86 ,  H01L28/87 ,  H01L28/90 ,  H01L28/91

摘要： This invention provides a capacitor including a metal lower electrode having an undulated shape and an improved electrode area, and a method of manufacturing the same. A capacitor for data storage is formed on a semiconductor substrate (not shown) via an insulating interlayer having a contact plug. The capacitor has a lower electrode whose inner and outer surfaces are rough or undulated such that one surface has a shape conforming to the shape of the other surface, a dielectric film formed to cover the surfaces of the lower electrode, and an upper electrode formed to cover the lower electrode via the dielectric film. The lower electrode has a cylindrical shape with an open upper end. The lower electrode is connected to a cell transistor through the contact plug. The lower electrode is formed from a metal or a metal oxide.

公开(公告)号：US06197675B1

公开(公告)日：2001-03-06

申请号：US09456990

申请日：1999-12-07

申请人： Yoshiaki Fukuzumi ,  Yusuke Kohyama

发明人： Yoshiaki Fukuzumi ,  Yusuke Kohyama

IPC分类号： H01L2144

CPC分类号： H01L27/10844 ,  H01L27/0251 ,  H01L27/0255 ,  H01L27/10852

摘要： A semiconductor memory device comprises a semiconductor substrate, a first conducting layer formed above the main surface of the semiconductor substrate, a second conducting layer formed above the first conducting layer through a first insulating layer and connected to the first conducting layer through a first via-conductor formed in a first contact hole formed in the first insulating layer, and a third conducting layer formed beneath the second conducting layer through a second insulating layer and connected to the second conducting layer through a second via-conductor formed in a second contact hole formed in the second insulating layer, in which an angle formed by a tangent to an inner wall of the first contact hole and a normal to the first conducting layer at a portion of the first conducting layer at which the first contact hole is in contact with the first conducting layer, is larger than an angle formed by a tangent to an inner wall of the second contact hole and a normal to the third conducting layer at a portion of the third conducting layer at which the second contact hole is in contact with the third conducting layer. By virtue of this structure, it is possible to avoid influence of electrical potential variation upon the first conducting layer in the manufacturing process.

摘要翻译： 半导体存储器件包括半导体衬底，形成在半导体衬底的主表面上的第一导电层，通过第一绝缘层形成在第一导电层上方的第二导电层，并通过第一通孔连接到第一导电层， 导体，形成在形成在第一绝缘层中的第一接触孔中，以及第三导电层，其通过第二绝缘层形成在第二导电层的下方，并通过形成在形成的第二接触孔中的第二通孔导体连接到第二导电层 在所述第二绝缘层中，所述第一接触孔与所述第一接触孔的内壁的切线形成的角度与所述第一导电层的所述第一导电层的与所述第一导电层接触的部分的垂直方向 第一导电层大于由与第二接触孔的内壁的切线形成的角度，并且与由垂直于第二接触孔的法线成正比 在第三导电层的第二接触孔与第三导电层接触的部分处的第三导电层。 由于这种结构，在制造过程中可以避免电势变化对第一导电层的影响。