公开(公告)号：US07400167B2

公开(公告)日：2008-07-15

申请号：US11204570

申请日：2005-08-16

Applicant: David Lewis ,  Vaughn Betz ,  Paul Leventis ,  Christopher Lane ,  Andy Lee ,  Jeffrey Watt ,  Timothy Vanderhoek

Inventor： David Lewis ,  Vaughn Betz ,  Paul Leventis ,  Christopher Lane ,  Andy Lee ,  Jeffrey Watt ,  Timothy Vanderhoek

IPC: H03K19/173

CPC classification number: G06F17/5081 ,  G06F17/5077 ,  H03K19/17784

Abstract: A programmable logic device (PLD) includes first and second circuits. The first and second circuits are part of a user's design to be implemented using the PLD's resources. The first circuit is powered by a first supply voltage. The second circuit is powered by a second supply voltage. At least one of the first and second supply voltages is determined by a PLD computer-aided design (CAD) flow used to implement the user's design in the PLD.

Abstract translation: 可编程逻辑器件（PLD）包括第一和第二电路。 第一和第二电路是使用PLD资源实现的用户设计的一部分。 第一个电路由第一个电源供电。 第二电路由第二电源供电。 第一和第二电源电压中的至少一个由用于在PLD中实现用户设计的PLD计算机辅助设计（CAD）流确定。

公开(公告)号：US20070200596A1

公开(公告)日：2007-08-30

申请号：US11361642

申请日：2006-02-24

Applicant: Andy Lee ,  Christopher Lane ,  Ketan Zaveri ,  Richard Cliff ,  Cameron McClintock ,  Srinivas Reddy ,  David Lewis

Inventor： Andy Lee ,  Christopher Lane ,  Ketan Zaveri ,  Richard Cliff ,  Cameron McClintock ,  Srinivas Reddy ,  David Lewis

IPC: H03K19/177

CPC classification number: H03K19/17784 ,  H03K19/17788 ,  H03K19/17792

Abstract: A programmable logic device (PLD) includes at least two regions. Each region includes electrical circuitry that has a set of transistors. Each of the two regions has a corresponding fixed transistor threshold voltage, a corresponding fixed transistor body bias, and a corresponding fixed supply voltage.

Abstract translation: 可编程逻辑器件（PLD）至少包括两个区域。 每个区域包括具有一组晶体管的电路。 两个区域中的每一个具有对应的固定晶体管阈值电压，对应的固定晶体管体偏置和相应的固定电源电压。

公开(公告)号：US20070182633A1

公开(公告)日：2007-08-09

申请号：US11552231

申请日：2006-10-24

Applicant: Jim Omura ,  Matthew Rabinowitz ,  James Spilker ,  Ju-Yong Do ,  Andy Lee

Inventor： Jim Omura ,  Matthew Rabinowitz ,  James Spilker ,  Ju-Yong Do ,  Andy Lee

IPC: G01S3/02

CPC classification number: G01S5/0036 ,  G01S5/0054 ,  G01S5/0081 ,  G01S5/021 ,  G01S5/0215 ,  G01S5/0221 ,  G01S5/14 ,  G01S5/145

Abstract: Apparatus having corresponding methods comprises a reference clock; a receiver to receive a wireless television signal, wherein the wireless television signal is transmitted by a television transmitter according to a transmitter clock; and a clock offset unit to determine a clock offset between the reference clock and the transmitter clock based on the wireless television signal.

Abstract translation: 具有相应方法的装置包括参考时钟; 接收器，用于接收无线电视信号，其中所述无线电视信号由电视发射机根据发射机时钟发射; 以及时钟偏移单元，用于基于无线电视信号确定参考时钟和发射机时钟之间的时钟偏移。

公开(公告)号：US07196542B1

公开(公告)日：2007-03-27

申请号：US10977332

申请日：2004-10-28

Applicant: Andy Lee ,  Toan Nguyen ,  Stephanie Tran ,  Cameron McClintock ,  Brian Johnson

Inventor： Andy Lee ,  Toan Nguyen ,  Stephanie Tran ,  Cameron McClintock ,  Brian Johnson

IPC: H03K19/173

CPC classification number: H03K19/17744 ,  H03K19/17788

Abstract: Techniques are provided for increasing flexibility to I/O banks with respect to supply voltages. Multiple supply voltages can be provided to a bank of I/O pins. Separate I/O pins residing in an I/O bank are driven by buffers that are coupled to different supply voltages. Dedicated I/O pins are driven by buffers with pre-selected supply voltages. The dedicated I/O pins can be grouped together into the same I/O bank providing greater flexibility to drive signals on I/O pins in other I/O banks at different voltages. Also, a dual mode input buffer can drive an input signal to a voltage determined by one of two possible supply voltage levels. In addition, power on reset circuits for an I/O bank can monitor the voltage of two or more supply voltages.

Abstract translation: 提供了相对于电源电压提高I / O组的灵活性的技术。 可以向一组I / O引脚提供多个电源电压。 驻留在I / O组中的单独I / O引脚由耦合到不同电源电压的缓冲器驱动。 专用I / O引脚由具有预选电源电压的缓冲器驱动。 专用I / O引脚可以组合在同一个I / O bank中，提供更大的灵活性，以在不同电压的其他I / O bank中的I / O引脚上驱动信号。 此外，双模式输入缓冲器可以将输入信号驱动到由两个可能的电源电压电平之一确定的电压。 此外，I / O bank的上电复位电路可以监视两个或多个电源电压的电压。

公开(公告)号：US07167022B1

公开(公告)日：2007-01-23

申请号：US10810117

申请日：2004-03-25

Applicant: James Schleicher ,  Richard Yuan ,  Bruce Pedersen ,  Sinan Kaptanoglu ,  Gregg Baeckler ,  David Lewis ,  Mike Hutton ,  Andy Lee ,  Rahul Saini ,  Henry Kim

Inventor： James Schleicher ,  Richard Yuan ,  Bruce Pedersen ,  Sinan Kaptanoglu ,  Gregg Baeckler ,  David Lewis ,  Mike Hutton ,  Andy Lee ,  Rahul Saini ,  Henry Kim

IPC: H03K19/177

CPC classification number: H03K19/17728 ,  G06F7/50 ,  H03K19/017581

Abstract: Disclosed is an LE that can provide a number of advantageous feature. For example, the LE can provide efficient and flexible use of LUTs and input sharing. The LE may also provide for flexible use of one or more dedicated adders and include register functionality.

Abstract translation: 公开了可以提供多个有利特征的LE。 例如，LE可以提供LUT和输入共享的高效灵活的使用。 LE还可以灵活地使用一个或多个专用加法器并且包括寄存器功能。

公开(公告)号：US07103813B1

公开(公告)日：2006-09-05

申请号：US10703400

申请日：2003-11-06

Applicant: Paul Tracy ,  Anthony Pang ,  Andy Lee ,  Adam Wright ,  Rahul Saini

Inventor： Paul Tracy ,  Anthony Pang ,  Andy Lee ,  Adam Wright ,  Rahul Saini

IPC: G01R31/02 ,  G06F11/267

CPC classification number: G01R31/31717 ,  G01R31/318519

Abstract: A bridging fault detection system allows for a high amount of test coverage using a low number of test configurations. The bridging fault detection system automatically creates optimal test configurations and test vectors without the need for precise layout information, and is adaptable to complex programmable device architectures. Testers can specify a precise level of testing coverage to optimize the testing processing. A programmable device with interconnect bias circuitry decreases the number of test configurations and thus the time needed to test for bridging faults. The interconnect bias circuit provides explicit test control over the unused lines in a configuration, driving them both high and low for complete test coverage between each line and all of its possible neighbors. The bridging fault detection system balances the available number of control test points against the number of interconnect segments stitched together by programmable connection to maximize the lines under test per configuration.

Abstract translation: 桥接故障检测系统允许使用低数量的测试配置进行大量的测试覆盖。 桥接故障检测系统自动创建最佳测试配置和测试向量，而不需要精确的布局信息，并且适用于复杂的可编程设备架构。 测试人员可以指定一个精确的测试覆盖水平以优化测试处理。 具有互连偏置电路的可编程器件减少测试配置的数量，从而减少测试桥接故障所需的时间。 互连偏置电路在配置中对未使用的线路提供显式测试控制，驱动它们高和低以在每条线路与其所有可能的邻居之间完成测试覆盖。 桥接故障检测系统通过可编程连接平衡可用数量的控制测试点与拼接在一起的互连段的数量，以最大化每个配置的待测线路。

公开(公告)号：US20060056991A1

公开(公告)日：2006-03-16

申请号：US10937278

申请日：2004-09-10

Applicant: Andy Lee

Inventor： Andy Lee

IPC: F04B17/00 ,  F01B23/08

CPC classification number: F04B41/02 ,  F04B35/01

Abstract: A transmission device for use in an air compressor includes a first gear connectable to the motor shaft, a second gear connectable to the compressor shaft and a gear assembly provided with a third gear mated with the first gear and a fourth gear mated with the second gear so that rotation of the motor shaft drives the first gear to rotate, which drives the third gear and the fourth gear to rotate and thus the compressor shaft is rotated.

Abstract translation: 用于空气压缩机的传动装置包括可连接到电动机轴的第一齿轮，可连接到压缩机轴的第二齿轮和设置有与第一齿轮配合的第三齿轮的齿轮组件和与第二齿轮配合的第四齿轮 使得马达轴的旋转驱动第一齿轮旋转，其驱动第三齿轮和第四齿轮旋转，从而使压缩机轴旋转。

公开(公告)号：US20060033527A1

公开(公告)日：2006-02-16

申请号：US11202616

申请日：2005-08-12

Applicant: Andy Lee ,  Cameron McClintock ,  Brian Johnson ,  Richard Cliff ,  Srinivas Reddy ,  Chris Lane ,  Paul Leventis ,  Vaughn Betz ,  David Lewis

Inventor： Andy Lee ,  Cameron McClintock ,  Brian Johnson ,  Richard Cliff ,  Srinivas Reddy ,  Chris Lane ,  Paul Leventis ,  Vaughn Betz ,  David Lewis

IPC: H03K19/177

CPC classification number: H03K19/17736 ,  H03K19/177 ,  H03K19/17732 ,  H03K19/1778 ,  H03K19/17796

Abstract: In accordance with one aspect of the invention, a hole is formed within an LE array of a PLD by interrupting the LE array base signal routing architecture such that a hole is left for IP function block to be incorporated. An interface region is provided for interfacing the remaining LE array base signal routing architecture to the IP function block.

Abstract translation: 根据本发明的一个方面，通过中断LE阵列基本信号路由体系结构，在PLD的LE阵列内形成一个孔，使得留下用于IP功能块的孔。 提供接口区域用于将剩余的LE阵列基本信号路由体系结构与IP功能块进行接口。

公开(公告)号：US06943580B2

公开(公告)日：2005-09-13

申请号：US10364310

申请日：2003-02-10

Applicant: David Lewis ,  Bruce Pedersen ,  Sinan Kaptanoglu ,  Andy Lee

Inventor： David Lewis ,  Bruce Pedersen ,  Sinan Kaptanoglu ,  Andy Lee

IPC: H03K19/173 ,  H03K19/177 ,  G06F7/38

CPC classification number: H03K19/17728 ,  H03K19/1737

Abstract: A logic element includes memory elements, multiplexers, and controls. The multiplexers are arranged in levels including a highest level of multiplexers with inputs connected to the memory elements and outputs connected to inputs of a next-to-highest level of multiplexers and a first level of multiplexers with inputs connected to outputs of a second level of multiplexers and at least one output. The controls are connected to the multiplexers. In a first operational mode the controls determine a first-mode output at the at least one output of the first level of multiplexers, and in a second operational mode the controls determine a plurality of second-mode outputs at selected outputs of multiplexers not at the first level of multiplexers.

Abstract translation: 逻辑元件包括存储器元件，多路复用器和控制器。 多路复用器被布置在包括最高级别的多路复用器的级别中，其中连接到存储器元件的输入端和连接到下一级到最高级复用器的输入端的输出端和第一级多路复用器，其输入端连接到第二级 多路复用器和至少一个输出。 控制器连接到多路复用器。 在第一操作模式中，所述控制确定所述第一级多路复用器的所述至少一个输出处的第一模式输出，并且在第二操作模式中，所述控制确定多路复用器的选定输出处的多个第二模式输出， 第一级多路复用器。

公开(公告)号：US06842039B1

公开(公告)日：2005-01-11

申请号：US10278177

申请日：2002-10-21

Applicant: Mario Guzman ,  Christopher Lane ,  Andy Lee ,  Ninh Ngo

Inventor： Mario Guzman ,  Christopher Lane ,  Andy Lee ,  Ninh Ngo

IPC: H03K19/177 ,  G01R31/28

CPC classification number: H03K19/17752 ,  H03K19/1774 ,  H03K19/17744 ,  H03K19/17756

Abstract: An electronic device comprises a first plurality of configuration elements connected as a shift register for programming a subset of the programmable functions of the electronic device. The subset of programmable functions may be reprogrammed by loading configuration data into the first plurality of configuration elements such that the subset of programmable functions may be reprogrammed without necessarily reprogramming other programmable functions of the electronic device.

Abstract translation: 电子设备包括作为移位寄存器连接的第一多个配置元件，用于对电子设备的可编程功能的子集进行编程。 可编程功能的子集可以通过将配置数据加载到第一多个配置元件中来重新编程，使得可编程功能的子集可以被重新编程，而不必重新编程电子设备的其他可编程功能。