公开(公告)号：US20060275974A1

公开(公告)日：2006-12-07

申请号：US11458120

申请日：2006-07-18

申请人： Oh-Jung Kwon ,  Kenneth Settlemyer ,  Ravikumar Ramachandran ,  Min-Soo Kim

发明人： Oh-Jung Kwon ,  Kenneth Settlemyer ,  Ravikumar Ramachandran ,  Min-Soo Kim

IPC分类号： H01L21/8238

CPC分类号： H01L27/1087 ,  H01L29/66181

摘要： A method of fabricating a bottle trench and a bottle trench capacitor. The method including: providing a substrate; forming a trench in the substrate, the trench having sidewalls and a bottom, the trench having an upper region adjacent to a top surface of the substrate and a lower region adjacent to the bottom of the trench; forming an oxidized layer of the substrate in the bottom region of the trench; and removing the oxidized layer of the substrate from the bottom region of the trench, a cross-sectional area of the lower region of the trench greater than a cross-sectional area of the upper region of the trench.

摘要翻译： 制造瓶沟槽和瓶沟电容器的方法。 该方法包括：提供衬底; 在所述衬底中形成沟槽，所述沟槽具有侧壁和底部，所述沟槽具有与所述衬底的顶表面相邻的上部区域和与所述沟槽的底部相邻的下部区域; 在沟槽的底部区域形成衬底的氧化层; 并且从沟槽的底部区域去除衬底的氧化层，沟槽的下部区域的横截面面积大于沟槽的上部区域的横截面面积。

公开(公告)号：US20060118522A1

公开(公告)日：2006-06-08

申请号：US11341761

申请日：2006-01-27

申请人： Ravikumar Ramachandran ,  Klaus Penner ,  Marion Nichterwitz ,  Christiane Nitschke ,  Holger Krause

发明人： Ravikumar Ramachandran ,  Klaus Penner ,  Marion Nichterwitz ,  Christiane Nitschke ,  Holger Krause

IPC分类号： B44C1/22 ,  C23F1/00

CPC分类号： H01L21/02071 ,  C09K13/08 ,  C11D3/3942 ,  C11D3/3947 ,  C11D7/08 ,  C11D11/0047 ,  C23F1/00 ,  C23F1/18 ,  C23F1/20 ,  G03F7/423 ,  G03F7/426 ,  H01L21/02052 ,  H01L21/02063

摘要： In a process for making a semiconductor device, a first aqueous mixture is prepared and a fluorine-containing compound is combined with the first aqueous mixture to obtain an etchant composition. A sample of the etchant composition is taken and compared to a standard dilute solution of the fluorine-containing compound to obtain a value of fluorine-containing compound concentration in said sample. The value is input to a tank tool recipe control to cause an adjustment in the concentration of the fluorine-containing compound in the etchant composition. A surface of a semiconductor wafer can then be subjected to etching by the etchant composition.

摘要翻译： 在制造半导体器件的方法中，制备第一含水混合物，并将含氟化合物与第一含水混合物组合以获得蚀刻剂组合物。 取出蚀刻剂组合物的样品并与含氟化合物的标准稀溶液进行比较，以获得所述样品中含氟化合物浓度的值。 该值被输入到罐工具配方控制中，以调节蚀刻剂组合物中含氟化合物的浓度。 然后可以通过蚀刻剂组合物对半导体晶片的表面进行蚀刻。

公开(公告)号：US20050081884A1

公开(公告)日：2005-04-21

申请号：US10685684

申请日：2003-10-15

申请人： Ravikumar Ramachandran ,  David Rath

发明人： Ravikumar Ramachandran ,  David Rath

IPC分类号： B08B3/12 ,  C11D1/02 ,  C11D1/38 ,  C11D7/24 ,  C11D7/26 ,  C11D11/00 ,  C25F1/00 ,  H01L21/00 ,  H01L21/306

CPC分类号： H01L21/02052 ,  B08B3/12 ,  C11D1/02 ,  C11D1/38 ,  C11D7/241 ,  C11D7/261 ,  C11D11/0047 ,  H01L21/67057 ,  Y10S134/902

摘要： The present invention provides a method cleaning of semiconductor devices through heterogeneous nucleation of cavitation bubbles. Heterogeneous nucleation is performed by applying sonic energy to a cleaning solution and a phase material in order to remove unwanted particles from semiconductor devices. A surfactant may be added to the phase material and the cleaning solution.

摘要翻译： 本发明提供了通过空化气泡的异质成核来清洗半导体器件的方法。 通过将声能施加到清洁溶液和相材料以便从半导体器件中去除不需要的颗粒来进行非均匀成核。 可以向相材料和​​清洁溶液中加入表面活性剂。

公开(公告)号：US20050059225A1

公开(公告)日：2005-03-17

申请号：US10605244

申请日：2003-09-17

申请人： Lance Genicola ,  Mark Hurley ,  Jeremy Kempisty ,  Paul Kirsch ,  Ravikumar Ramachandran ,  Suri Hedge

发明人： Lance Genicola ,  Mark Hurley ,  Jeremy Kempisty ,  Paul Kirsch ,  Ravikumar Ramachandran ,  Suri Hedge

IPC分类号： H01L21/00 ,  H01L21/28 ,  H01L21/314 ,  H01L21/318 ,  H01L29/51 ,  H01L21/31 ,  H01L21/425 ,  H01L21/469

CPC分类号： H01L21/67167 ,  H01L21/02329 ,  H01L21/28167 ,  H01L21/28185 ,  H01L21/28202 ,  H01L21/2822 ,  H01L21/28238 ,  H01L21/3144 ,  H01L21/3185 ,  H01L21/67213 ,  H01L21/67253 ,  H01L29/513 ,  H01L29/518 ,  Y10T29/41

摘要： A method for monitoring a nitridation process, including: (a) providing a semiconductor substrate; (b) forming a first dielectric layer on a top surface of the substrate; (c) introducing a quantity of interfacial species into the substrate; (d) removing the first dielectric layer; (e) forming a second dielectric layer on the top surface of the substrate; (f) measuring the density of interface traps between the substrate and the second dielectric layer; (g) providing a predetermined relationship between the quantity of the interfacial species and the density of the interface traps; and (h) determining the quantity of the interfacial species introduced based on the relationship.

摘要翻译： 一种用于监测氮化工艺的方法，包括：（a）提供半导体衬底; （b）在所述基板的顶表面上形成第一电介质层; （c）将一定量的界面物质引入底物; （d）去除第一电介质层; （e）在所述衬底的顶表面上形成第二电介质层; （f）测量衬底和第二介电层之间的界面陷阱的密度; （g）提供界面物质的量与界面捕集阱的密度之间的预定关系; 和（h）基于关系确定引入的界面物质的数量。

公开(公告)号：US06740568B2

公开(公告)日：2004-05-25

申请号：US10206875

申请日：2002-07-29

申请人： Yun Yu Wang ,  Johnathan Faltermeier ,  Colleen M. Snavely ,  Michael Maldei ,  Michael M. Iwatake ,  David M. Dobuzinsky ,  Ravikumar Ramachandran ,  Viraj Y. Sardesai ,  Philip L. Flaitz ,  Lisa Y. Ninomiya

发明人： Yun Yu Wang ,  Johnathan Faltermeier ,  Colleen M. Snavely ,  Michael Maldei ,  Michael M. Iwatake ,  David M. Dobuzinsky ,  Ravikumar Ramachandran ,  Viraj Y. Sardesai ,  Philip L. Flaitz ,  Lisa Y. Ninomiya

IPC分类号： H01L2136

CPC分类号： H01L21/02667 ,  H01L21/02046 ,  H01L21/02532 ,  H01L21/2022 ,  H01L21/28525 ,  H01L27/10873

摘要： In a method of forming a contact, a liner reactive ion etch is affected on a substrate to remove silicon nitride and silicon oxide. An oxygen plasma ex-situ clean, a Huang AB clean, and a dilute hydrofluric acid (DHF) clean are affected. Amorphous silicon is deposited and an anneal is performed to regrow and recrystallize amorphous silicon.

摘要翻译： 在形成接触的方法中，在衬底上影响衬里反应离子蚀刻以去除氮化硅和氧化硅。 氧等离子体原位清洗，黄AB清洁剂和稀释的氢氟酸（DHF）清洁剂都受到影响。 沉积非晶硅并进行退火以再结晶并重结晶非晶硅。

公开(公告)号：US06630074B1

公开(公告)日：2003-10-07

申请号：US09137179

申请日：1998-08-20

申请人： David Lee Rath ,  Ravikumar Ramachandran

发明人： David Lee Rath ,  Ravikumar Ramachandran

IPC分类号： C09K1308

CPC分类号： C09D9/00 ,  C09K13/08 ,  C11D3/3947 ,  C11D7/08 ,  C11D11/0047 ,  H01L21/31111 ,  H01L21/31133 ,  H01L21/31138

摘要： An aqueous etchant composition containing about 0.01 to about 15 percent by weight of sulfuric acid and about 0.01 to about 20 percent by weight of hydrogen peroxide or about 1 to 30 ppm of ozone, and about 0.01 to 100 ppm of hydrofluoric acid is effective in removing polymer and via residue from a substrate or conductive material, and especially from an integrated circuit chip having aluminum lines thereon.

摘要翻译： 含有约0.01至约15重量％的硫酸和约0.01至约20重量％的过氧化氢或约1至30ppm臭氧以及约0.01至100ppm氢氟酸的水性蚀刻剂组合物有效地除去 聚合物和通孔残留物，特别是来自其上具有铝线的集成电路芯片。

公开(公告)号：US06274440B1

公开(公告)日：2001-08-14

申请号：US09282134

申请日：1999-03-31

申请人： Kenneth C. Arndt ,  Axel C. Brintzinger ,  Richard A. Conti ,  Donna R. Cote ,  Chandrasekhar Narayan ,  Ravikumar Ramachandran ,  Thomas S. Rupp ,  Senthil K. Srinivasan

发明人： Kenneth C. Arndt ,  Axel C. Brintzinger ,  Richard A. Conti ,  Donna R. Cote ,  Chandrasekhar Narayan ,  Ravikumar Ramachandran ,  Thomas S. Rupp ,  Senthil K. Srinivasan

IPC分类号： H01L21336

CPC分类号： H01L23/5258 ,  H01L23/5256 ,  H01L2924/0002 ,  H01L2924/3011 ,  H01L2924/00

摘要： A structure and method for making a cavity fuse over a gate conductor stack. The method includes providing a semiconductor substrate having a gate conductor stack over a shallow trench isolation region, forming oxide layers on the substrate about the gate conductor stack, etching electrical contact holes through the oxide layers to the substrate, filling the electrical contact holes with a first conductive material to establish electrical contact with the gate conductor stack, etching a pattern in an uppermost oxide layer of the oxide layers, depositing a conductive layer of a second conductive material over the oxide layers and the electrical contacts, planarizing the conductive layer whereby the conductive material remains only in the pattern, anisotropically etching the oxide layers to form at least one etching hole through the oxide layers to the shallow trench isolation region, and isotropically etching at least a portion of the oxide layers about the etching hole, whereby a cavity is formed beneath at least a portion of the conductive layer pattern, the gate conductor stack comprising a fuse.

摘要翻译： 用于在栅极导体堆叠上形成腔体熔断器的结构和方法。 该方法包括提供在浅沟槽隔离区域上具有栅极导体堆叠的半导体衬底，在栅极导体堆叠周围形成衬底周围的氧化物层，蚀刻通过氧化物层到衬底的电接触孔， 第一导电材料以与栅极导体堆叠建立电接触，蚀刻氧化物层的最上面的氧化物层中的图案，在氧化物层和电触点上沉积第二导电材料的导电层，平坦化导电层，由此 导电材料仅保留在图案中，各向异性地蚀刻氧化物层以形成通过氧化物层到浅沟槽隔离区域的至少一个蚀刻孔，并且在蚀刻孔周围各向同性蚀刻至少一部分氧化层， 形成在导电层图案的至少一部分之下，g 包括保险丝的导体堆叠。

公开(公告)号：US5932493A

公开(公告)日：1999-08-03

申请号：US929590

申请日：1997-09-15

申请人： Hiroyuki Akatsu ,  Ronald Hoyer ,  Ravikumar Ramachandran

发明人： Hiroyuki Akatsu ,  Ronald Hoyer ,  Ravikumar Ramachandran

IPC分类号： H01L21/304 ,  H01L21/306 ,  H01L21/00

CPC分类号： H01L21/02052

摘要： Formation of watermarks during semiconductor processing can be prevented by rinsing silicon wafers in an organic solvent prior to drying. Water droplets on the silicon wafer surface are taken up by the solvent and film is formed over the wafer surface. Following this rinse, the wafer may be subjected to standard IPA-based drying techniques.

摘要翻译： 可以通过在干燥之前冲洗有机溶剂中的硅晶片来防止在半导体加工期间形成水印。 硅晶片表面上的水滴被溶剂吸收，并且在晶片表面上形成膜。 在该冲洗之后，可以对晶片进行标准的基于IPA的干燥技术。

公开(公告)号：US08436427B2

公开(公告)日：2013-05-07

申请号：US13080962

申请日：2011-04-06

申请人： Michael P. Chudzik ,  Wiliam K. Henson ,  Rashmi Jha ,  Yue Liang ,  Ravikumar Ramachandran ,  Richard S. Wise

发明人： Michael P. Chudzik ,  Wiliam K. Henson ,  Rashmi Jha ,  Yue Liang ,  Ravikumar Ramachandran ,  Richard S. Wise

IPC分类号： H01L27/092

CPC分类号： H01L29/517 ,  H01L21/28185 ,  H01L21/823842 ,  H01L21/823857 ,  H01L29/49 ,  H01L29/7833

摘要： The present invention, in one embodiment, provides a method of forming a semiconductor device that includes providing a substrate including a first conductivity type region and a second conductivity type region; forming a gate stack including a gate dielectric atop the first conductivity type region and the second conductivity type region of the substrate and a first metal gate conductor overlying the high-k gate dielectric; removing a portion of the first metal gate conductor that is present in the first conductivity type region to expose the gate dielectric present in the first conductivity type region; applying a nitrogen based plasma to the substrate, wherein the nitrogen based plasma nitrides the gate dielectric that is present in the first conductivity type region and nitrides the first metal gate conductor that is present in the second conductivity type region; and forming a second metal gate conductor overlying at least the gate dielectric that is present in the first conductivity type region.

摘要翻译： 在一个实施例中，本发明提供一种形成半导体器件的方法，该半导体器件包括提供包括第一导电类型区域和第二导电类型区域的衬底; 在所述基板的第一导电类型区域和所述第二导电类型区域之上形成包括栅极电介质的栅极堆叠和覆盖所述高k栅极电介质的第一金属栅极导体; 去除存在于第一导电类型区域中的第一金属栅极导体的一部分以暴露存在于第一导电类型区域中的栅极电介质; 将氮基等离子体施加到所述基板，其中所述氮基等离子体氮化存在于所述第一导电类型区域中的所述栅极电介质，并且氮化所述第二导电类型区域中存在的所述第一金属栅极导体; 以及形成覆盖存在于第一导电类型区域中的至少栅极电介质的第二金属栅极导体。

公开(公告)号：US08236637B2

公开(公告)日：2012-08-07

申请号：US12893245

申请日：2010-09-29

申请人： Henry K. Utomo ,  Sameer Hemchand Jain ,  Ravikumar Ramachandran ,  Cung D. Tran

发明人： Henry K. Utomo ,  Sameer Hemchand Jain ,  Ravikumar Ramachandran ,  Cung D. Tran

IPC分类号： H01L21/8238

CPC分类号： H01L21/823807 ,  H01L21/823814 ,  H01L21/823835 ,  H01L29/665 ,  H01L29/66545 ,  H01L29/66636

摘要： A planar silicide structure and method of fabrication is disclosed. A FET having a silicided raised source-drain structure is formed where the height of the source-drain structures are the same as the height of the gates, simplifying the process of forming contacts on the FET. One embodiment utilizes a replacement metal gate FET and another embodiment utilizes a gate-first FET.

摘要翻译： 公开了一种平面硅化物结构及其制造方法。 形成具有硅化凸起源极 - 漏极结构的FET，其中源极 - 漏极结构的高度与栅极的高度相同，从而简化了在FET上形成接触的过程。 一个实施例使用替换金属栅极FET，另一个实施例利用栅极 - 第一FET。