公开(公告)号：US07029958B2

公开(公告)日：2006-04-18

申请号：US10699887

申请日：2003-11-04

Applicant: Cyrus E. Tabery ,  Shibly S. Ahmed ,  Matthew S. Buynoski ,  Srikanteswara Dakshina-Murthy ,  Zoran Krivokapic ,  Haihong Wang ,  Chih-Yuh Yang ,  Bin Yu

Inventor： Cyrus E. Tabery ,  Shibly S. Ahmed ,  Matthew S. Buynoski ,  Srikanteswara Dakshina-Murthy ,  Zoran Krivokapic ,  Haihong Wang ,  Chih-Yuh Yang ,  Bin Yu

IPC: H01L21/00

CPC classification number: H01L29/785 ,  H01L29/66818 ,  H01L29/7842

Abstract: A method for forming a metal-oxide semiconductor field-effect transistor (MOSFET) includes patterning a fin area, a source region, and a drain region on a substrate, forming a fin in the fin area, and forming a mask in the fin area. The method further includes etching the mask to expose a channel area of the MOSFET, etching the fin to thin a width of the fin in the channel area, forming a gate over the fin, and forming contacts to the gate, the source region, and the drain region.

Abstract translation: 一种形成金属氧化物半导体场效应晶体管（MOSFET）的方法包括在衬底上构图翅片区域，源极区域和漏极区域，在翅片区域中形成鳍片，并在鳍片区域中形成掩模 。 该方法还包括蚀刻掩模以暴露MOSFET的沟道区域，蚀刻鳍以在沟道区域中减薄翅片的宽度，在鳍上方形成栅极，以及形成与栅极，源区和 漏极区域。

公开(公告)号：US20050153492A1

公开(公告)日：2005-07-14

申请号：US10754559

申请日：2004-01-12

Applicant: Shibly Ahmed ,  Haihong Wang ,  Bin Yu

Inventor： Shibly Ahmed ,  Haihong Wang ,  Bin Yu

IPC: H01L21/336 ,  H01L29/786 ,  H01L21/338

CPC classification number: H01L29/785 ,  H01L29/66545 ,  H01L29/66795

Abstract: A method of forming a fin field effect transistor includes forming a fin and forming a source region adjacent a first end of the fin and a drain region adjacent a second end of the fin. The method further includes forming a dummy gate over the fin and forming a dielectric layer around the dummy gate. The method also includes removing the dummy gate to form a trench in the dielectric layer and forming a metal gate in the trench.

Abstract translation: 形成鳍状场效应晶体管的方法包括形成鳍片并形成与鳍片的第一端相邻的源极区域和与鳍片的第二端部相邻的漏极区域。 该方法还包括在鳍上方形成虚拟栅极，并在虚拟栅极周围形成电介质层。 该方法还包括去除伪栅极以在电介质层中形成沟槽并在沟槽中形成金属栅极。

公开(公告)号：US20050104091A1

公开(公告)日：2005-05-19

申请号：US10699887

申请日：2003-11-04

Applicant: Cyrus Tabery ,  Shibly Ahmed ,  Matthew Buynoski ,  Srikanteswara Dakshina-Murthy ,  Zoran Krivokapic ,  Haihong Wang ,  Chih-Yuh Yang ,  Bin Yu

Inventor： Cyrus Tabery ,  Shibly Ahmed ,  Matthew Buynoski ,  Srikanteswara Dakshina-Murthy ,  Zoran Krivokapic ,  Haihong Wang ,  Chih-Yuh Yang ,  Bin Yu

IPC: H01L21/336 ,  H01L29/786 ,  H01L29/745

CPC classification number: H01L29/785 ,  H01L29/66818 ,  H01L29/7842

Abstract: A method for forming a metal-oxide semiconductor field-effect transistor (MOSFET) includes patterning a fin area, a source region, and a drain region on a substrate, forming a fin in the fin area, and forming a mask in the fin area. The method further includes etching the mask to expose a channel area of the MOSFET, etching the fin to thin a width of the fin in the channel area, forming a gate over the fin, and forming contacts to the gate, the source region, and the drain region.

Abstract translation: 一种形成金属氧化物半导体场效应晶体管（MOSFET）的方法包括在衬底上构图翅片区域，源极区域和漏极区域，在翅片区域中形成鳍片，并在鳍片区域中形成掩模 。 该方法还包括蚀刻掩模以暴露MOSFET的沟道区域，蚀刻鳍以在沟道区域中减薄翅片的宽度，在鳍上方形成栅极，以及形成与栅极，源区和 漏极区域。

公开(公告)号：US06894337B1

公开(公告)日：2005-05-17

申请号：US10768014

申请日：2004-02-02

Applicant: Haihong Wang ,  Shibly S. Ahmed ,  Bin Yu

Inventor： Haihong Wang ,  Shibly S. Ahmed ,  Bin Yu

IPC: H01L21/20 ,  H01L21/336 ,  H01L27/08 ,  H01L29/786

CPC classification number: H01L29/785 ,  H01L21/0245 ,  H01L21/02488 ,  H01L21/02507 ,  H01L21/02532 ,  H01L21/02672 ,  H01L21/2022 ,  H01L29/66795 ,  H01L29/7853

Abstract: A method facilitates the formation of a stacked fin structure for a semiconductor device that includes a substrate. The method includes forming one or more oxide layers on the substrate and forming one or more amorphous silicon layers interspersed with the one or more oxide layers. The method further includes etching the one or more oxide layers and the one or more amorphous silicon layers to form a stacked fin structure and performing a metal-induced crystallization operation to convert the one or more amorphous silicon layers to one or more crystalline silicon layers.

Abstract translation: 一种方法有助于形成用于包括衬底的半导体器件的堆叠鳍式结构。 该方法包括在衬底上形成一个或多个氧化物层并形成与该一个或多个氧化物层分开的一个或多个非晶硅层。 该方法还包括蚀刻一个或多个氧化物层和一个或多个非晶硅层以形成堆叠鳍状结构，并执行金属诱导结晶操作以将一个或多个非晶硅层转换成一个或多个结晶硅层。

公开(公告)号：US06855989B1

公开(公告)日：2005-02-15

申请号：US10674520

申请日：2003-10-01

Applicant: Haihong Wang ,  Shibly S. Ahmed ,  Ming-Ren Lin ,  Bin Yu

Inventor： Haihong Wang ,  Shibly S. Ahmed ,  Ming-Ren Lin ,  Bin Yu

IPC: H01L21/336 ,  H01L27/01 ,  H01L29/423 ,  H01L29/49 ,  H01L29/786

CPC classification number: H01L29/785 ,  H01L29/42384 ,  H01L29/4908 ,  H01L29/66795

Abstract: A fin field effect transistor includes a fin, a source region, a drain region, a first gate electrode and a second gate electrode. The fin includes a channel. The source region is formed adjacent a first end of the fin and the drain region is formed adjacent a second end of the fin. The first gate electrode includes a first layer of metal material formed adjacent the fin. The second gate electrode includes a second layer of metal material formed adjacent the first layer. The first layer of metal material has a different work function than the second layer of metal material. The second layer of metal material selectively diffuses into the first layer of metal material via metal interdiffusion.

Abstract translation: 翅片场效应晶体管包括鳍片，源极区域，漏极区域，第一栅极电极和第二栅极电极。 鳍包括一个通道。 源区域邻近翅片的第一端形成，并且漏极区域邻近翅片的第二端形成。 第一栅电极包括邻近翅片形成的第一金属材料层。 第二栅电极包括与第一层相邻形成的第二金属材料层。 第一层金属材料具有与第二层金属材料不同的功函数。 金属材料的第二层选择性地通过金属相互扩散扩散到金属材料的第一层中。

公开(公告)号：US06812076B1

公开(公告)日：2004-11-02

申请号：US10752691

申请日：2004-01-08

Applicant: Krishnashree Achuthan ,  Shibly S. Ahmed ,  Haihong Wang ,  Bin Yu

Inventor： Krishnashree Achuthan ,  Shibly S. Ahmed ,  Haihong Wang ,  Bin Yu

IPC: H01L2972

CPC classification number: H01L29/785 ,  H01L21/3212 ,  H01L29/4908 ,  H01L29/66795 ,  H01L29/6681

Abstract: A FinFet-type semiconductor device includes a fin structure on which a relatively thin amorphous silicon layer and then an undoped polysilicon layer is formed. The semiconductor device may be planarized using a chemical mechanical polishing (CMP) in which the amorphous silicon layer acts as a stop layer to prevent damage to the fin structure.

Abstract translation: FinFet型半导体器件包括翅片结构，其上形成相对薄的非晶硅层，然后形成未掺杂的多晶硅层。 半导体器件可以使用化学机械抛光（CMP）进行平面化，其中非晶硅层用作阻挡层以防止损坏鳍结构。

公开(公告)号：US06803631B2

公开(公告)日：2004-10-12

申请号：US10349042

申请日：2003-01-23

Applicant: Srikanteswara Dakshina-Murthy ,  Judy Xilin An ,  Zoran Krivokapic ,  Haihong Wang ,  Bin Yu

Inventor： Srikanteswara Dakshina-Murthy ,  Judy Xilin An ,  Zoran Krivokapic ,  Haihong Wang ,  Bin Yu

IPC: H01L2701

CPC classification number: H01L29/785 ,  H01L29/1054 ,  H01L29/4908 ,  H01L29/66795 ,  H01L29/78654 ,  H01L29/78687

Abstract: A semiconductor structure includes a fin and a layer formed on the fin. The fin includes a first crystalline material having a rectangular cross section and a number of surfaces. The layer is formed on the surfaces and includes a second crystalline material. The first crystalline material has a different lattice constant than the second crystalline material to induce tensile strain within the first layer.

Abstract translation: 半导体结构包括翅片和形成在翅片上的层。 翅片包括具有矩形横截面和多个表面的第一结晶材料。 该层形成在表面上并且包括第二结晶材料。 第一结晶材料具有与第二结晶材料不同的晶格常数，以在第一层内引起拉伸应变。

公开(公告)号：US06787854B1

公开(公告)日：2004-09-07

申请号：US10385753

申请日：2003-03-12

Applicant: Chih-Yuh Yang ,  Shibly S. Ahmed ,  Srikanteswara Dakshina-Murthy ,  Cyrus E. Tabery ,  Haihong Wang ,  Bin Yu

Inventor： Chih-Yuh Yang ,  Shibly S. Ahmed ,  Srikanteswara Dakshina-Murthy ,  Cyrus E. Tabery ,  Haihong Wang ,  Bin Yu

IPC: H01L218238

CPC classification number: H01L29/7853 ,  H01L29/66818

Abstract: A method for forming a fin structure on a silicon-on-insulator (SOI) wafer that includes a silicon layer on an insulating layer that is formed over a semiconductor substrate includes etching the silicon layer using a first etch procedure, etching, following the first etch procedure, the silicon layer using a second etch procedure, and etching, following the second etch procedure, the silicon layer using a third etch procedure to form a T-shaped fin structure.

Abstract translation: 一种在绝缘体上硅（SOI）晶片上形成翅片结构的方法，包括在半导体衬底上形成的绝缘层上的硅层，包括使用第一蚀刻步骤蚀刻硅层，然后蚀刻第一 蚀刻步骤，使用第二蚀刻步骤的硅层，以及在第二蚀刻程序之后，使用第三蚀刻工艺蚀刻硅层以形成T形翅片结构。

公开(公告)号：US06762448B1

公开(公告)日：2004-07-13

申请号：US10405343

申请日：2003-04-03

Applicant: Ming-Ren Lin ,  Haihong Wang ,  Bin Yu

Inventor： Ming-Ren Lin ,  Haihong Wang ,  Bin Yu

IPC: H01L2708

CPC classification number: H01L29/785 ,  H01L21/823412 ,  H01L21/823437 ,  H01L27/088 ,  H01L29/66795 ,  H01L29/7842

Abstract: A semiconductor device includes a group of fin structures. The group of fin structures includes a conductive material and is formed by growing the conductive material in an opening of an oxide layer. The semiconductor device further includes a source region formed at one end of the group of fin structures, a drain region formed at an opposite end of the group of fin structures, and at least one gate.

Abstract translation: 半导体器件包括一组翅片结构。 翅片结构的组包括导电材料，并且通过在氧化物层的开口中生长导电材料而形成。 半导体器件还包括形成在鳍片结构组的一端处的源极区域，形成在鳍片结构组的相对端处的漏极区域和至少一个栅极。

公开(公告)号：US06680233B2

公开(公告)日：2004-01-20

申请号：US09974167

申请日：2001-10-09

Applicant: Bin Yu ,  Qi Xiang ,  HaiHong Wang

Inventor： Bin Yu ,  Qi Xiang ,  HaiHong Wang

IPC: H01L21336

CPC classification number: H01L29/4983 ,  H01L29/6653 ,  H01L29/6659

Abstract: A semiconductor device and method of manufacture. A liner composed of a high-K material having a relative permittivity of greater than 10 is formed adjacent at least the sidewalls of a gate. Sidewall spacers are formed adjacent the gate and spaced apart from the gate by the liner. The liner can be removed using an etch process that has substantially no reaction with a gate dielectric of the gate.

Abstract translation: 半导体器件及其制造方法。 由栅极的至少侧壁形成由相对介电常数大于10的高K材料构成的衬垫。 侧壁间隔件形成在门附近并且通过衬套与门隔开。 可以使用与栅极的栅极电介质基本上没有反应的蚀刻工艺来去除衬里。