公开(公告)号：US08422276B2

公开(公告)日：2013-04-16

申请号：US12930955

申请日：2011-01-20

申请人： Jun Yuan ,  Liubo Hong ,  Mao-Min Chen

发明人： Jun Yuan ,  Liubo Hong ,  Mao-Min Chen

IPC分类号： G11C11/00

CPC分类号： H01L43/12 ,  H01L27/222 ,  H01L43/08

摘要： Methods are presented for fabricating an MTJ element having a uniform vertical distance between its free layer and a bit line and, in addition, having a protective spacer layer formed abutting the lateral sides of the MTJ element to eliminate leakage currents between MTJ layers and the bit line. Each method forms a dielectric spacer layer on the lateral sides of the MTJ element and, depending on the method, includes an additional layer that protects the spacer layer during etching processes used to form a Cu damascene bit line. At various stages in the process, a dielectric layer is also formed to act as a CMP stop layer so that the capping layer on the MTJ element is not thinned by the CMP process that planarizes the surrounding insulation. Subsequent to planarization, the stop layer is removed by an anisotropic etch of such precision that the MTJ element capping layer is not reduced in thickness and serves to maintain uniform vertical distance between the bit line and the MTJ free layer.

摘要翻译： 提出了用于制造在其自由层和位线之间具有均匀垂直距离的MTJ元件的方法，此外，具有邻接MTJ元件的侧面形成的保护间隔层，以消除MTJ层与钻头之间的泄漏电流 线。 每种方法在MTJ元件的侧面上形成电介质间隔层，并且根据该方法，包括在用于形成Cu镶嵌位线的蚀刻工艺期间保护间隔层的附加层。 在该过程的各个阶段，还形成介电层以用作CMP停止层，使得MTJ元件上的覆盖层不会通过使周围绝缘平坦化的CMP工艺变薄。 在平坦化之后，通过各向异性蚀刻去除停止层，其精度使得MTJ元件覆盖层的厚度不减小并用于保持位线和MTJ自由层之间的均匀垂直距离。

公开(公告)号：US07515388B2

公开(公告)日：2009-04-07

申请号：US11016506

申请日：2004-12-17

申请人： Kunliang Zhang ,  Mao-Min Chen ,  Chyu-Jiuh Torng ,  Min Li ,  Chen-Jung Chien

发明人： Kunliang Zhang ,  Mao-Min Chen ,  Chyu-Jiuh Torng ,  Min Li ,  Chen-Jung Chien

IPC分类号： G11B5/33 ,  G11B5/127

CPC分类号： B82Y25/00 ,  B82Y10/00 ,  G11B5/3932 ,  G11B2005/3996 ,  Y10T29/49032

摘要： A hard bias structure for biasing a free layer in a MR element within a magnetic read head is comprised of a soft magnetic underlayer such as NiFe and a hard bias layer comprised of Co78.6Cr5.2Pt16.2 or Co65Cr15Pt20 that are rigidly exchange coupled to ensure a well aligned longitudinal biasing direction with minimal dispersions. The hard bias structure is formed on a BCC seed layer such as CrTi to improve lattice matching. The hard bias structure may be laminated in which each of the underlayers and hard bias layers has a thickness that is adjusted to optimize the total HC, Mrt, and S values. The present invention encompasses CIP and CPP spin values, MTJ devices, and multi-layer sensors. A larger process window for fabricating the hard bias structure is realized and lower asymmetry output and NBLW (normalized base line wandering) reject rates during a read operation are achieved.

摘要翻译： 用于偏置磁读头内的MR元件中的自由层的硬偏置结构由诸如NiFe的软磁性底层和由Co78.6Cr5.2Pt16.2或Co65Cr15Pt20构成的硬偏置层组成，其刚性交换耦合到 确保具有最小分散度的良好对齐的纵向偏置方向。 在诸如CrTi的BCC种子层上形成硬偏压结构以改善晶格匹配。 可以层压硬偏压结构，其中每个底层和硬偏压层具有被调节以使总HC，Mrt和S值最优化的厚度。 本发明包括CIP和CPP旋转值，MTJ装置和多层传感器。 实现了用于制造硬偏置结构的更大的工艺窗口，并且实现了在读取操作期间较低的不对称输出和NBLW（归一化的基线漂移）拒绝率。

公开(公告)号：US07359150B2

公开(公告)日：2008-04-15

申请号：US11091160

申请日：2005-03-28

申请人： Cherng-Chyi Han ,  Mao-Min Chen ,  Fenglin Liu

发明人： Cherng-Chyi Han ,  Mao-Min Chen ,  Fenglin Liu

IPC分类号： G11B5/39 ,  G11B5/147

CPC分类号： G11B5/3116 ,  G11B5/1278 ,  G11B5/23 ,  G11B5/3163

摘要： A trimmed upper pole piece for a magnetic write head is presented, said pole piece having a uniform width above and below a write gap layer and said pole piece being formed on a pedestal of uniform width projecting from a planar surface of a magnetic shield layer. Prior art methods of trimming pole pieces to a final width using ion-beam etches produce pole pieces with thickness differentials due to the etch resistant nature of the typical alumina write-gap filling material. The present pole piece uses NiCr, NiFeCr or Ru as write gap filling materials because they have an etch rate which is substantially equal to the etch rate of the other layers forming the pole piece and allow a uniform trimming to occur.

摘要翻译： 提出了一种用于磁性写入头的修整的上极片，所述极片在写间隙层上方和下方具有均匀的宽度，并且所述极片形成在从磁屏蔽层的平坦表面突出的均匀宽度的基座上。 使用离子束蚀刻将极片修剪到最终宽度的现有技术方法由于典型的氧化铝写入间隙填充材料的耐蚀刻性质而产生具有厚度差异的极片。 本极极片使用NiCr，NiFeCr或Ru作为写入间隙填充材料，因为它们的蚀刻速率基本上等于形成极片的其它层的蚀刻速率，并允许发生均匀的修整。

公开(公告)号：US07320168B2

公开(公告)日：2008-01-22

申请号：US10696431

申请日：2003-10-29

申请人： Cherng-Chyi Han ,  Rod Lee ,  Mao-Min Chen ,  Pokang Wang

发明人： Cherng-Chyi Han ,  Rod Lee ,  Mao-Min Chen ,  Pokang Wang

IPC分类号： G11B5/127 ,  H04R31/00

CPC分类号： G11B5/3136 ,  G11B5/3133 ,  Y10T29/49039 ,  Y10T29/49043 ,  Y10T29/49046 ,  Y10T29/49048 ,  Y10T29/49052

摘要： Problems such as thermal pole tip protrusion result from thermal mismatch between the alumina and pole material during the writing process. This, and similar problems due to inadequate heat dissipation, have been overcome by dividing the bottom shield into two pieces both of which sit on top of a non-magnetic heat sink. Heat generated by the coil during writing is transferred to the non-magnetic heat sink whence it gets transferred to the substrate. With this approach, the head not only benefits from less field disturbance due to the small shield but also improves heat dissipation from the additional heat sink.

摘要翻译： 在写入过程中，由于氧化铝和极材料之间的热失配，导致热极尖突出的问题。 通过将底部屏蔽分成两个位于非磁性散热器顶部的两个部件，已经克服了由于不充分散热引起的这种和类似的问题。 在写入期间由线圈产生的热量被传递到非磁性散热器，因为它被传送到基板。 采用这种方法，由于小屏蔽，头部不但受益于较少的场干扰，还可以改善附加散热器的散热。

公开(公告)号：US07211447B2

公开(公告)日：2007-05-01

申请号：US11080868

申请日：2005-03-15

申请人： Cheng T. Horng ,  Ru-Ying Tong ,  Mao-Min Chen ,  Liubo Hong ,  Min Li

发明人： Cheng T. Horng ,  Ru-Ying Tong ,  Mao-Min Chen ,  Liubo Hong ,  Min Li

IPC分类号： H01L21/00

CPC分类号： H01L43/12

摘要： A method of forming a high performance MTJ in an MRAM array is disclosed. A Ta/Ru capping layer in a bottom conductor is sputter etched to remove the Ru layer and form an amorphous Ta capping layer. A key feature is a subsequent surface treatment of the Ta capping layer in a transient vacuum chamber where a self-annealing occurs and a surfactant layer is formed on the Ta surface. The resulting smooth and flat Ta surface promotes a smooth and flat surface in the MTJ layers which are subsequently formed on the surfactant layer. For a 0.3×0.6 micron MTJ bit size, a 35 to 40 Angstrom thick NiFe(18%) free layer, an AlOx barrier layer generated from a ROX oxidation of an 9 to 10 Angstrom thick Al layer, and a Ru/Ta/Ru capping layer are employed to give a dR/R of >40% and an RA of about 4000 ohm-μm2.

摘要翻译： 公开了一种在MRAM阵列中形成高性能MTJ的方法。 溅射蚀刻底部导体中的Ta / Ru覆盖层以去除Ru层并形成无定形Ta覆盖层。 一个关键的特征是在瞬态真空室中Ta覆盖层的后续表面处理，其中发生自退火并且在Ta表面上形成表面活性剂层。 所得到的平滑且平坦的Ta表面促进在表面活性剂层上随后形成的MTJ层中的光滑和平坦的表面。 对于0.3×0.6微米的MTJ位尺寸，35至40埃厚的NiFe（18％）自由层，由9至10埃厚的Al层的ROX氧化产生的AlO x势垒层，以及Ru / Ta / 使用Ru覆盖层来产生大于40％的dR / R和约4000欧姆 - 姆2的RA。

公开(公告)号：US20070015294A1

公开(公告)日：2007-01-18

申请号：US11522663

申请日：2006-09-18

申请人： Cheng Horng ,  Mao-Min Chen ,  Liubo Hong ,  Ru-Ying Tong

发明人： Cheng Horng ,  Mao-Min Chen ,  Liubo Hong ,  Ru-Ying Tong

IPC分类号： H01L21/00

CPC分类号： H01L43/12 ,  H01L43/08 ,  Y10S977/934 ,  Y10S977/935

摘要： An MTJ (magnetic tunneling junction) MRAM (magnetic random access memory) cell is formed on a conducting lead and magnetic keeper layer that is capped by a sputter-etched Ta layer. The Ta capping layer has a smooth surface as a result of the sputter-etching and that smooth surface promotes the subsequent formation of a lower electrode (pinning/pinned layer) with smooth, flat layers and a radical oxidized (ROX) Al tunneling barrier layer which is ultra-thin, smooth, and to has a high breakdown voltage. A seed layer of NiCr is formed on the sputter-etched capping layer of Ta. The resulting device has generally improved performance characteristics in terms of its switching characteristics, GMR ratio and junction resistance.

摘要翻译： 在由溅射蚀刻的Ta层覆盖的导电引线和磁保持层上形成MTJ（磁性隧道结）MRAM（磁性随机存取存储器）单元。 作为溅射蚀刻的结果，Ta覆盖层具有光滑的表面，并且光滑表面促进随后形成具有光滑的平坦层和自由基氧化（ROX）Al隧穿势垒层的下电极（钉扎/钉扎层） 其超薄，光滑，并具有高击穿电压。 在Ta的溅射蚀刻的覆盖层上形成NiCr种子层。 在其开关特性，GMR比和结电阻方面，所得到的器件通常具有改进的性能特性。

公开(公告)号：US20060211198A1

公开(公告)日：2006-09-21

申请号：US11080868

申请日：2005-03-15

申请人： Cheng Horng ,  Ru-Ying Tong ,  Mao-Min Chen ,  Liubo Hong ,  Min Li

发明人： Cheng Horng ,  Ru-Ying Tong ,  Mao-Min Chen ,  Liubo Hong ,  Min Li

IPC分类号： H01L21/336

CPC分类号： H01L43/12

摘要： A method of forming a high performance MTJ in an MRAM array is disclosed. A Ta/Ru capping layer in a bottom conductor is sputter etched to remove the Ru layer and form an amorphous Ta capping layer. A key feature is a subsequent surface treatment of the Ta capping layer in a transient vacuum chamber where a self-annealing occurs and a surfactant layer is formed on the Ta surface. The resulting smooth and flat Ta surface promotes a smooth and flat surface in the MTJ layers which are subsequently formed on the surfactant layer. For a 0.3×0.6 micron MTJ bit size, a 35 to 40 Angstrom thick NiFe(18%) free layer, an AlOx barrier layer generated from a ROX oxidation of an 9 to 10 Angstrom thick Al layer, and a Ru/Ta/Ru capping layer are employed to give a dR/R of >40% and an RA of about 4000 ohm-μm2.

摘要翻译： 公开了一种在MRAM阵列中形成高性能MTJ的方法。 溅射蚀刻底部导体中的Ta / Ru覆盖层以去除Ru层并形成无定形Ta覆盖层。 一个关键的特征是在瞬态真空室中Ta覆盖层的后续表面处理，其中发生自退火并且在Ta表面上形成表面活性剂层。 所得到的平滑且平坦的Ta表面促进在表面活性剂层上随后形成的MTJ层中的光滑和平坦的表面。 对于0.3×0.6微米的MTJ位尺寸，35至40埃厚的NiFe（18％）自由层，由9至10埃厚的Al层的ROX氧化产生的AlO x势垒层，以及Ru / Ta / 使用Ru覆盖层得到大于40％的dR / R和约4000欧姆 - 姆2的RA。

公开(公告)号：US07047625B2

公开(公告)日：2006-05-23

申请号：US10647762

申请日：2003-08-25

申请人： Cherng-Chyi Han ,  Mao-Min Chen ,  Po Kang Wang

发明人： Cherng-Chyi Han ,  Mao-Min Chen ,  Po Kang Wang

IPC分类号： G11B5/127 ,  H04R31/00

CPC分类号： G11B5/295 ,  G11B5/11 ,  G11B5/17 ,  G11B5/1871 ,  Y10T29/49002 ,  Y10T29/49021 ,  Y10T29/49041 ,  Y10T29/49044 ,  Y10T29/49046 ,  Y10T29/49048 ,  Y10T29/49052

摘要： Present processes used for planarizing a cavity filled with a coil and hard baked photoresist require that a significant amount of the thickness of the coils be removed. This increases the DC resistance of the coil. In the present invention, cavity and coil are overfilled with photoresist which is then hard baked. A layer of alumina is then deposited onto the surface of the excess photoresist, following which CMP is initiated. The presence of the alumina serves to stabilize the photoresist so that it does not delaminate. CMP is terminated as soon as the coils are exposed, allowing their full thickness to be retained and resulting in minimum DC resistance.

摘要翻译： 用于平坦化填充有线圈和硬烘烤光致抗蚀剂的空腔的现有方法需要去除大量的线圈厚度。 这增加了线圈的直流电阻。 在本发明中，腔和线圈被光致抗蚀剂过度填充，然后被硬烘烤。 然后将一层氧化铝沉积到多余光致抗蚀剂的表面上，随后开始CMP。 氧化铝的存在用于使光致抗蚀剂稳定，使其不分层。 一旦线圈被暴露，CMP就被终止，允许其保持其全部厚度并导致最小的直流电阻。

公开(公告)号：US07022383B2

公开(公告)日：2006-04-04

申请号：US10277477

申请日：2002-10-22

申请人： Yun-Fei Li ,  Hui-Chuan Wang ,  Chyu-Jiuh Torng ,  Cherng-Chyi Han ,  Mao-Min Chen

发明人： Yun-Fei Li ,  Hui-Chuan Wang ,  Chyu-Jiuh Torng ,  Cherng-Chyi Han ,  Mao-Min Chen

IPC分类号： B05D3/06 ,  G11B5/127

CPC分类号： B82Y25/00 ,  B82Y10/00 ,  G11B5/3163 ,  G11B5/3903 ,  G11B5/3932 ,  G11B2005/3996 ,  Y10T29/49044 ,  Y10T29/49046 ,  Y10T29/49048 ,  Y10T29/49052

摘要： Although it is known that exchange bias can be utilized in abutted junctions for longitudinal stabilization, a relatively large moment is needed to pin down the sensor edges effectively. Due to the inverse dependence of the exchange bias on the magnetic layer thickness, a large exchange bias has been difficult to achieve by the prior art. This problem has been solved by introducing a structure in which the magnetic moment of the bias layer has been approximately doubled by pinning it from both above and below through exchange with antiferromagnetic layers. Additionally, since the antiferromagnetic layer is in direct abutted contact with the free layer, it acts directly to help stabilize the sensor edge, which is an advantage over the traditional magnetostatic pinning that had been used.

公开(公告)号：US20050254293A1

公开(公告)日：2005-11-17

申请号：US10844171

申请日：2004-05-12

申请人： Cheng Horng ,  Mao-Min Chen ,  Liubo Hong ,  Ru-Ying Tong

发明人： Cheng Horng ,  Mao-Min Chen ,  Liubo Hong ,  Ru-Ying Tong

IPC分类号： G11C11/00 ,  H01L43/08 ,  H01L43/12

CPC分类号： H01L43/12 ,  H01L43/08 ,  Y10S977/934 ,  Y10S977/935

摘要： An MTJ (magnetic tunneling junction) MRAM (magnetic random access memory) cell is formed on a conducting lead and magnetic keeper layer that is capped by a sputter-etched Ta layer. The Ta layer has a smooth surface as a result of the sputter-etching and that smooth surface promotes the subsequent formation of a lower electrode (pinning/pinned layer) with smooth, flat layers and a radical oxidized (ROX) Al tunneling barrier layer which is ultra-thin, smooth, and to has a high breakdown voltage. A seed layer of NiCr is formed on the sputter-etched layer of Ta. The resulting device has generally improved performance characteristics in terms of its switching characteristics, GMR ratio and junction resistance.

摘要翻译： 在由溅射蚀刻的Ta层覆盖的导电引线和磁保持层上形成MTJ（磁性隧道结）MRAM（磁性随机存取存储器）单元。 作为溅射蚀刻的结果，Ta层具有光滑的表面，并且光滑的表面促进随后形成具有光滑的平坦层和自由基氧化（ROX）Al隧穿势垒层的下电极（钉扎/钉扎层），其中 具有超薄，光滑，且具有较高的击穿电压。 在Ta的溅射蚀刻层上形成NiCr种子层。 在其开关特性，GMR比和结电阻方面，所得到的器件通常具有改进的性能特性。