公开(公告)号：US10511143B2

公开(公告)日：2019-12-17

申请号：US15692136

申请日：2017-08-31

Applicant: GLOBALFOUNDRIES Inc.

Inventor： John J. Ellis-Monaghan ,  Sebastian Ventrone ,  Vibhor Jain ,  Yves Ngu

IPC: H01S5/00 ,  H01S5/062 ,  H01S5/022 ,  H01S5/026 ,  H01S5/183 ,  H01S5/223 ,  H01S5/22

Abstract: Structures for integrated lasers, systems including integrated lasers, and associated fabrication methods. A ring waveguide and a seed region are arranged interior of the ring waveguide. A laser strip extends across a portion of the ring waveguide. The laser strip has an end contacting the seed region and another opposing end. The laser strip includes a laser medium and a p-n junction capable of generating electromagnetic radiation. The p-n junction of the laser strip is aligned with a portion of the ring waveguide.

公开(公告)号：US10509244B1

公开(公告)日：2019-12-17

申请号：US16216027

申请日：2018-12-11

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Steven M. Shank ,  Anthony K. Stamper ,  John J. Ellis-Monaghan ,  Vibhor Jain ,  John J. Pekarik

IPC: G02F1/01

Abstract: Structures for an optical switch, structures for an optical router, and methods of fabricating a structure for an optical switch. A phase change layer is arranged proximate to a waveguide core, and a heater is formed proximate to the phase change layer. The phase change layer is composed of a phase change material having a first state with a first refractive index at a first temperature and a second state with a second refractive index at a second temperature. The heater is configured to selectively transfer heat to the phase change layer for transitioning between the first state and the second state.

公开(公告)号：US10469041B2

公开(公告)日：2019-11-05

申请号：US15886475

申请日：2018-02-01

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Anthony Kendall Stamper ,  Vibhor Jain ,  Humberto Campanella Pineda ,  John Joseph Pekarik

IPC: H01L27/06 ,  H03F3/21 ,  H01L21/304 ,  H01L21/8238 ,  H01L27/02 ,  H01L21/762 ,  H01L21/02

Abstract: A method of forming a CMOS device and a GaN PA structure on a 100 Si substrate having a surface orientated in 111 direction and the resulting device are provided. Embodiments include forming a device with a protective layer over a portion of a Si substrate; forming a V-shaped groove in the Si substrate; forming a buffer layer, a GaN layer, an AlGaN layer and a passivation layer sequentially over the Si substrate; forming trenches through the passivation and the AlGaN layers; forming second trenches through the passivation layer; forming electrode structures over portions of the passivation layer and filling the first and second trenches; removing portions of the passivation layer, the AlGaN layer and the GaN layer outside of the V-shaped groove down to the buffer layer; forming a dielectric layer over the Si substrate; and forming vias through the dielectric layer down to electrode structures and the device.

公开(公告)号：US20190237568A1

公开(公告)日：2019-08-01

申请号：US15882053

申请日：2018-01-29

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Rahul Mishra ,  Vibhor Jain ,  Ajay Raman ,  Robert J. Gauthier

IPC: H01L29/749 ,  H01L29/66 ,  H01L29/74

Abstract: Fabrication methods and device structures for a silicon controlled rectifier. A cathode is arranged over a top surface of a substrate and a well is arranged beneath the top surface of the substrate. The cathode is composed of a semiconductor material having a first conductivity type, and the well also has the first conductivity type. A semiconductor layer, which has a second conductivity type opposite to the first conductivity type, includes a section over the top surface of the substrate. The section of the semiconductor layer is arranged to form an anode that adjoins the well along a junction.

公开(公告)号：US20190035919A1

公开(公告)日：2019-01-31

申请号：US15664418

申请日：2017-07-31

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Vibhor Jain ,  Alvin J. Joseph ,  Qizhi Liu

IPC: H01L29/737 ,  H01L29/08 ,  H01L29/06 ,  H01L27/12 ,  H01L23/535 ,  H01L29/165 ,  H01L21/84 ,  H01L29/66 ,  H01L21/768 ,  H01L21/02

CPC classification number: H01L29/7378 ,  H01L21/02532 ,  H01L21/76895 ,  H01L21/84 ,  H01L23/535 ,  H01L27/1203 ,  H01L29/0649 ,  H01L29/0817 ,  H01L29/0821 ,  H01L29/165 ,  H01L29/66242

Abstract: Fabrication methods and device structures for heterojunction bipolar transistors. A first emitter of a first heterojunction bipolar transistor and a second collector of a second heterojunction bipolar transistor are formed in a device layer of a silicon-on-insulator substrate. A first base layer of a first heterojunction bipolar transistor is epitaxially grown on the device layer with an intrinsic base portion arranged on the first emitter. A first collector of the first heterojunction bipolar transistor is epitaxially grown on the intrinsic base portion of the first base layer. A second base layer of the second heterojunction bipolar transistor is epitaxially grown on the device layer with an intrinsic base portion arranged on the second collector. A second emitter of the second heterojunction bipolar transistor is epitaxially grown on the intrinsic base portion of the second base layer. A connection is formed between the first emitter and the second collector.

公开(公告)号：US10153361B2

公开(公告)日：2018-12-11

申请号：US15360295

申请日：2016-11-23

Applicant: GLOBALFOUNDRIES INC.

Inventor： Renata A. Camillo-Castillo ,  Vibhor Jain ,  Qizhi Liu ,  Anthony K. Stamper

IPC: H01L29/737 ,  H01L21/8222 ,  H01L21/02 ,  H01L21/268 ,  H01L21/324 ,  H01L27/082 ,  H01L29/04 ,  H01L29/06 ,  H01L29/16 ,  H01L29/161 ,  H01L29/167 ,  H01L29/66 ,  H03F3/21

Abstract: The present disclosure generally relates to semiconductor structures and, more particularly, to heterojunction bipolar transistor device integration schemes on a same wafer and methods of manufacture. The structure includes: a power amplifier (PA) device comprising a base, a collector and an emitter on a wafer; and a low-noise amplifier (LNA) device comprising a base, a collector and an emitter on the wafer, with the emitter having a same crystalline structure as the base.

公开(公告)号：US20180240897A1

公开(公告)日：2018-08-23

申请号：US15437168

申请日：2017-02-20

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Qizhi Liu ,  Vibhor Jain ,  John J. Pekarik

IPC: H01L29/737 ,  H01L29/10 ,  H01L29/08 ,  H01L29/66 ,  H01L21/306 ,  H01L21/265 ,  H01L29/165

CPC classification number: H01L29/7375 ,  H01L29/165 ,  H01L29/66242

Abstract: Device structures and fabrication methods for a heterojunction bipolar transistor. A collector of the device structure has a top surface and a sidewall that is inclined relative to the top surface. The device structure further includes an emitter, an intrinsic base that has a first thickness, and an extrinsic base coupled with the intrinsic base. The extrinsic base has a lateral arrangement relative to the intrinsic base and relative to the emitter. The intrinsic base has a vertical arrangement between the emitter and the top surface of the collector. The sidewall of the collector extends laterally to undercut the extrinsic base. The extrinsic base has a second thickness that is greater than a first thickness of the intrinsic base.

公开(公告)号：US09899375B1

公开(公告)日：2018-02-20

申请号：US15226575

申请日：2016-08-02

Applicant: GLOBALFOUNDRIES INC.

Inventor： Vibhor Jain ,  Qizhi Liu

IPC: H01L29/737 ,  H01L27/082 ,  H01L23/66 ,  H01L29/165 ,  H01L21/8222 ,  H01L29/08 ,  H01L29/06 ,  H01L21/3065 ,  H01L21/306 ,  H03F3/195 ,  H03F3/213

CPC classification number: H01L27/0823 ,  H01L21/30625 ,  H01L21/3065 ,  H01L21/8222 ,  H01L23/66 ,  H01L29/0649 ,  H01L29/0817 ,  H01L29/165 ,  H03F3/195 ,  H03F3/213 ,  H03F2200/294

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to co-integration of self-aligned and non-self aligned heterojunction bipolar transistors and methods of manufacture. The structure includes at least two heterojunction bipolar transistor (HBT) devices integrated onto a same wafer with different epitaxial base profiles. An intrinsic base epitaxy for a second device of the at least two HBT devices acts as an extrinsic base for a first device of the at least two HBT devices.

公开(公告)号：US20180040611A1

公开(公告)日：2018-02-08

申请号：US15226575

申请日：2016-08-02

Applicant: GLOBALFOUNDRIES INC.

Inventor： Vibhor Jain ,  Qizhi Liu

IPC: H01L27/082 ,  H01L29/165 ,  H01L21/8222 ,  H03F3/213 ,  H01L29/06 ,  H01L21/3065 ,  H01L21/306 ,  H03F3/195 ,  H01L23/66 ,  H01L29/08

CPC classification number: H01L27/0823 ,  H01L21/30625 ,  H01L21/3065 ,  H01L21/8222 ,  H01L23/66 ,  H01L29/0649 ,  H01L29/0817 ,  H01L29/165 ,  H03F3/195 ,  H03F3/213 ,  H03F2200/294

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to co-integration of self-aligned and non-self aligned heterojunction bipolar transistors and methods of manufacture. The structure includes at least two heterojunction bipolar transistor (HBT) devices integrated onto a same wafer with different epitaxial base profiles. An intrinsic base epitaxy for a second device of the at least two HBT devices acts as an extrinsic base for a first device of the at least two HBT devices.

公开(公告)号：US09728603B2

公开(公告)日：2017-08-08

申请号：US14745764

申请日：2015-06-22

Applicant: GLOBALFOUNDRIES INC.

Inventor： Hanyi Ding ,  Vibhor Jain ,  Alvin J. Joseph ,  Anthony K. Stamper

IPC: H01L29/00 ,  H01L29/08 ,  H01L29/73 ,  H01L29/66 ,  H01L29/737 ,  H01L29/06

CPC classification number: H01L29/0813 ,  H01L29/0649 ,  H01L29/0821 ,  H01L29/66234 ,  H01L29/66242 ,  H01L29/73 ,  H01L29/7371 ,  H01L29/7378

Abstract: Device structures for a bipolar junction transistor and methods of fabricating a device structure for a bipolar junction transistor. A base layer comprised of a first semiconductor material is formed. An emitter layer comprised of a second semiconductor material is formed on the base layer. The emitter layer is patterned to form an emitter finger having a length and a width that changes along the length of the emitter finger.