公开(公告)号：US20240330726A1

公开(公告)日：2024-10-03

申请号：US18740726

申请日：2024-06-12

Applicant: Intel Corporation

Inventor： Florian Luethi ,  Hubert C. George ,  Felix Frederic Leonhard Borjans ,  Simon Schaal ,  Lester Lampert ,  Thomas Francis Watson ,  Jeanette M. Roberts ,  Jong Seok Park ,  Sushil Subramanian ,  Stefano Pellerano

IPC: G06N10/00 ,  H01L29/12

CPC classification number: G06N10/00 ,  H01L29/12

Abstract: An array of quantum dot qubits (e.g., an array of spin qubits) relies on a gradient magnetic field to ensure that the qubits are separated in frequency in order to be individually addressable. Furthermore, a strong magnetic field gradient is required to electrically drive the electric dipole spin resonance (EDSR) of the qubits. Quantum dot devices disclosed herein use microcoil arrangements for providing a gradient magnetic field, the microcoil arrangements integrated on the same chip (e.g., on the same die or wafer) as quantum dot qubits themselves. Unlike previous approaches to quantum dot formation and manipulation, various embodiments of the quantum dot devices disclosed herein may enable improved control over magnetic fields and their gradients to realize better frequency targeting of individual qubits, help minimize adverse effects of charge noise on qubit decoherence and provide good scalability in the number of quantum dots included in the device.

公开(公告)号：US11955965B1

公开(公告)日：2024-04-09

申请号：US17827590

申请日：2022-05-27

Applicant: Intel Corporation

Inventor： Sushil Subramanian ,  Stefano Pellerano ,  Todor Mladenov ,  JongSeok Park ,  Bishnu Prasad Patra

IPC: H03K17/693 ,  G06N10/40 ,  H03K17/687

CPC classification number: H03K17/693 ,  G06N10/40 ,  H03K17/6874

Abstract: Technologies for a high-voltage transmission gate are disclosed. In the illustrative embodiment, a companion chip is connected to a quantum processor. The companion chip provides voltages to gates of qubits on the quantum processor. The companion chip includes one or more high-voltage transmission gates that can be used to charge capacitors linked to gates of qubits on the quantum processor. The transmission gate includes transistors with a breakdown voltage less than a range of input and output voltages of the transmission gate. Control circuitry on the companion chip controls the voltages applied to transistors of the transmission gate to ensure that the voltage differences across the terminals of each transistor is below a breakdown voltage.

公开(公告)号：US11923809B2

公开(公告)日：2024-03-05

申请号：US17821200

申请日：2022-08-22

Applicant: Intel Corporation

Inventor： Jong Seok Park ,  Yanjie Wang ,  Stefano Pellerano ,  Christopher D. Hull

IPC: H03F1/32 ,  H03F1/02 ,  H03F1/22 ,  H03F1/56 ,  H03F3/189 ,  H03F3/193 ,  H03F3/21 ,  H03F3/24 ,  H03F3/45 ,  H03F3/68 ,  H03F3/72 ,  H04B1/04 ,  H04L27/34

CPC classification number: H03F1/3205 ,  H03F1/0261 ,  H03F1/0277 ,  H03F1/223 ,  H03F1/565 ,  H03F3/189 ,  H03F3/193 ,  H03F3/211 ,  H03F3/24 ,  H03F3/245 ,  H03F3/45188 ,  H03F3/68 ,  H03F3/72 ,  H04B1/04 ,  H04L27/34 ,  H03F2200/111 ,  H03F2200/162 ,  H03F2200/18 ,  H03F2200/387 ,  H03F2200/423 ,  H03F2200/429 ,  H03F2200/451 ,  H03F2200/541 ,  H03F2201/3203 ,  H03F2203/21139 ,  H03F2203/21142 ,  H03F2203/21178 ,  H03F2203/7206 ,  H03F2203/7209 ,  H03F2203/7236 ,  H04B2001/0408

Abstract: A communication device includes a power amplifier that generates power signals according to one or more operating bands of communication data, with the amplitude being driven and generated in output stages of the power amplifier. The final stage can include an output passive network that suppresses suppress an amplitude modulation-to-phase modulation (AM-PM) distortion. During a back-off power mode a bias of a capacitive unit of the output power network component can be adjusted to minimize an overall capacitance variation. An output passive network can further generate a flat-phase response between dual resonances of operation.

公开(公告)号：US20230291433A1

公开(公告)日：2023-09-14

申请号：US18040230

申请日：2021-06-25

Applicant: Intel Corporation

Inventor： Ofer Benjamin ,  Eli Borokhovich ,  Brent Carlton ,  Ofir Degani ,  Ronen Kronfeld ,  Stefano Pellerano ,  Mustafijur Rahman ,  Ehud Reshef ,  Sarit Zur

IPC: H04B1/525 ,  H04B1/10

CPC classification number: H04B1/525 ,  H04B1/1036

Abstract: A transceiver may include a transmit path and a receive path that are each coupled to a radio frequency (RF) interface, and a self-interference canceller (SIC). The SIC is coupled between the transmit and the receive paths. The SIC is configured to cancel a self-interference signal from a received signal on the receive path based on a transmit signal on the transmit path.

公开(公告)号：US20220393913A1

公开(公告)日：2022-12-08

申请号：US17642118

申请日：2019-12-26

Applicant: Intel Corporation

Inventor： Oner Orhan ,  Hosein Nikopour ,  Mehnaz Rahman ,  Ivan Simoes Gaspar ,  Shilpa Talwar ,  Stefano Pellerano ,  Claudio Da Silva ,  Namyoon Lee ,  Yo Seb Jeon ,  Eren Sasoglu

IPC: H04L25/03 ,  H04B1/12

Abstract: Millimeter-wave (mmWave) and sub-mmWave technology, apparatuses, and methods that relate to transceivers and receivers for wireless communications are described. The various aspects include an apparatus of a communication device including one or more antennas configured to receive an RF signal and an ADC system. The ADC system includes a 1-bit ADC configured to receive the RF signal, and an ADC controller circuitry configured to measure a number of positive samples in the received RF signal for a plurality of thresholds of the 1-bit ADC, estimate receive signal power associated with the received RF signal based on the measured number of positive samples, determine a direct current(DC) offset in the received RF signal using the estimated received signal power, and adjust the received RF signal based on the determined DC offset.

公开(公告)号：US20220391738A1

公开(公告)日：2022-12-08

申请号：US17340173

申请日：2021-06-07

Applicant: Intel Corporation

Inventor： Sushil Subramanian ,  Stefano Pellerano ,  Ravi Pillarisetty ,  Jong Seok Park ,  Todor M. Mladenov

IPC: G06N10/00 ,  H03M1/66

Abstract: Quantum circuit assemblies that employ active pulse shaping in order to be able to control states of a plurality of qubits with signal pulses propagated over a shared signal propagation channel are disclosed. An example quantum circuit assembly includes a quantum circuit component that includes a first qubit, associated with a first frequency to control the state of the first qubit, and a second qubit, associated with a second frequency to control the state of the second qubit. A shared transmission channel is coupled to the first and second qubits. The assembly further includes a signal pulse generation circuit, configured to generate a signal pulse to be propagated over the shared transmission channel to control the state of the first qubit, where the signal pulse has a center frequency at the first frequency, a bandwidth that includes the second frequency, and a notch at the second frequency.

公开(公告)号：US11424722B2

公开(公告)日：2022-08-23

申请号：US17000473

申请日：2020-08-24

Applicant: Intel Corporation

Inventor： Jong Seok Park ,  Yanjie Wang ,  Stefano Pellerano ,  Christopher D. Hull

IPC: H03F1/32 ,  H03F1/22 ,  H03F3/189 ,  H03F3/45 ,  H03F3/72 ,  H03F3/24 ,  H03F1/56 ,  H03F3/193 ,  H03F3/21 ,  H03F3/68 ,  H04B1/04 ,  H03F1/02 ,  H04L27/34

Abstract: A communication device includes a power amplifier that generates power signals according to one or more operating bands of communication data, with the amplitude being driven and generated in output stages of the power amplifier. The final stage can include an output passive network that suppresses suppress an amplitude modulation-to-phase modulation (AM-PM) distortion. During a back-off power mode a bias of a capacitive unit of the output power network component can be adjusted to minimize an overall capacitance variation. A output passive network can further generate a flat-phase response between dual resonances of operation.

公开(公告)号：US20220200532A1

公开(公告)日：2022-06-23

申请号：US17129483

申请日：2020-12-21

Applicant: Intel Corporation

Inventor： Abhishek Agrawal ,  Stefano Pellerano ,  Christopher Hull

IPC: H03D7/14 ,  H03D7/16 ,  H03B19/14 ,  H03L7/099

Abstract: A biasing scheme for a frequency multiplication circuit, and transceiver using LO signals provided by the frequency multiplication circuit are described. A frequency doubler is cascaded with a mixer to provide a mm-wave oscillator signal. The combination provides a frequency triple that of the LO frequency supplied to the frequency doubler from a PLL. A small-sized replica of the frequency doubler is used to determine biasing of transconductance devices of the frequency doubler. A voltage output of the replica is amplified and the difference between the output and a reference voltage is supplied as feedback to the control terminal of the transconductance devices to bias the transconductance devices to near threshold. The biasing is replicated at the frequency doubler to compensate for PVT variations. A PTAT current source tied to the output of the replica regulates an average output current of the frequency multiplication circuit.

公开(公告)号：US11218183B2

公开(公告)日：2022-01-04

申请号：US16931462

申请日：2020-07-17

Applicant: Intel Corporation

Inventor： Steven Callender ,  Christopher Hull ,  Stefano Pellerano ,  Woorim Shin ,  Ka Chun Kwok

IPC: H04B1/48 ,  H03F1/56 ,  H03F3/21 ,  H03H7/38

Abstract: A transmit receive switch (TRSW) system is disclosed. The system has a transmission line, a transformer based matching network, a shunt switch, an amplifier and circuitry. The transmission line is connected to an antenna port. The transformer based matching network is connected to the transmission line and has a first coil and a second coil, wherein the second coil is connected to the transmission line. The amplifier can be configured as a shunt switch when inactive. The shunt switch, including the amplifier configured as the shunt switch, can be connected to the first coil of the transformer based matching network. The circuitry is configured to cause the shunt switch to be ON during an inactive mode and create a short across the first coil. Combined, the length of transmission line needed to complete the impedance transformation is reduced, thereby lowering the overall insertion loss of the transmit/receive switch.

公开(公告)号：US20210364619A1

公开(公告)日：2021-11-25

申请号：US17326133

申请日：2021-05-20

Applicant: Intel Corporation

Inventor： Naftali Landsberg ,  Woorim Shin ,  Dan Ohev Zion ,  Meir Gordon ,  Omer Asaf ,  Danniel Nahmanny ,  Mustafijur Rahman ,  Stefano Pellerano

IPC: G01S13/34 ,  H04B1/04 ,  G01S13/88

Abstract: Some demonstrative aspects include radar apparatuses, devices, systems and methods. In one example, an apparatus may include a plurality of Transmit (Tx) chains to transmit radar Tx signals, and a plurality of Receive (Rx) chains to process radar Rx signals. For example, the radar Rx signals may be based on the radar Tx signals. The apparatus may be implemented, for example, as part of a radar device, for example, as part of a vehicle including the radar device. In other aspects, the apparatus may include any other additional or alternative elements and/or may be implemented as part of any other device.