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公开(公告)号:US08060797B2
公开(公告)日:2011-11-15
申请号:US12529282
申请日:2008-09-22
申请人: Toshikatsu Hida , Shinichi Kanno , Hirokuni Yano , Kazuya Kitsunai , Shigehiro Asano , Junji Yano
发明人: Toshikatsu Hida , Shinichi Kanno , Hirokuni Yano , Kazuya Kitsunai , Shigehiro Asano , Junji Yano
IPC分类号: G06F11/00
CPC分类号: G06F11/1412 , G06F11/1068 , G06F11/1402 , G06F12/02 , G11C16/0483 , G11C16/3418 , G11C16/3431
摘要: A semiconductor storage device can efficiently perform a refresh operation. A semiconductor storage device is provided which includes a non-volatile semiconductor memory storing data in blocks, the block being a unit of data erasing. A controlling unit is further included monitoring an error count of data stored in a monitored block selected from the blocks and for refreshing data in the monitored block in which the error count is equal to or larger than a threshold value.
摘要翻译: 半导体存储装置可以有效地执行刷新操作。 提供一种半导体存储装置,其包括以块为单位存储数据的非易失性半导体存储器,该块是数据擦除的单位。 还包括控制单元,用于监视存储在从块中选择的监视块中的数据的错误计数,以及用于刷新其中错误计数等于或大于阈值的监视块中的数据。
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公开(公告)号:US08015347B2
公开(公告)日:2011-09-06
申请号:US12552422
申请日:2009-09-02
申请人: Kazuya Kitsunai , Shinichi Kanno , Hirokuni Yano , Toshikatsu Hida , Junji Yano
发明人: Kazuya Kitsunai , Shinichi Kanno , Hirokuni Yano , Toshikatsu Hida , Junji Yano
IPC分类号: G06F13/00
CPC分类号: G06F3/0604 , G06F3/0616 , G06F3/0619 , G06F3/064 , G06F3/0647 , G06F3/0652 , G06F3/0659 , G06F3/0679 , G06F3/0685 , G06F12/0246 , G06F2212/1036 , G06F2212/7202 , G06F2212/7205 , G06F2212/7211
摘要: A memory system includes a nonvolatile memory including a plurality of blocks as data erase units, a measuring unit which measures an erase time at which data of each block is erased, and a block controller which writes data supplied from at least an exterior into a first block which is set in a free state and whose erase time is oldest.
摘要翻译: 存储器系统包括包括作为数据擦除单元的多个块的非易失性存储器,测量擦除每个块的数据的擦除时间的测量单元,以及写入从至少外部提供的数据到第一 块设置为空闲状态,擦除时间最长。
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公开(公告)号:US20100049907A1
公开(公告)日:2010-02-25
申请号:US12552422
申请日:2009-09-02
申请人: Kazuya Kitsunai , Shinichi Kanno , Hirokuni Yano , Toshikatsu Hida , Junji Yano
发明人: Kazuya Kitsunai , Shinichi Kanno , Hirokuni Yano , Toshikatsu Hida , Junji Yano
IPC分类号: G06F12/02
CPC分类号: G06F3/0604 , G06F3/0616 , G06F3/0619 , G06F3/064 , G06F3/0647 , G06F3/0652 , G06F3/0659 , G06F3/0679 , G06F3/0685 , G06F12/0246 , G06F2212/1036 , G06F2212/7202 , G06F2212/7205 , G06F2212/7211
摘要: A memory system includes a nonvolatile memory including a plurality of blocks as data erase units, a measuring unit which measures an erase time at which data of each block is erased, and a block controller which writes data supplied from at least an exterior into a first block which is set in a free state and whose erase time is oldest.
摘要翻译: 存储器系统包括包括作为数据擦除单元的多个块的非易失性存储器,测量擦除每个块的数据的擦除时间的测量单元,以及写入从至少外部提供的数据到第一 块设置为空闲状态,擦除时间最长。
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公开(公告)号:US08886868B2
公开(公告)日:2014-11-11
申请号:US12778484
申请日:2010-05-12
申请人: Kazuya Kitsunai , Shinichi Kanno , Hirokuni Yano , Toshikatsu Hida , Junji Yano
发明人: Kazuya Kitsunai , Shinichi Kanno , Hirokuni Yano , Toshikatsu Hida , Junji Yano
CPC分类号: G06F3/0604 , G06F3/0616 , G06F3/0619 , G06F3/064 , G06F3/0647 , G06F3/0652 , G06F3/0659 , G06F3/0679 , G06F3/0685 , G06F12/0246 , G06F2212/1036 , G06F2212/7202 , G06F2212/7205 , G06F2212/7211
摘要: A memory system includes a nonvolatile memory including a plurality of blocks as data erase units, a measuring unit which measures an erase time at which data of each block is erased, and a block controller which writes data supplied from at least an exterior into a first block which is set in a free state and whose erase time is oldest.
摘要翻译: 存储器系统包括包括作为数据擦除单元的多个块的非易失性存储器,测量擦除每个块的数据的擦除时间的测量单元,以及写入从至少外部提供的数据到第一 块设置为空闲状态,擦除时间最长。
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公开(公告)号:US20110219177A1
公开(公告)日:2011-09-08
申请号:US13107623
申请日:2011-05-13
申请人: Shinichi Kanno , Hirokuni Yano , Toshikatsu Hida , Kazuya Kitsunai , Junji Yano
发明人: Shinichi Kanno , Hirokuni Yano , Toshikatsu Hida , Kazuya Kitsunai , Junji Yano
IPC分类号: G06F12/06
CPC分类号: G11C16/349 , G06F11/1068 , G06F12/0246 , G06F2212/7211 , G11C16/16 , G11C29/52 , G11C29/76
摘要: A memory system includes a nonvolatile memory including blocks as data erase units, a measuring unit which measures an erase time at which data in each block is erased, a block controller having a block table which associates a state value indicating one of a free state and a used state with the erase time for each block, a detector which detects blocks in which rewrite has collectively occurred within a short period, a first selector which selects a free block having an old erase time as a first block, a second selector which selects a block in use having an old erase time as a second block, and a leveling unit which moves data in the second block to the first block if the first block is included in the blocks detected by the detector.
摘要翻译: 一种存储器系统,包括:包括作为数据擦除单元的块的非易失性存储器,测量擦除每个块中的数据的擦除时间的测量单元;具有块表的块控制器,其将指示空闲状态之一的状态值和 具有每个块的擦除时间的使用状态,检测在短时间内共同发生重写的块的检测器,选择具有旧擦除时间的空闲块作为第一块的第一选择器,选择 如果第一块被包括在由检测器检测到的块中,则将具有旧擦除时间的块用作第二块;以及调平单元,其将第二块中的数据移动到第一块。
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公开(公告)号:US07949910B2
公开(公告)日:2011-05-24
申请号:US12705431
申请日:2010-02-12
申请人: Shinichi Kanno , Hirokuni Yano , Toshikatsu Hida , Kazuya Kitsunai , Junji Yano
发明人: Shinichi Kanno , Hirokuni Yano , Toshikatsu Hida , Kazuya Kitsunai , Junji Yano
CPC分类号: G11C16/349 , G06F11/1068 , G06F12/0246 , G06F2212/7211 , G11C16/16 , G11C29/76
摘要: A memory system includes a nonvolatile memory including blocks as data erase units, a measuring unit which measures an erase time at which data in each block is erased, a block controller having a block table which associates a state value indicating one of a free state and a used state with the erase time for each block, a detector which detects blocks in which rewrite has collectively occurred within a short period, a first selector which selects a free block having an old erase time as a first block, a second selector which selects a block in use having an old erase time as a second block, and a leveling unit which moves data in the second block to the first block if the first block is included in the blocks detected by the detector.
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公开(公告)号:US20110238913A1
公开(公告)日:2011-09-29
申请号:US13157011
申请日:2011-06-09
申请人: Takehiko Kurashige , Junji Yano
发明人: Takehiko Kurashige , Junji Yano
IPC分类号: G06F12/00
CPC分类号: G06F3/0659 , G06F3/0605 , G06F3/0689
摘要: According to one embodiment, a disk array control device manages a plurality of drives as a single logical drive. The disk array control device includes a first register configured to store a to-be-accessed drive number which is designated by a host, and a control module. The control module is configured to receive a command from the host, determine whether the received command is a predetermined command which is used for maintenance of each of the drives, and execute, in a case where the received command is the predetermined command, a pass-through process of sending the received command to the drive which is designated by the to-be-accessed drive number in the first register.
摘要翻译: 根据一个实施例,磁盘阵列控制装置将多个驱动器管理为单个逻辑驱动器。 磁盘阵列控制装置包括被配置为存储由主机指定的要访问的驱动器号的第一寄存器和控制模块。 控制模块被配置为从主机接收命令,确定所接收的命令是否是用于维护每个驱动器的预定命令,并且在接收到的命令是预定命令的情况下执行通过 通过将接收到的命令发送到由第一寄存器中的被访问驱动器号指定的驱动器。
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公开(公告)号:US08433882B2
公开(公告)日:2013-04-30
申请号:US13157011
申请日:2011-06-09
申请人: Takehiko Kurashige , Junji Yano
发明人: Takehiko Kurashige , Junji Yano
IPC分类号: G06F12/00
CPC分类号: G06F3/0659 , G06F3/0605 , G06F3/0689
摘要: According to one embodiment, a disk array control device manages a plurality of drives as a single logical drive. The disk array control device includes a first register configured to store a to-be-accessed drive number which is designated by a host, and a control module. The control module is configured to receive a command from the host, determine whether the received command is a predetermined command which is used for maintenance of each of the drives, and execute, in a case where the received command is the predetermined command, a pass-through process of sending the received command to the drive which is designated by the to-be-accessed drive number in the first register.
摘要翻译: 根据一个实施例,磁盘阵列控制装置将多个驱动器管理为单个逻辑驱动器。 磁盘阵列控制装置包括被配置为存储由主机指定的要访问的驱动器号的第一寄存器和控制模块。 控制模块被配置为从主机接收命令,确定所接收的命令是否是用于维护每个驱动器的预定命令,并且在接收到的命令是预定命令的情况下执行通过 通过将接收到的命令发送到由第一寄存器中的被访问驱动器号指定的驱动器。
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公开(公告)号:US20100106905A1
公开(公告)日:2010-04-29
申请号:US12485686
申请日:2009-06-16
申请人: Takehiko Kurashige , Junji Yano
发明人: Takehiko Kurashige , Junji Yano
IPC分类号: G06F12/00
CPC分类号: G06F3/0659 , G06F3/0605 , G06F3/0689
摘要: According to one embodiment, a disk array control device manages a plurality of drives as a single logical drive. The disk array control device includes a first register configured to store a to-he-accessed drive number which is designated by a host, and a control module. The control module is configured to receive a command from the host, determine whether the received command is a predetermined command which is used for maintenance of each of the drives, and execute, in a case where the received command is the predetermined command, a pass-through process of sending the received command to the drive which is designated by the to-be-accessed drive number in the first register.
摘要翻译: 根据一个实施例,磁盘阵列控制装置将多个驱动器管理为单个逻辑驱动器。 磁盘阵列控制装置包括配置成存储由主机指定的由他访问的驱动器号码的第一寄存器和控制模块。 控制模块被配置为从主机接收命令,确定所接收的命令是否是用于维护每个驱动器的预定命令,并且在接收到的命令是预定命令的情况下执行通过 通过将接收到的命令发送到由第一寄存器中的被访问驱动器号指定的驱动器。
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公开(公告)号:US08611154B2
公开(公告)日:2013-12-17
申请号:US12866668
申请日:2008-09-22
申请人: Shigehiro Asano , Shinichi Kanno , Junji Yano
发明人: Shigehiro Asano , Shinichi Kanno , Junji Yano
IPC分类号: G11C11/34
CPC分类号: H01L23/5228 , G06F9/4401 , G11C5/005 , G11C5/04 , G11C5/066 , G11C16/0408 , H01L23/60 , H01L24/48 , H01L25/0657 , H01L2224/05554 , H01L2224/48091 , H01L2224/48145 , H01L2224/48147 , H01L2225/06506 , H01L2225/0651 , H01L2225/06562 , H01L2924/00014 , H01L2924/01046 , H01L2924/01055 , H01L2924/12041 , H01L2924/12042 , H01L2924/14 , H01L2924/19041 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要: On a single semiconductor package PK1, m semiconductor chips CP1 to CPm are mounted, and the semiconductor package PK1 has external terminals T shared by m pad electrodes PD1 to PDm of the m semiconductor chips CP1 to CPm. An electrostatic protection circuit CD is mounted on only one CPm of the m semiconductor chips CP1 to CPm.
摘要翻译: 在单个半导体封装PK1上安装半导体芯片CP1至CPm,并且半导体封装PK1具有由m个半导体芯片CP1至CPm的m个焊盘电极PD1至PDm共享的外部端子T. 静电保护电路CD仅安装在m个半导体芯片CP1至CPm的一个CPm上。
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