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公开(公告)号:US06249138B1
公开(公告)日:2001-06-19
申请号:US09447846
申请日:1999-11-23
申请人: Michael WC Huang , Gwo-Shii Yang , Hsiao-Ling Lu , Wen-Yi Hsieh
发明人: Michael WC Huang , Gwo-Shii Yang , Hsiao-Ling Lu , Wen-Yi Hsieh
IPC分类号: G01R3126
CPC分类号: G01R31/2648
摘要: A method of testing a leakage current caused by a self-aligned silicide process is described. The invention uses different test structure to monitor degree of and reason for a leakage current caused by a self-aligned silicide process. While monitoring a self-aligned silicide process performed on a metal-oxide semiconductor transistor without a LDD region, in addition to considering a leakage current occurring from the metal silicide layer to the junction and occurring at edge of the metal silicide layer, the invention further considers a leakage current at comer of the metal silicide layer. For a metal-oxide semiconductor transistor having a LDD region, the invention further considers a leakage current from the metal silicide layer to the LDD region. The invention monitors a leakage current at comer of the metal silicide layer.
摘要翻译: 描述了由自对准硅化物工艺引起的漏电流的测试方法。 本发明使用不同的测试结构来监测由自对准硅化物工艺引起的漏电流的程度和原因。 在监视对没有LDD区域的金属氧化物半导体晶体管进行的自对准硅化物处理的同时,除了考虑从金属硅化物层发生到结以及在金属硅化物层的边缘处发生的漏电流之外,本发明进一步 考虑在金属硅化物层的角落处的漏电流。 对于具有LDD区域的金属氧化物半导体晶体管,本发明还考虑了从金属硅化物层到LDD区域的漏电流。 本发明监测金属硅化物层的角落处的漏电流。
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公开(公告)号:US06218238B1
公开(公告)日:2001-04-17
申请号:US09172458
申请日:1998-10-14
申请人: Kuo-Tai Huang , Wen-Yi Hsieh , Tri-Rung Yew
发明人: Kuo-Tai Huang , Wen-Yi Hsieh , Tri-Rung Yew
IPC分类号: H01L218242
CPC分类号: H01L28/75 , H01L21/28568 , H01L21/3211 , H01L27/10852 , H01L28/55
摘要: A method of fabricating a DRAM capacitor uses tungsten nitride in the process of forming a capacitor. The structure of the capacitor is simple and the process is easily executed. Furthermore, the invention provides a method of forming tungsten nitride, comprising a step of implanting nitrogen into a tungsten silicide layer and a step of executing a rapid thermal process under ammonia gas to form a tungsten nitride layer on the surface of the tungsten silicide layer. The method of fabricating a DRAM capacitor comprises forming the tungsten silicide layer after forming a part smaller than a bottom electrode of the capacitor from doped polysilicon and forming tungsten nitride on the surface of the tungsten nitride layer.
摘要翻译: 制造DRAM电容器的方法在形成电容器的过程中使用氮化钨。 电容器的结构简单,易于执行。 此外,本发明提供了一种形成氮化钨的方法,包括将氮气注入到硅化钨层中的步骤以及在氨气下执行快速热处理以在硅化钨层的表面上形成氮化钨层的步骤。 制造DRAM电容器的方法包括在从掺杂多晶硅形成小于电容器的底部电极的部分之后形成硅化钨层,并在氮化钨层的表面上形成氮化钨。
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公开(公告)号:US6146941A
公开(公告)日:2000-11-14
申请号:US128221
申请日:1998-08-03
申请人: Kuo-Tai Huang , Wen-Yi Hsieh , Tri-Rung Yew
发明人: Kuo-Tai Huang , Wen-Yi Hsieh , Tri-Rung Yew
IPC分类号: H01L27/108 , H01L21/02 , H01L21/8242 , H01L21/8244 , H01L21/20 , H01L21/44 , H01L21/4763
CPC分类号: H01L27/10852 , H01L28/82
摘要: A fabricating method of a capacitor includes two gates and a commonly used source/drain region formed on a substrate. Then, a process of sell align contact has been applied to make a pitted self align contact window (PSACW) to partly expose the commonly used source/drain region. Then an glue/barrier layer and a lower electrode of the capacitor are formed over the PSACW. Then a dielectric thin film with a material having high dielectric constant is formed over the lower electrode. Then, an upper electrode is formed over the dielectric thin film to complete a capacitor, which has a structure of metal insulator metal with a shape like the PSACW.
摘要翻译: 电容器的制造方法包括形成在基板上的两个栅极和常用的源极/漏极区域。 然后,已经应用了销售对齐接触的过程,以形成凹陷的自对准接触窗口(PSACW)以部分地暴露常用的源极/漏极区域。 然后在PSACW上形成电容器的胶/阻挡层和下电极。 然后在下部电极上形成具有高介电常数的材料的电介质薄膜。 然后,在电介质薄膜的上方形成上部电极,形成电容器,该电容器具有像PSACW的形状的金属绝缘体金属的结构。
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公开(公告)号:US6048788A
公开(公告)日:2000-04-11
申请号:US9333
申请日:1998-01-20
申请人: Hung-Yi Huang , Wen-Yi Hsieh , Chi-Rong Lin , Jenn-Tarng Lin
发明人: Hung-Yi Huang , Wen-Yi Hsieh , Chi-Rong Lin , Jenn-Tarng Lin
IPC分类号: H01L21/768 , H01L21/4763 , H01L21/44
CPC分类号: H01L21/76862 , H01L21/76843 , H01L21/76856
摘要: A method of forming a metal plug. A contact window is formed to penetrate through a dielectric layer on a substrate having a MOS formed thereon. A titanium glue layer is formed on the dielectric layer and the circumference of the contact window. A titanium barrier layer is formed on the titanium nitride layer. Using nitrogen plasma bombardment on the titanium nitride layer, the structure of the titanium nitride layer is transformed. The number of the nucleation seeds is increased, and the size of grains is reduced. A metal layer is formed on the titanium nitride layer and fills the contact window. A part of the metal layer is removed and a metal plug within the contact window is formed.
摘要翻译: 一种形成金属塞的方法。 形成接触窗口,以穿透其上形成有MOS的基板上的电介质层。 在介电层和接触窗的圆周上形成钛胶层。 在氮化钛层上形成钛阻挡层。 在氮化钛层上使用氮等离子体轰击,转变了氮化钛层的结构。 成核种子的数量增加,晶粒尺寸减小。 在氮化钛层上形成金属层,并填充接触窗。 去除金属层的一部分并形成接触窗内的金属塞。
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公开(公告)号:US08437586B2
公开(公告)日:2013-05-07
申请号:US13015232
申请日:2011-01-27
申请人: Wen-Yi Hsieh
发明人: Wen-Yi Hsieh
IPC分类号: G02B6/12
CPC分类号: G02B6/4439 , G02B6/3817 , G02B6/4293
摘要: A photoelectric connection assembly includes a circuit board defining conductive pads on a first surface thereof and waveguides embedded therein, an electrical connector assembled to the circuit board and a light transmission module. The electrical connector includes a seat defining a first receiving cavity for receiving the conversion module and a second receiving cavity below the first receiving cavity, a cover rotatably associated with a rear end of the seat and rotating to shield the first receiving cavity and conductive terminals loaded on the seat. The terminals include contacting portions extending in the first receiving cavity for electrical connection with the conversion module and leg portions connecting with the conductive pads. The light transmission module is received in the second receiving cavity and includes conversion module.
摘要翻译: 光电连接组件包括在其第一表面上限定导电焊盘并嵌入其中的波导的电路板,组装到电路板的电连接器和光传输模块。 电连接器包括限定用于接收转换模块的第一容纳腔和位于第一容纳腔下方的第二容纳空腔的座,与座的后端可旋转地相连并旋转以屏蔽第一容纳空腔的盖, 在座位上 端子包括在第一容纳腔中延伸的接触部分,用于与转换模块电连接,以及与导电垫连接的腿部。 光传输模块被接收在第二接收腔中并且包括转换模块。
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公开(公告)号:US07972184B2
公开(公告)日:2011-07-05
申请号:US12549408
申请日:2009-08-28
申请人: Wen-Yi Hsieh , Ke-Hao Chen
发明人: Wen-Yi Hsieh , Ke-Hao Chen
IPC分类号: H01R13/241
CPC分类号: H01R13/2421 , H01R12/714
摘要: A contact for a burn-in socket electrically connecting an IC package and a printed circuit board, comprises a first contact, a second contact and a spring disposed between the first contact and the second contact. The first contact and the second contacts have a same configuration, and each contact has a U-shaped actuating portion with two legs and a conductive portion extending from one of the legs. The first contact and the second contact are orthogonally assembled together, and the first actuating portion bestrides the second actuating portion to clasp with second actuating portion, so that the conductive portions have an offset therebetween.
摘要翻译: 用于电连接IC封装和印刷电路板的老化插座的触点包括第一触点,第二触点和布置在第一触点和第二触点之间的弹簧。 第一触点和第二触点具有相同的构造,并且每个触点具有带有两个支腿的U形致动部分和从腿之一延伸的导电部分。 第一接触件和第二接触件正交组装在一起,并且第一致动部分优先于第二致动部分以与第二致动部分扣紧,使得导电部分之间具有偏移。
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公开(公告)号:US07972159B2
公开(公告)日:2011-07-05
申请号:US12547500
申请日:2009-08-26
申请人: Ming-Yue Chen , Shih-Wei Hsiao , Ke-Hao Chen , Wen-Yi Hsieh
发明人: Ming-Yue Chen , Shih-Wei Hsiao , Ke-Hao Chen , Wen-Yi Hsieh
IPC分类号: H01R11/22
CPC分类号: H05K7/1069 , H01R12/714 , H01R2201/20
摘要: An electrical connector (100) for electrically connecting a Central Processing Unit (CPU) with a Printed Circuit Board (PCB), includes a base (2), a plurality of insulative layers (34), a plurality of contacts (4) and a plurality of cams (33). The base defines a cavity (21) and the insulative layers are stacked and received in the cavity. The insulative layers define a plurality of passageways therein. The contacts are received in the passageways of the insulative layers. The cams are rotatable around to push different insulative layers to have different degrees of movement in a predetermined direction.
摘要翻译: 用于将中央处理单元(CPU)与印刷电路板(PCB)电连接的电连接器(100)包括基座(2),多个绝缘层(34),多个触点(4)和 多个凸轮(33)。 基座限定空腔(21),并且绝缘层被堆叠并容纳在空腔中。 绝缘层在其中限定多个通道。 触点被接收在绝缘层的通道中。 凸轮可以围绕以推动不同的绝缘层以在预定方向上具有不同程度的运动。
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公开(公告)号:US07946881B2
公开(公告)日:2011-05-24
申请号:US12609021
申请日:2009-10-30
申请人: Wen-Yi Hsieh , Kenzo Nakao , Shih-Wei Hsiao
发明人: Wen-Yi Hsieh , Kenzo Nakao , Shih-Wei Hsiao
IPC分类号: H01R13/00
CPC分类号: H05K7/1053 , G01R1/0458
摘要: A socket assembly has a socket and a heat sink module detachably mounted on the socket. The socket has a base, a sliding board mounted on the base, a lid disposed upon the base and an actuator disposed between the base and the cover. The heat sink module has a fastening frame surrounding the base, a cover pivotally assembled to an end of the fastening frame and a heat sink mounted on the cover. The cover has a latching portion which latches with a top wall of the lid when the cover rotates to a closed position. The heat sink is brought by the cover to pass an open defined on the lid and to abut against an IC package seating on the sliding board.
摘要翻译: 插座组件具有插座和可拆卸地安装在插座上的散热模块。 插座具有基座,安装在基座上的滑动板,设置在基座上的盖和设置在基座和盖之间的致动器。 散热器模块具有围绕基座的紧固框架,枢转地组装到紧固框架的端部的盖和安装在盖上的散热器。 当盖旋转到关闭位置时,盖具有闩锁部分,其与盖的顶壁锁定。 散热器由盖带来,通过盖上限定的开口,并抵靠在滑板上的IC封装。
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公开(公告)号:US07845988B2
公开(公告)日:2010-12-07
申请号:US12419314
申请日:2009-04-07
申请人: Shih-Wei Hsiao , Wen-Yi Hsieh
发明人: Shih-Wei Hsiao , Wen-Yi Hsieh
IPC分类号: H01R13/24
CPC分类号: H01R13/2421
摘要: An electrical connector contact adapted for connecting a chip to a circuit board comprises a first terminal, a second terminal electrically connecting with the first terminal and a spring. The first terminal is defined with a first abutting portion and a contact beam extending from one end of the abutting portion. The second terminal is defined with a second abutting portion and a elastic beam extending from one end of the second abutting portion. The spring is set between the first and second abutting portion with the two ends thereof separately abutting against the first abutting portion and second abutting portion. Along the contact beam there forms a retain slot, the elastic beam mating with and retain in the retain slot. A good electrical performance can be achieved according to the structure of the invention and the contact is convenient for assembling and changing.
摘要翻译: 适于将芯片连接到电路板的电连接器触点包括第一端子,与第一端子电连接的第二端子和弹簧。 第一端子限定有从邻接部分的一端延伸的第一邻接部分和接触梁。 第二端子限定有从第二抵接部的一端延伸的第二抵接部和弹性梁。 弹簧设置在第一和第二抵接部分之间,其两端分别抵靠第一抵接部分和第二邻接部分。 沿着接触梁形成保持槽,弹性梁与保持槽配合并保持在保持槽中。 根据本发明的结构可以实现良好的电气性能,并且接触方便组装和改变。
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公开(公告)号:US07830723B2
公开(公告)日:2010-11-09
申请号:US12423013
申请日:2009-04-14
申请人: Wen-Yi Hsieh , Ching-Chung Lin , Ken-Hui Chen , Chun-Hsiung Hung
发明人: Wen-Yi Hsieh , Ching-Chung Lin , Ken-Hui Chen , Chun-Hsiung Hung
CPC分类号: G11C16/0475 , G11C16/04 , G11C16/3445 , G11C29/50 , G11C29/50004 , G11C29/52
摘要: A NROM memory device includes an array of memory cells and first and second bit lines. The first and second bit lines are coupled to opposite sides of the memory cells. During an erase operation, one of the sides of the memory cells receives a positive voltage and the other side couples to a common node or a limited current source. Methods are also disclosed that can easily screen for marginal memory cells based on a threshold voltage distribution of the memory cells.
摘要翻译: NROM存储器件包括存储器单元阵列和第一和第二位线。 第一和第二位线耦合到存储器单元的相对侧。 在擦除操作期间,存储器单元的一侧接收正电压,另一侧耦合到公共节点或有限电流源。 还公开了可以容易地基于存储器单元的阈值电压分布来筛选边际存储器单元的方法。
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