利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

82 条记录 (耗时 0.03 秒)

    Method of fabricating semiconductor device
    51.
    发明申请
    Method of fabricating semiconductor device 有权
    制造半导体器件的方法

    公开(公告)号：US20130005110A1

    公开(公告)日：2013-01-03

    申请号：US13478450

    申请日：2012-05-23

    申请人： Jun-Ho Yoon ,  Bong-Jin Kuh ,  Ki-Chul Kim ,  Gyung-Jin Min ,  Tae-Jin Park ,  Sang-Ryol Yang ,  Jung-Min Oh ,  Sang-Yoon Woo ,  Young-Sub Yoo ,  Ji-Eun Lee ,  Jong-Sung Lim ,  Yong-Moon Jang ,  Han-Mei Choi ,  Je-Woo Han

    发明人： Jun-Ho Yoon ,  Bong-Jin Kuh ,  Ki-Chul Kim ,  Gyung-Jin Min ,  Tae-Jin Park ,  Sang-Ryol Yang ,  Jung-Min Oh ,  Sang-Yoon Woo ,  Young-Sub Yoo ,  Ji-Eun Lee ,  Jong-Sung Lim ,  Yong-Moon Jang ,  Han-Mei Choi ,  Je-Woo Han

    IPC分类号： H01L21/02

    CPC分类号： H01L28/90 ,  H01L27/10852

    摘要： Provided is a method of manufacturing a semiconductor device having a capacitor. The method includes forming a composite layer, including sequentially stacking on a substrate alternating layers of first through nth sacrificial layers and first through nth supporting layers. A plurality of openings that penetrate the composite layer are formed. A lower electrode is formed in the plurality of openings. At least portions of the first through nth sacrificial layers are removed to define a support structure for the lower electrode extending between adjacent ones of the plurality of openings and the lower electrode formed therein, the support structure including the first through nth supporting layers and a gap region between adjacent ones of the first through nth supporting layers where the first through nth sacrificial layers have been removed. A dielectric layer is formed on the lower electrode and an upper electrode is formed on the dielectric layer.

    摘要翻译： 提供一种制造具有电容器的半导体器件的方法。 该方法包括形成复合层，包括顺序地堆叠在第一至第n牺牲层和第一至第n支撑层上的交替层上的衬底上。 形成贯穿复合层的多个开口。 在多个开口中形成下电极。 去除第一至第n牺牲层的至少部分以限定在多个开口中相邻的开口和形成在其中的下电极之间延伸的下电极的支撑结构，支撑结构包括第一至第n支撑层和间隙 在第一至第n个支撑层中相邻的第一至第n个牺牲层已被去除之间的区域。 在下电极上形成介电层，在电介质层上形成上电极。

    APPARATUS OF ENCAPSULATING DISPLAY PANEL AND METHOD OF MANUFACTURING ORGANIC LIGHT EMITTING DISPLAY DEVICE USING THE SAME
    52.
    发明申请
    APPARATUS OF ENCAPSULATING DISPLAY PANEL AND METHOD OF MANUFACTURING ORGANIC LIGHT EMITTING DISPLAY DEVICE USING THE SAME 有权
    封装显示面板的装置及使用其的制造有机发光显示装置的方法

    公开(公告)号：US20120273127A1

    公开(公告)日：2012-11-01

    申请号：US13463721

    申请日：2012-05-03

    申请人： Ki-Chul Kim

    发明人： Ki-Chul Kim

    IPC分类号： B32B37/12

    CPC分类号： H01L51/56 ,  H01L51/5246

    摘要： An encapsulation apparatus capable of securely sealing a gap of a display panel and improving intensity of the display panel, and a method of manufacturing an organic light emitting display device using the encapsulation apparatus are taught. The encapsulation apparatus includes an injection port having tapered projecting edges formed in both sides of one end the injection port, and injecting a reinforcing material into a gap of a display panel in a dual surface contact manner, the first substrate and the second substrate being attached to each other using a sealant; and a supporter coupled to the injection port and supporting the injection port.

    摘要翻译： 教导了能够可靠地密封显示面板的间隙并提高显示面板的强度的封装装置，以及使用该封装装置制造有机发光显示装置的方法。 封装装置包括：注入口，其具有形成在注射口的一端的两侧的锥形突出边缘，并且以双面接触方式将增强材料注入到显示面板的间隙中，第一基底和第二基底被附接 彼此使用密封剂; 以及连接到注射口并支撑注射口的支撑件。

    Flat display panel cutting apparatus
    54.
    发明申请
    Flat display panel cutting apparatus 有权
    平板显示屏切割装置

    公开(公告)号：US20100011928A1

    公开(公告)日：2010-01-21

    申请号：US12458554

    申请日：2009-07-15

    申请人： Jae-Pil Lee ,  Ki-Chul Kim

    发明人： Jae-Pil Lee ,  Ki-Chul Kim

    IPC分类号： B26D7/18

    CPC分类号： B26D7/1836 ,  B26D3/08 ,  B26F3/002 ,  B28D5/0011 ,  B28D5/0052 ,  B65G2249/045 ,  C03B33/033 ,  C03B33/07 ,  C03B33/076 ,  Y10T83/2092 ,  Y10T225/307 ,  Y10T225/325 ,  Y10T225/35

    摘要： An apparatus for cutting a flat display panel prevents a light emitting surface of a flat display panel from being damaged due to a pit or a scratch. The apparatus for cutting a flat display panel includes a stage supporting a rear substrate of the flat display panel, a chip blocking unit disposed to correspond to a non-scrap portion of the flat display panel, and a scrap breaker to grip a scrap portion of the flat display panel that is to be separated from the flat display panel. A scribing line is formed between the scrap portion and a non-scrap portion of the flat display panel.

    摘要翻译： 用于切割平面显示面板的装置防止平面显示面板的发光表面由于凹坑或划痕而损坏。 用于切割平板显示面板的装置包括支撑平板显示面板的后基板的台，与平板显示面板的非废片部对应设置的切屑分离单元，以及用于夹持 平板显示面板与平板显示面板分离。 在平板显示面板的废料部分和非废料部分之间形成划线。

    Method of fabricating semiconductor device having stress enhanced MOS transistor and semiconductor device fabricated thereby
    57.
    发明申请
    Method of fabricating semiconductor device having stress enhanced MOS transistor and semiconductor device fabricated thereby 审中-公开
    制造具有应力增强型MOS晶体管的半导体器件及其制造的半导体器件的方法

    公开(公告)号：US20080073713A1

    公开(公告)日：2008-03-27

    申请号：US11785994

    申请日：2007-04-23

    申请人： Ki-Chul Kim ,  Dong-Suk Shin

    发明人： Ki-Chul Kim ,  Dong-Suk Shin

    IPC分类号： H01L27/092 ,  H01L21/8238

    CPC分类号： H01L21/823807 ,  H01L21/823864 ,  H01L29/665 ,  H01L29/6653 ,  H01L29/6659 ,  H01L29/7833 ,  H01L29/7843

    摘要： A method of fabricating a semiconductor device having a stress enhanced MOS transistor is provided. A MOS transistor may be formed in a desired, or alternatively, a predetermined region of a semiconductor substrate. A first sacrificial pattern, formed over the source and drain regions of a MOS transistor, may expose sidewall spacers and cover the upper region of the gate pattern. Thinner spacers may be formed by etching the exposed sidewall spacers using the first sacrificial pattern as an etch mask. A stress liner may be formed over the MOS transistor having the thinner spacers.

    摘要翻译： 提供一种制造具有应力增强型MOS晶体管的半导体器件的方法。 MOS晶体管可以形成在半导体衬底的期望或替代地预定区域中。 形成在MOS晶体管的源极和漏极区域上的第一牺牲图案可以暴露侧壁间隔物并覆盖栅极图案的上部区域。 可以通过使用第一牺牲图案作为蚀刻掩模蚀刻暴露的侧壁间隔物来形成更薄的间隔物。 可以在具有较薄间隔物的MOS晶体管上形成应力衬垫。

    Semiconductor devices and methods of forming the same
    58.
    发明申请
    Semiconductor devices and methods of forming the same 审中-公开
    半导体器件及其形成方法

    公开(公告)号：US20070264810A1

    公开(公告)日：2007-11-15

    申请号：US11783181

    申请日：2007-04-06

    申请人： Ki-Chul Kim ,  Hwa-Sung Rhee ,  Sug-Hyun Sung ,  Sang-Doo Kim

    发明人： Ki-Chul Kim ,  Hwa-Sung Rhee ,  Sug-Hyun Sung ,  Sang-Doo Kim

    IPC分类号： H01L21/3205 ,  H01L21/4763

    CPC分类号： H01L29/7848 ,  H01L21/28061 ,  H01L29/165 ,  H01L29/665 ,  H01L29/66545 ,  H01L29/66636

    摘要： A semiconductor device and a method of manufacturing the same, including obtaining a semiconductor substrate, forming a device isolating layer having a depression part and a protrusion part in the semiconductor substrate, forming a gate insulating layer and a gate electrode on the semiconductor substrate, forming a spacer in communication with the gate electrode, removing a portion of the semiconductor substrate to form at least one substrate recess region in an upper surface of the semiconductor substrate and at least one substrate remaining portion extending to a same height as the semiconductor substrate, so that the substrate remaining portion forms a sidewall of the substrate recess region and is in communication with the device isolating layer, and forming a substrate epitaxial layer in the substrate recess region.

    摘要翻译： 一种半导体器件及其制造方法，包括获得半导体衬底，在半导体衬底中形成具有凹陷部分和突出部分的器件隔离层，在半导体衬底上形成栅极绝缘层和栅电极，形成 与所述栅电极连通的间隔物，去除所述半导体衬底的一部分以在所述半导体衬底的上表面中形成至少一个衬底凹部区域，以及至少一个衬底剩余部分延伸到与所述半导体衬底相同的高度，因此 衬底剩余部分形成衬底凹陷区域的侧壁并且与器件隔离层连通，并且在衬底凹槽区域中形成衬底外延层。

    Apparatus for processing a semiconductor wafer and method of forming the same
    59.
    发明申请
    Apparatus for processing a semiconductor wafer and method of forming the same 审中-公开
    用于处理半导体晶片的设备及其形成方法

    公开(公告)号：US20070258075A1

    公开(公告)日：2007-11-08

    申请号：US11790175

    申请日：2007-04-24

    申请人： Ki-Chul Kim ,  Hong-Jae Shin ,  Nae-In Lee

    发明人： Ki-Chul Kim ,  Hong-Jae Shin ,  Nae-In Lee

    IPC分类号： G03B27/52

    CPC分类号： H01L21/68721

    摘要： A semiconductor wafer processing apparatus may include a chuck and/or a focus ring. The chuck may be configured to hold a wafer. The focus ring may be disposed surrounding a rim of the chuck. The focus ring may include a first section formed of a first material and a second section formed of a second material. The first material and the second material may have different conductivities. A method of forming a semiconductor wafer processing apparatus may include forming a first section of a focus ring from a first material, forming a second section of the focus ring from a second material having a different conductivity than the first material, combining the first and second sections to form a focus ring, and/or arranging the focus ring so as to surround a chuck.

    摘要翻译： 半导体晶片处理装置可以包括卡盘和/或聚焦环。 卡盘可以被配置成保持晶片。 聚焦环可以围绕卡盘的边缘设置。 聚焦环可以包括由第一材料形成的第一部分和由第二材料形成的第二部分。 第一材料和第二材料可以具有不同的电导率。 形成半导体晶片处理装置的方法可以包括从第一材料形成聚焦环的第一部分，从具有不同于第一材料的导电率的第二材料形成聚焦环的第二部分，将第一和第二部分 形成聚焦环，和/或配置聚焦环以围绕卡盘。

    METHODS OF FORMING A TRENCH HAVING SIDE SURFACES INCLUDING A UNIFORM SLOPE
    60.
    发明申请
    METHODS OF FORMING A TRENCH HAVING SIDE SURFACES INCLUDING A UNIFORM SLOPE 有权
    形成具有包括均匀斜率在内的侧面的斜面的方法

    公开(公告)号：US20070178663A1

    公开(公告)日：2007-08-02

    申请号：US11624410

    申请日：2007-01-18

    申请人： Ki-Chul Kim

    发明人： Ki-Chul Kim

    IPC分类号： H01L21/76

    CPC分类号： H01L21/76224

    摘要： Provided herein are methods of forming a trench including forming a mask layer on a substrate, forming a mask pattern to expose the substrate, using plasma to at least partially remove by-products produced during formation of the mask pattern; and etching the exposed substrate to form a trench having side surfaces including a uniform slope.

    摘要翻译： 本文提供了形成沟槽的方法，包括在衬底上形成掩模层，形成掩模图案以暴露衬底，使用等离子体至少部分地去除在形成掩模图案期间产生的副产物; 并蚀刻暴露的衬底以形成具有包括均匀斜率的侧表面的沟槽。