公开(公告)号：US06960890B2

公开(公告)日：2005-11-01

申请号：US10790250

申请日：2004-03-02

申请人： Kiyoshi Yoneda

发明人： Kiyoshi Yoneda

IPC分类号： H01L51/50 ,  G09F9/30 ,  G09G3/10 ,  G09G3/30 ,  H01L21/77 ,  H01L27/12 ,  H01L27/32 ,  H05B33/00 ,  H05B33/14

CPC分类号： H01L27/3244 ,  G09G3/3233 ,  G09G3/3291 ,  G09G2300/0443 ,  G09G2300/0809 ,  G09G2300/0842 ,  G09G2320/0233 ,  H01L27/1296 ,  H01L27/3202 ,  H01L27/326

摘要： The invention prevents an uneven display on an organic EL display panel by reducing characteristic variation of a driving transistor among pixels. A gate signal line for supplying a gate signal and a drain signal line for supplying a display signal are crossing each other. Four split driving TFTs of P-channel type are provided in a pixel, and drains of the driving TFTs are connected with anodes of split organic EL elements, respectively. A common gate of the driving TFTs is connected with a pixel selecting TFT.

摘要翻译： 本发明通过降低像素之中的驱动晶体管的特性变化来防止有机EL显示面板上的不均匀显示。 用于提供栅极信号的栅极信号线和用于提供显示信号的漏极信号线彼此交叉。 在像素中设置有P沟道型的四个分离驱动TFT，驱动TFT的漏极分别与分离的有机EL元件的阳极连接。 驱动TFT的公共栅极与像素选择TFT连接。

公开(公告)号：US20050062047A1

公开(公告)日：2005-03-24

申请号：US10945782

申请日：2004-09-21

申请人： Ryuji Nishikawa ,  Kazuhiro Imao ,  Ken Wakita ,  Kiyoshi Yoneda

发明人： Ryuji Nishikawa ,  Kazuhiro Imao ,  Ken Wakita ,  Kiyoshi Yoneda

IPC分类号： H01L51/50 ,  G09F9/30 ,  H01L21/20 ,  H01L21/336 ,  H01L21/77 ,  H01L21/84 ,  H01L27/12 ,  H01L27/32 ,  H01L29/786 ,  H01L29/76

CPC分类号： H01L27/1285 ,  H01L27/1296 ,  H01L29/78645 ,  H01L29/78675

摘要： A device has a first transistor and a second transistor wherein a channel length direction of the first transistor extends along a first direction and a channel length direction of the second transistor extends along a second direction intersecting the first direction, and the second transistor is formed on a same substrate as the first transistor. A first channel region and a second channel region are formed in semiconductor layers which are simultaneously formed and a mobility of the semiconductor film has an anisotropy in the first and second directions. With this structure, transistors having different mobilities can be obtained while using the semiconductor films formed on the same substrate and from a same material. For example, it is possible to form a transistor in which a high resistance is required using a semiconductor layer of the same characteristics as that in a transistor in which a high speed operation is desired, on the same substrate and with a minimum area.

摘要翻译： 器件具有第一晶体管和第二晶体管，其中第一晶体管的沟道长度方向沿着第一方向延伸，并且第二晶体管的沟道长度方向沿着与第一方向相交的第二方向延伸，并且第二晶体管形成在 与第一晶体管相同的衬底。 在同时形成的半导体层中形成第一沟道区和第二沟道区，并且半导体膜的迁移率在第一和第二方向上具有各向异性。 利用这种结构，可以在使用形成在同一衬底上的相同材料的半导体膜上获得具有不同迁移率的晶体管。 例如，可以在同一衬底上并且具有最小面积的情况下，使用与需要高速运算的晶体管相同特性的半导体层，形成要求高电阻的晶体管。

公开(公告)号：US06850005B2

公开(公告)日：2005-02-01

申请号：US10627179

申请日：2003-07-24

申请人： Kiyoshi Yoneda ,  Ryuji Nishikawa ,  Koji Suzuki ,  Shinji Ichikawa

发明人： Kiyoshi Yoneda ,  Ryuji Nishikawa ,  Koji Suzuki ,  Shinji Ichikawa

IPC分类号： H05B33/00 ,  H01L27/32 ,  H01L51/52 ,  H01J1/62 ,  H01J63/04

CPC分类号： H01L27/3258 ,  H01L27/3246 ,  H01L51/5237 ,  H01L51/5262 ,  H01L51/5284

摘要： An inter-layer insulating film and a gate insulating film which are positioned on the optical path of light from an organic EL element to be externally emitted, for example, located under a transparent electrode, are removed. Because SiO2 films having a refractive index which differs significantly from refractive indexes of other films are used for these films, there was a problem of light attenuation in these layers. Such light attenuation can be reduced by removing these layers located in the region through which light from the organic EL element passes.

摘要翻译： 位于位于外部发射的有机EL元件的光的光路上的例如位于透明电极下方的层间绝缘膜和栅极绝缘膜被去除。 由于这些膜使用具有与其它膜的折射率显着不同的折射率的SiO 2膜，因此存在这些层中的光衰减的问题。 通过去除位于有机EL元件的光通过的区域中的这些层，可以减少这种光衰减。

公开(公告)号：US20050014316A1

公开(公告)日：2005-01-20

申请号：US10917394

申请日：2004-08-13

申请人： Kiichi Hirano ,  Naoya Sotani ,  Toshifumi Yamaji ,  Yoshihiro Morimoto ,  Kiyoshi Yoneda

发明人： Kiichi Hirano ,  Naoya Sotani ,  Toshifumi Yamaji ,  Yoshihiro Morimoto ,  Kiyoshi Yoneda

IPC分类号： G02F1/1362 ,  H01L21/20 ,  H01L21/336 ,  H01L21/77 ,  H01L21/84 ,  H01L27/12 ,  H01L29/49 ,  H01L29/786 ,  H01L21/30 ,  H01L21/46 ,  H01L21/00

CPC分类号： H01L21/02667 ,  G02F1/13454 ,  H01L21/02422 ,  H01L21/02488 ,  H01L21/02532 ,  H01L21/02595 ,  H01L21/0262 ,  H01L21/02686 ,  H01L21/2022 ,  H01L27/12 ,  H01L27/1285 ,  H01L29/4908 ,  H01L29/66757 ,  H01L29/78603 ,  H01L29/78621 ,  H01L29/78675

摘要： A method of fabricating a thin film transistor by setting the temperature of a heat treatment for crystallizing an active layer which is formed on a substrate at a level not deforming the substrate and activating an impurity layer in a heat treatment method different from that employed for the heat treatment, and a semiconductor device prepared by forming a heat absorption film, a semiconductor film, a gate insulating film, and a gate electrode on a substrate, the heat absorption film being provided within a region substantially corresponding to the semiconductor film.

摘要翻译： 一种制造薄膜晶体管的方法，该方法是通过设定用于使基板上形成的活性层结晶的热处理的温度不会使基板变形，并且以不同于 热处理，以及通过在基板上形成吸热膜，半导体膜，栅极绝缘膜和栅电极而制备的半导体器件，所述吸热膜设置在与半导体膜基本对应的区域内。

公开(公告)号：US06790714B2

公开(公告)日：2004-09-14

申请号：US09813866

申请日：2001-03-22

申请人： Kiichi Hirano ,  Naoya Sotani ,  Toshifumi Yamaji ,  Yoshihiro Morimoto ,  Kiyoshi Yoneda

发明人： Kiichi Hirano ,  Naoya Sotani ,  Toshifumi Yamaji ,  Yoshihiro Morimoto ,  Kiyoshi Yoneda

IPC分类号： H01L2100

CPC分类号： H01L21/02667 ,  G02F1/13454 ,  H01L21/02422 ,  H01L21/02488 ,  H01L21/02532 ,  H01L21/02595 ,  H01L21/0262 ,  H01L21/02686 ,  H01L21/2022 ,  H01L27/12 ,  H01L27/1285 ,  H01L29/4908 ,  H01L29/66757 ,  H01L29/78603 ,  H01L29/78621 ,  H01L29/78675

摘要： A method of fabricating a thin film transistor by setting the temperature of a heat treatment for crystallizing an active layer which is formed on a substrate at a level not deforming the substrate and activating an impurity layer in a heat treatment method different from that employed for the heat treatment, and a semiconductor device prepared by forming a heat absorption film, a semiconductor film, a gate insulating film, and a gate electrode on a substrate, the heat absorption film being provided within a region substantially corresponding to the semiconductor film.

摘要翻译： 一种制造薄膜晶体管的方法，该方法是通过设定用于使基板上形成的活性层结晶的热处理的温度不会使基板变形，并且以不同于 热处理，以及通过在基板上形成吸热膜，半导体膜，栅极绝缘膜和栅电极而制备的半导体器件，所述吸热膜设置在与半导体膜基本对应的区域内。

公开(公告)号：US06548828B2

公开(公告)日：2003-04-15

申请号：US09162208

申请日：1998-09-28

申请人： Shiro Nakanishi ,  Kiyoshi Yoneda

发明人： Shiro Nakanishi ,  Kiyoshi Yoneda

IPC分类号： H01L2900

CPC分类号： H01L29/66765 ,  H01L29/42384 ,  H01L29/4908

摘要： On a substrate, there is disposed a gate electrode having a section of a trapezoidal configuration expanded toward the substrate. The gate electrode is covered with a silicon nitride film having a thickness T1 of 400 Å, and a silicon oxide film having a thickness T2 of 1200 Åis formed on the silicon nitride film. A polycrystalline silicon film constructing an active region is formed on a gate insulating film constituted of the silicon nitride film and the silicon oxide film. By forming the silicon oxide film in a sufficient thickness of 1200 Åor more, and further forming the silicon nitride film 23 of 400 Åor more, a thin-film transistor cannot easily be influenced by a stepped portion formed by the gate electrode, and withstanding voltage of the gate insulating film of the thin-film transistor can be enhanced.

摘要翻译： 在基板上设置有朝向基板膨胀的具有梯形构造的截面的栅电极。 栅电极被覆有厚度T1为400埃的氮化硅膜，并且在氮化硅膜上形成厚度为T2的氧化硅膜。 在由氮化硅膜和氧化硅膜构成的栅极绝缘膜上形成构成有源区的多晶硅膜。 通过以足够的厚度形成氧化硅膜，并且进一步形成400以上的氮化硅膜23，薄膜晶体管不容易受到由栅电极形成的台阶部分的影响，耐电压 可以提高薄膜晶体管的栅极绝缘膜。

公开(公告)号：US06509944B2

公开(公告)日：2003-01-21

申请号：US09163083

申请日：1998-09-29

申请人： Norio Koma ,  Tetsuji Omura ,  Kiyoshi Yoneda

发明人： Norio Koma ,  Tetsuji Omura ,  Kiyoshi Yoneda

IPC分类号： G02F11343

CPC分类号： G02F1/133707 ,  G02F1/1393

摘要： A vertically aligned type liquid crystal display includes a liquid crystal layer disposed between a plurality of pixel electrodes and a common electrode and containing vertically aligned liquid crystal molecules, the orientation of the liquid crystal molecules being controlled by electric field. An orientation control window is formed in the common electrode. A distance Wp between adjacent pixel electrodes and/or a width Ws of the orientation control window is selected so as to satisfy Wp≧d/2 and/or Ws≧d/2, where d is a distance (or a cell gap) between the pixel electrodes and the common electrode. Viewing angle is widened and a viewing angle characteristic is improved, and abnormal orientation or grittiness of an image is eliminated.

摘要翻译： 垂直取向型液晶显示器包括设置在多个像素电极和公共电极之间并且包含垂直取向的液晶分子的液晶层，液晶分子的取向由电场控制。 在公共电极中形成取向控制窗。 选择相邻像素电极之间的距离Wp和/或取向控制窗口的宽度Ws，以满足Wp> = d / 2和/或Ws> = d / 2，其中d是距离（或者单元间隙 ）在像素电极和公共电极之间。 视角加宽，视角特性提高，图像异常取向或粗糙度得以消除。

公开(公告)号：US06451636B1

公开(公告)日：2002-09-17

申请号：US09151081

申请日：1998-09-10

申请人： Yasuo Segawa ,  Ryoichi Yokoyama ,  Kiyoshi Yoneda ,  Tsutomu Yamada

发明人： Yasuo Segawa ,  Ryoichi Yokoyama ,  Kiyoshi Yoneda ,  Tsutomu Yamada

IPC分类号： H01L21338

CPC分类号： H01L21/02686 ,  H01L21/02532 ,  H01L21/02595 ,  H01L21/2026 ,  H01L29/66765 ,  H01L29/78621 ,  H01L29/78678 ,  H01L29/78696

摘要： Regarding an element having a channel width W greater than a pitch P of a pulse laser beam, a direction of the channel width W of a channel region CH is inclined with respect to a direction of a major axis of a line beam LB. Consequently, even if a defective crystallization region R is caused by an nonuniform intensity of an irradiated region in laser annealing forming p-Si of a p-Si TFT LCD, the whole channel width W of the channel region CH does not overlap the defective crystallization region R. Therefore, even if the defective crystallization region R is generated, element characteristics are not affected. Thus, the manufacturing yield of an excellent p-Si LCD can be enhanced.

摘要翻译： 关于通道宽度W大于脉冲激光束的间距P的元件，沟道区域CH的沟道宽度W的方向相对于线束LB的长轴的方向倾斜。 因此，即使在由p-Si TFT LCD形成p-Si的激光退火的照射区域的不均匀强度引起有缺陷的结晶区域R的情况下，沟道区域CH的整个沟道宽度W也不会与缺陷结晶 因此，即使产生不良结晶区域R，元件特性也不受影响。 因此，可以提高优异的p-Si LCD的制造成品率。

公开(公告)号：US06429100B2

公开(公告)日：2002-08-06

申请号：US08865476

申请日：1997-05-29

申请人： Kiyoshi Yoneda

发明人： Kiyoshi Yoneda

IPC分类号： C30B2136

CPC分类号： H01L21/02675 ,  G02F1/13454 ,  H01L21/02422 ,  H01L21/02532 ,  H01L21/02678 ,  H01L21/02686 ,  H01L21/2026 ,  H01L29/66757 ,  Y10S117/904

摘要： A line beam is irradiated such that edge lines of the beam extend in a direction at an angle of 45° with respect to the vertical direction or the horizontal direction. As a result, a laser defective crystallization region R′ where the grain size has not become sufficiently large due to unevenness in intensity of the line beam passes at 45° across the carrier path connecting source and drain regions S and D to each other. The defective crystallization region R′ thus does not completely divide between the contact region CT, i.e., the carrier path between the source and drain regions. Therefore, a carrier path CP can be securely maintained without passing through the defective crystallization region R′, so that the ON-current is prevented from being reduced. Deterioration or unevenness in transistor characteristics caused by unevenness in intensity of laser irradiation can thus be prevented.

摘要翻译： 照射线束使得光束的边缘线相对于垂直方向或水平方向在45度的角度的方向上延伸。 结果，由于线束的强度不均匀而导致的晶粒尺寸没有变得足够大的激光缺陷结晶区域R'在穿过连接源极区域和漏极区域S和D的载流子路径之间经过45°。 因此，不良结晶区域R'在接触区域CT，即源极和漏极区域之间的载流子路径之间不完全分开。 因此，可以可靠地维持载波路径CP，而不会通过不良结晶区域R'，从而防止导通电流的减小。 因此可以防止由激光照射强度不均匀引起的晶体管特性的劣化或不均匀。

公开(公告)号：US06426791B2

公开(公告)日：2002-07-30

申请号：US09790915

申请日：2001-02-22

申请人： Kazuhiro Imao ,  Takashi Kuwahara ,  Yoshihiro Morimoto ,  Kiyoshi Yoneda

发明人： Kazuhiro Imao ,  Takashi Kuwahara ,  Yoshihiro Morimoto ,  Kiyoshi Yoneda

IPC分类号： G01N2155

CPC分类号： H01L22/24 ,  H01L22/12

摘要： Reflectance of a p-Si film crystallized by laser annealing is measured, a wave length dependency of the reflectance is found, and a first order rate of change is calculated to determine a minimum value near a wave length of 500 nm. The value is to be an inherent optical value under the laser power and relates to a grain size measured by Secco etching or the like. A number of correspondence between the optical value and the grain size are recorded and linearly plotted. By calculating the optical value from the reflectance in the p-Si film at in-line, the grain size is correspondingly determined. Thus, the semiconductor film can be in-line monitored, thereby improving a yield and saving a cost in producing a semiconductor device.

摘要翻译： 测量通过激光退火结晶的p-Si膜的反射率，发现反射率的波长依赖性，并且计算一阶变化率以确定波长500nm附近的最小值。 该值是在激光功率下的固有光学值，并且涉及通过Secco蚀刻等测量的晶粒尺寸。 记录光学值和晶粒尺寸之间的一些对应关系并线性绘制。 通过从线上p-Si膜的反射率计算光学值，相应地确定晶粒尺寸。 因此，可以在线监测半导体膜，从而提高成品率并节省制造半导体器件的成本。