公开(公告)号：US07078143B2

公开(公告)日：2006-07-18

申请号：US10627719

申请日：2003-07-28

申请人： Masaki Hashimoto ,  Kazushige Morita ,  Mikio Kakui ,  Yuji Tanaka ,  Masayuki Sakamoto

发明人： Masaki Hashimoto ,  Kazushige Morita ,  Mikio Kakui ,  Yuji Tanaka ,  Masayuki Sakamoto

IPC分类号： G03G5/10

CPC分类号： G03G5/10

摘要： The object of the invention is to prevent interference fringes of images and allow precise measurement of the thickness of a layer by the optical interferometry by limiting the surface roughness of a conductive substrate. The surface roughness of the conductive substrate provided in an electrophotographic photoreceptor is such that the maximum peak-to-valley roughness height (Ry)=0.8 to 1.4 μm, the centerline average roughness (Ra)=0.10 to 0.15 μm, the ten-point average roughness (Rz)=0.7 to 1.3 μm, the average peak-to-peak distance (Sm)=5 to 30 μm, and the peak count Pc=60 to 100. In such an electrophotographic photoreceptor, light for exposure can be scattered to an appropriate extent, so that interference fringes can be prevented, and an interference pattern is formed during measurement of the thickness of the photosensitive layer by the optical interferometry so that the thickness of the layer can be measured with a high precision.

摘要翻译： 本发明的目的是防止图像的干涉条纹，并且通过限制导电基底的表面粗糙度，通过光学干涉测量精确测量层的厚度。 设置在电子照相感光体中的导电性基材的表面粗糙度使得最大峰 - 谷粗糙度高度（Ry）= 0.8〜1.4μm，中心线平均粗糙度（Ra）= 0.10〜0.15μm，十点 平均粗糙度（Rz）= 0.7〜1.3μm，平均峰峰距离（Sm）= 5〜30μm，峰值Pc = 60〜100。在这样的电子照相感光体中，曝光用的光可以散射 从而可以防止干涉条纹，并且通过光学干涉测量在感光层的厚度测量期间形成干涉图案，从而可以高精度地测量该层的厚度。

公开(公告)号：US20060064936A1

公开(公告)日：2006-03-30

申请号：US10950407

申请日：2004-09-28

申请人： Masaki Shiraiwa ,  Osamu Kanehara ,  Tatsuya Tamura ,  Yuji Tanaka ,  Hideto Hiwa

发明人： Masaki Shiraiwa ,  Osamu Kanehara ,  Tatsuya Tamura ,  Yuji Tanaka ,  Hideto Hiwa

IPC分类号： E06B7/16

CPC分类号： B60J10/74 ,  B60J10/16 ,  B60J10/17 ,  B60J10/30

摘要： A glass run channel mountable along a window frame and made of a thermoplastic elastomer includes a base portion, a pair of side wall portions extending from the base portion, and projections that engage the window frame. A non-slip portion made of material having a larger coefficient of friction with respect to the window frame than that of the thermoplastic elastomer is provided on a face of the base portion opposite to the window frame. The non-slip portion is less slidable on the window frame than the thermoplastic elastomer, and further less slidable due to an orthogonal load produced when the glass run channel is mounted and pressed. Therefore, the glass run channel is stably maintained at a predetermined position in the window frame even if a force is exerted by sliding the window pane repeatedly.

摘要翻译： 沿着窗框架安装并由热塑性弹性体制成的玻璃行进通道包括基部，从基部延伸的一对侧壁部分和与窗框接合的突起。 在与窗框相对的基部的表面上设置有由相对于窗框的摩擦系数高于热塑性弹性体的材料制成的防滑部。 防滑部在窗框上比热塑性弹性体更不易滑动，并且由于当玻璃运行通道被安装和按压时产生的正交载荷而进一步滑动。 因此，即使通过重复地滑动窗玻璃来施加力，玻璃运行通道也稳定地保持在窗框内的预定位置。

公开(公告)号：US06902262B2

公开(公告)日：2005-06-07

申请号：US10947362

申请日：2004-09-23

申请人： Yuji Tanaka ,  Koji Watanabe ,  Tomoaki Abe ,  Takayuki Ishii ,  Naomi Shirakawa ,  Koichi Toba ,  Minoru Usui ,  Shinri Sakai ,  Kohei Kitahara ,  Hideaki Sonehara

发明人： Yuji Tanaka ,  Koji Watanabe ,  Tomoaki Abe ,  Takayuki Ishii ,  Naomi Shirakawa ,  Koichi Toba ,  Minoru Usui ,  Shinri Sakai ,  Kohei Kitahara ,  Hideaki Sonehara

IPC分类号： B41J2/14 ,  B41J2/145 ,  B41J2/16 ,  B41J2/045

CPC分类号： B41J2/161 ,  B41J2/14233 ,  B41J2/145 ,  B41J2/1623 ,  B41J2/1632 ,  B41J2/1634 ,  B41J2/1643 ,  B41J2/1646 ,  B41J2002/14387

摘要： Actuator units independently dedicated to nozzles divided into a plurality of groups are fixed to a common flow path unit having the nozzles formed therein with through holes aligned with one another. Heads of various types can be formed by using the actuator units of the same design only by changing the mode of arrangement of the nozzles in accordance with the purpose.

公开(公告)号：US06895070B2

公开(公告)日：2005-05-17

申请号：US10329425

申请日：2002-12-27

申请人： Hirokazu Kobayashi ,  Yuji Tanaka

发明人： Hirokazu Kobayashi ,  Yuji Tanaka

IPC分类号： H03K23/00 ,  H03K21/00 ,  H03K23/66

CPC分类号： H03K21/00

摘要： The counter circuit comprises the initial value single port RAM having N initial value registers allocated for memorizing N initial values, the counter register single port RAM having N counter registers allocated for memorizing N counting values, and the control circuit for performing a counting operation for each counter register. The control circuit performs the counting operation for each counter register on a time division basis by using a single arithmetic unit.

摘要翻译： 计数器电路包括初始值单端口RAM，其具有分配用于存储N个初始值的N个初始值寄存器，具有分配用于存储N个计数值的N个计数器寄存器的计数器寄存器单端口RAM以及用于对每个初始值进行计数操作的控制电路 计数器寄存器。 控制电路通过使用单个算术单元在时分基础上对每个计数器寄存器进行计数操作。

公开(公告)号：US20050036009A1

公开(公告)日：2005-02-17

申请号：US10947362

申请日：2004-09-23

申请人： Yuji Tanaka ,  Koji Watanabe ,  Tomoaki Abe ,  Takayuki Ishii ,  Naomi Shirakawa ,  Koichi Toba ,  Minoru Usui ,  Shinri Sakai ,  Kohei Kitahara ,  Hideaki Sonehara

发明人： Yuji Tanaka ,  Koji Watanabe ,  Tomoaki Abe ,  Takayuki Ishii ,  Naomi Shirakawa ,  Koichi Toba ,  Minoru Usui ,  Shinri Sakai ,  Kohei Kitahara ,  Hideaki Sonehara

IPC分类号： B41J2/14 ,  B41J2/145 ,  B41J2/16 ,  B41J2/045

CPC分类号： B41J2/161 ,  B41J2/14233 ,  B41J2/145 ,  B41J2/1623 ,  B41J2/1632 ,  B41J2/1634 ,  B41J2/1643 ,  B41J2/1646 ,  B41J2002/14387

摘要： Actuator units independently dedicated to nozzles divided into a plurality of groups are fixed to a common flow path unit having the nozzles formed therein with through holes aligned with one another. Heads of various types can be formed by using the actuator units of the same design only by changing the mode of arrangement of the nozzles in accordance with the purpose.

公开(公告)号：US06751153B2

公开(公告)日：2004-06-15

申请号：US10187048

申请日：2002-06-28

申请人： Yasumichi Mori ,  Ken Sumitani ,  Yuji Tanaka ,  Haruyasu Fukui

发明人： Yasumichi Mori ,  Ken Sumitani ,  Yuji Tanaka ,  Haruyasu Fukui

IPC分类号： G11C800

CPC分类号： G11C8/12 ,  G11C16/08

摘要： A non-volatile semiconductor memory device, comprises a plurality of memory banks each including a plurality of memory cells, a command recognition section for identifying an externally input command signal and outputting an identification signal, an internal control section for generating a control signal for executing a command designated by the identification signal, an address control section for generating an internal address signal to a memory region including an arbitrary combination of the plurality of memory banks to be accessed, based on the externally input address signal, and a first address inversion section for inverting or non-inverting the logical values of at least a specific bit of the input address signal and outputting the resultant input address signal to the address control section. Predetermined memory cells are accessed based on the control signal and the internal address signal.

摘要翻译： 一种非易失性半导体存储器件，包括多个存储单元，每个存储单元包括多个存储器单元，用于识别外部输入的命令信号并输出​​识别信号的命令识别单元，用于产生用于执行的控制信号的内部控制单元 由识别信号指定的命令，地址控制部分，用于根据外部输入的地址信号，向包括要访问的多个存储体组的任意组合的存储区域产生内部地址信号;以及第一地址转换部分 用于反相或非反相输入地址信号的至少一个特定位的逻辑值，并将结果输入地址信号输出到地址控制部分。 基于控制信号和内部地址信号来访问预定的存储单元。

公开(公告)号：US06468243B1

公开(公告)日：2002-10-22

申请号：US09644677

申请日：2000-08-24

申请人： Katsuya Miyagawa ,  Yoshikazu Kishigami ,  Yuji Tanaka

发明人： Katsuya Miyagawa ,  Yoshikazu Kishigami ,  Yuji Tanaka

IPC分类号： A61M2900

CPC分类号： A61M25/1002 ,  A61M2025/1004

摘要： A balloon catheter comprises a shaft 2, a ball-shaped balloon 1 twisted in the form of a screw and mounted on the head of the shaft 2, and a two-way stop cock 5 connected through connection tube 4 with hub 3 on the proximal end of the shaft 2. Injection opening 6 for physiological saline is arranged on the proximal end of the two-way stopcock 5 in order to inflate the balloon. The balloon catheter in the present invention, of which the balloon is of a small diameter during deflation and for which a thinner sheath introducer can be used, can readily occlude a blood vessel.

摘要翻译： 球囊导管包括轴2，螺旋形螺旋形并安装在轴2的头部上的球形球囊1和通过连接管4与轮毂3在近端 轴2的端部。用于生理盐水的注射开口6布置在双向旋塞5的近端上，以使气囊膨胀。 本发明中的球囊导管，其气囊在放气期间具有小直径，并且可以使用更薄的护套导引器，其可以容易地封闭血管。

公开(公告)号：US06467766B2

公开(公告)日：2002-10-22

申请号：US09823758

申请日：2001-04-03

申请人： Hayato Minamishin ,  Yuji Tanaka ,  Hayami Abe

发明人： Hayato Minamishin ,  Yuji Tanaka ,  Hayami Abe

IPC分类号： B65H306

CPC分类号： B65H3/06 ,  B65H1/14 ,  B65H1/24 ,  B65H2511/20 ,  B65H2511/514 ,  B65H2701/1912 ,  B65H2220/02 ,  B65H2220/01 ,  B65H2220/11

摘要： An object of the paper sheet feed mechanism of the present invention is to provide a paper sheet feed mechanism in which delivery of paper sheets is stable. The paper sheet feed mechanism comprises a feed roller conveying paper money to the right direction of the drawing, a spring pressing the feed roller against the paper money, a sensor detecting the press force that the paper money receives by being pressed by the feed roller, a push-up board pushing up the paper money, and a control section regulating the height of the push-up board based on the detection result by the sensor, and also comprises a pick roller conveying the paper sheet at a conveyance speed faster than a conveyance speed by the feed roller.

摘要翻译： 本发明的纸张馈送机构的目的是提供一种纸张输送机构，其中纸张的输送是稳定的。 纸张进给机构包括：向纸张的正确方向传送纸币的进给辊，将进给辊压靠在纸币上的弹簧;传感器，用于检测纸币被进给辊按压而接收的按压力; 推上纸币的上推板，以及基于传感器的检测结果来调节上推板的高度的控制部，还包括以比传送速度快的输送速度传送纸张的拾取辊 送料辊的输送速度。

公开(公告)号：US06357598B1

公开(公告)日：2002-03-19

申请号：US09384207

申请日：1999-08-27

申请人： Atsunori Kimura ,  Yoichi Ono ,  Hayato Minamishin ,  Yuji Tanaka ,  Seiichi Ohno ,  Hidekazu Hata ,  Hiroyuki Ueda ,  Isamu Esaki ,  Atsushi Uchida

发明人： Atsunori Kimura ,  Yoichi Ono ,  Hayato Minamishin ,  Yuji Tanaka ,  Seiichi Ohno ,  Hidekazu Hata ,  Hiroyuki Ueda ,  Isamu Esaki ,  Atsushi Uchida

IPC分类号： B07C500

CPC分类号： G07D11/0018 ,  B65H83/025 ,  G07D11/0003 ,  G07D11/0021 ,  G07D11/0081 ,  Y10S209/90

摘要： A paper sheet manipulating apparatus and a paper sheet transaction apparatus for manipulating paper sheets such as bills has an inlet/outlet port allowing input and output of paper sheets and rotating between the paper sheets inlet position and the paper sheet feeding position; a separating device projected to the outlet port and drawn back to the draw-back position, distinguished, when projected, the paper sheets inputted to the inlet port and the paper sheets to be returned and accommodate the paper sheets into the outlet port; an accommodation section for accommodating the paper sheets; a temporary storing section for temporarily storing the paper sheets which should not be accommodated in the accommodation section or should not be exhausted and a plurality of cassettes for feeding and collecting the paper sheets in the accommodation section and for feeding and collecting the paper sheets in the outlet port, whereby few faults are generated and manipulations can be continued at a high speed for a long period of time without any pause even if a fault is generated.

摘要翻译： 用于操作诸如纸币的纸张的纸张操作装置和纸张交易装置具有允许纸张的输入和输出并在纸张进入位置和纸张进给位置之间旋转的入口/出口; 分离装置投影到出口并被拉回到拉回位置，当投影时输入到入口的纸张和要返回的纸张并将纸张容纳在出口中; 用于容纳纸张的容纳部分; 用于临时存放不应容纳在容纳部分中或不应排出的纸张的临时存储部分和用于将纸张进给和收集在容纳部分中的多个盒子，并用于将纸张进给和收集 出口端口，即使产生故障，生成的故障也很少，故可以高速持续长时间的操作。

公开(公告)号：US06314044B1

公开(公告)日：2001-11-06

申请号：US09594840

申请日：2000-06-15

申请人： Toshio Sasaki ,  Yuji Tanaka ,  Kazumasa Yanagisawa ,  Hitoshi Tanaka ,  Jun Sato ,  Takashi Miyamoto ,  Mariko Ohtsuka ,  Satoru Nakanishi ,  Kazushige Ayukawa ,  Takao Watanabe

发明人： Toshio Sasaki ,  Yuji Tanaka ,  Kazumasa Yanagisawa ,  Hitoshi Tanaka ,  Jun Sato ,  Takashi Miyamoto ,  Mariko Ohtsuka ,  Satoru Nakanishi ,  Kazushige Ayukawa ,  Takao Watanabe

IPC分类号： G11C800

CPC分类号： G11C8/12

摘要： A RAM mounted so as to mix with logic circuits has a plurality of memory mats and one control circuit provided for the plurality of memory mats. Arithmetic circuits for respectively performing +1 or −1 arithmetic operation are respectively provided so as to correspond to the respective memory mats and are electrically connected in cascade form. An input terminal of the initial-stage arithmetic circuit is supplied with address-setting fixed address signals. Input signals supplied to the next and subsequent arithmetic circuits or signals outputted therefrom are defined as own-assigned address signals (those assigned to the corresponding memory mats). A comparator provided in association with each arithmetic circuit referred to above makes comparisons for coincidence between the address signals and address signals input upon memory access. The corresponding memory mat is selected based on the resultant coincidence signal.

摘要翻译： 安装成与逻辑电路混合的RAM具有多个存储器垫和为多个存储器垫提供的一个控制电路。 分别提供用于分别执行+1或-1运算的算术电路，以对应于相应的存储器垫并且以级联形式电连接。 初始级算术电路的输入端被提供地址设定固定地址信号。 提供给下一个和后续运算电路的输入信号或从其输出的信号被定义为自己分配的地址信号（分配给相应的存储器垫的那些）。 与上述每个运算电路相关联地提供的比较器比较了存储器访问时输入的地址信号和地址信号之间的一致性。 基于所得到的一致信号来选择相应的存储器垫。