Generating test patterns used in testing semiconductor integrated circuit
    51.
    发明授权
    Generating test patterns used in testing semiconductor integrated circuit 失效
    生成用于测试半导体集成电路的测试图案

    公开(公告)号:US07225378B2

    公开(公告)日:2007-05-29

    申请号:US11238822

    申请日:2005-09-28

    IPC分类号: G06F11/00 G06F17/50

    摘要: A test pattern sequence to test a delay fault or an open fault which accompanies a delay occurring in an IC is easily and rapidly generated. A list of locations such as logic gates and signal lines within the circuit where a fault is likely to occur is prepared. One of the faults is selected and an initialization test pattern v1 which establishes an initial value for activating the fault at the location of a fault is determined by an implication operation. A propagation test pattern v2 which causes a stuck-at fault to be propagated to a following gate is determined by another implication operation. A sequence formed by v1 and v2 is registered with a test pattern list and the described operations are repeated until there remains no unprocessed fault in the fault list.

    摘要翻译: 用于测试伴随IC发生延迟的延迟故障或开路故障的测试模式序列容易且快速地产生。 准备了可能发生故障的电路内诸如逻辑门和信号线之类的位置列表。 选择其中一个故障,并通过暗示操作确定在故障位置确定激活故障的初始值的初始化测试模式v 1。 通过另一个含义操作来确定导致卡住故障传播到跟随门的传播测试图案v 2。 由v 1和v 2形成的序列用测试图案列表注册,并且重复所描述的操作,直到故障列表中没有未处理的故障。

    Generating test patterns used in testing semiconductor integrated circuit

    公开(公告)号:US07225377B2

    公开(公告)日:2007-05-29

    申请号:US11239414

    申请日:2005-09-28

    IPC分类号: G06F11/00 G06F17/50

    摘要: Selected test pattern sequences to be used in transient power supply current testing to detect path delay faults in an IC are easily and rapidly generated. A stored fault list of path delay faults is prepared. A train of transition signal values is calculated by simulation of transitions occurring in the IC when a test pattern sequence is applied to the IC, and respective path delay fault in the stored fault list is determined whether it is a detectable fault that is capable of being detected by the transient power supply current testing by using the transition signal values. Those detectable faults that exist in the stored fault list are deleted from the stored fault list and those test pattern sequences that are used to detect the detectable faults existing in the stored fault list are registered in a test pattern sequence list as the selected test pattern sequence.

    Pneumatic tire
    53.
    发明申请
    Pneumatic tire 有权
    气动轮胎

    公开(公告)号:US20060162831A1

    公开(公告)日:2006-07-27

    申请号:US10531725

    申请日:2003-11-11

    申请人: Masahiro Ishida

    发明人: Masahiro Ishida

    IPC分类号: B60C11/04

    CPC分类号: B60C11/0306 B60C11/0302

    摘要: A pneumatic tire having improved noise buffering capability and operation stability while maintaining excellent water discharge capability. A circumferential straight main groove (1) is provided at the center of a tread center region. Arc-like curved main grooves (3) where a plurality of arc-like grooves (3a) are circumferentially formed so as to be continuous in a repeated manner are arranged on both sides of the straight main groove (1). Further, circumferential auxiliary grooves (4) with a width smaller than that of any of the straight main groove (1) and arc-like curved main grooves (3) are provided in each of both tread shoulder regions.

    摘要翻译: 一种具有改善的噪声缓冲能力和操作稳定性同时保持优异的排水能力的充气轮胎。 在胎面中心区域的中心设有圆周直的主槽(1)。 在直的主槽(2)的两侧配置弧状的主槽(3),其中多个弧形槽(3a)沿周向形成为重复连续。 此外,在两个胎面胎肩区域中的每一个中设置有宽度比任何直的主槽(1)和弧形弯曲主槽(3)的宽度的周向辅助槽(4)。

    Pneumatic tire
    54.
    发明申请
    Pneumatic tire 有权
    气动轮胎

    公开(公告)号:US20060048876A1

    公开(公告)日:2006-03-09

    申请号:US10532069

    申请日:2003-11-27

    IPC分类号: B60C11/13 B60C11/03

    摘要: A tread surface, the tire rotational direction of which is specified in one direction, has a center region. Blocks having obtuse-angled corner portions and acute-angled corner portions are defined in the center region by at least one first circumferential groove extending in a circumferential direction of the tire on one side of the tire centerline, and first lateral grooves which extend outwardly in a widthwise direction of the tire from the first circumferential groove so as to incline towards a direction of reverse rotation of the tire and are disposed at predetermined intervals in the tire circumferential direction. Groove wall surfaces located on both sides of the obtuse-angled corner portion of each block facing to the first circumferential groove are inclined such that the inclination angles thereof are gradually greater towards the obtuse-angled corner portion and are maximum at the obtuse-angled corner portion.

    摘要翻译: 轮胎旋转方向在一个方向上指定的胎面表面具有中心区域。 具有钝角角部和锐角角部的块通过在轮胎中心线的一侧沿轮胎的圆周方向延伸的至少一个第一周向槽而限定在中心区域,以及第一侧向槽 轮胎从第一周向槽的宽度方向朝向轮胎的反向旋转方向倾斜,并且沿轮胎周向以预定间隔设置。 位于面向第一周向槽的每个块的钝角角部的两侧的槽壁表面倾斜,使得其倾斜角朝向钝角角部逐渐变大,并且在钝角处的角部最大 一部分。

    Generating test patterns used in testing semiconductor integrated circuit

    公开(公告)号:US20060031732A1

    公开(公告)日:2006-02-09

    申请号:US11238822

    申请日:2005-09-28

    IPC分类号: G01R31/28 G06F11/00

    摘要: A test pattern sequence which is used to test a delay fault or an open fault which accompanies a delay occurring in an IC is easily and rapidly generated. A list of locations such as logic gates and signal lines within the circuit where a fault is likely to occur is prepared (101). One of the faults is selected, and an initialization test pattern v1 which establishes an initial value for activating the fault at the location of a fault is determined by the implication operation (103), and a propagation test pattern v2 which causes a stuck-at fault to be propagated to a following gate is determined by the implication operation (105). A sequence formed by v1 and v2 is registered with a test pattern list (107), and the described operations are repeated until there remains no unprocessed fault in the fault list.

    Measurement instrument and measurement method
    56.
    发明申请
    Measurement instrument and measurement method 有权
    测量仪器和测量方法

    公开(公告)号:US20050267696A1

    公开(公告)日:2005-12-01

    申请号:US10925870

    申请日:2004-08-25

    摘要: A measuring apparatus for measuring reliability against jitter of an electronic device, including: a jitter tolerance estimator operable to estimate a jitter tolerance of the electronic device based on an output signal output from the electronic device according to an input signal input through a transmission line of which the transmission length is shorter than a predetermined length so that it does not generate a deterministic jitter; a jitter tolerance degradation quantity estimator operable to estimate a quantity of degradation of the jitter tolerance which deteriorates by the deterministic jitter caused in the input signal by transmission through the long transmission line when the input signal is input into the electronic device through the transmission line, of which the transmission length is longer than a predetermined length so that it may cause the deterministic jitter; a system jitter tolerance estimator operable to estimate a jitter tolerance of the electronic device and a jitter tolerance of a system including the long transmission line and the electronic device based on quantity of degradation of the jitter tolerance, is provided.

    摘要翻译: 一种用于测量电子设备抖动的可靠性的测量装置,包括:抖动容限估计器,用于根据从电子设备输出的输出信号,根据通过传输线输入的输入信号来估计电子设备的抖动容限 其传输长度短于预定长度,使得其不产生确定性抖动; 抖动容忍劣化量估计器,用于当通过传输线路将输入信号输入到电子设备中时,通过传输通过长传输线路来估计在输入信号中产生的确定性抖动而导致的抖动容差劣化的数量, 其传输长度大于预定长度,从而可能导致确定性抖动; 提供了一种用于估计电子设备的抖动容限的系统抖动容限估计器,以及基于抖动容限的劣化量的包括长传输线路和电子设备的系统的抖动容限。

    Testing apparatus and testing method
    57.
    发明申请
    Testing apparatus and testing method 失效
    检测仪器及检测方法

    公开(公告)号:US20050129104A1

    公开(公告)日:2005-06-16

    申请号:US10824763

    申请日:2004-04-14

    摘要: A testing device for testing an electronic device is provided. The testing device includes: a deterministic jitter application unit for applying deterministic jitter to a given input signal without causing an amplitude modulation component and supplying the input signal with the deterministic jitter to the electronic device; a jitter amount controller for controlling the magnitude of the deterministic jitter generated by the deterministic jitter application unit; and a determination unit for determining whether or not the electronic device is defective based on an output signal output from the electronic device in accordance with the input signal.

    摘要翻译: 提供了一种用于测试电子设备的测试设备。 测试设备包括:确定性抖动应用单元,用于将确定性抖动应用于给定的输入信号,而不引起幅度调制分量,并向电子设备提供具有确定性抖动的输入信号; 抖动量控制器,用于控制由确定性抖动施加单元产生的确定性抖动的大小; 以及确定单元,用于基于根据输入信号从电子设备输出的输出信号来确定电子设备是否有故障。

    Method of manufacturing nitride semiconductor substrate
    58.
    发明授权
    Method of manufacturing nitride semiconductor substrate 失效
    氮化物半导体衬底的制造方法

    公开(公告)号:US06864158B2

    公开(公告)日:2005-03-08

    申请号:US10032563

    申请日:2002-01-02

    申请人: Masahiro Ishida

    发明人: Masahiro Ishida

    IPC分类号: C30B25/18 H01L21/20

    摘要: A main surface of a base substrate of sapphire is selectively formed an irregular region on the main surface. Then, a semiconductor layer of gallium nitride is grown to fill recessed portions in the irregular region of the base substrate and make the upper surface even. Then, a laser beam is irradiated upon the interface between the semiconductor layer and the irregular region of the base substrate to separate the semiconductor layer from the base substrate. As a result, a nitride semiconductor substrate is produced from the semiconductor layer.

    摘要翻译: 蓝宝石基底基板的主表面选择性地形成在主表面上的不规则区域。 然后,生长氮化镓的半导体层以填充基底基板的不规则区域中的凹部,并使上表面均匀。 然后,将激光束照射在半导体层与基底基板的不规则区域之间的界面上,以将半导体层与基底基板分离。 结果,从半导体层制造氮化物半导体衬底。

    Method and apparatus for defect analysis of semiconductor integrated circuit
    59.
    发明授权
    Method and apparatus for defect analysis of semiconductor integrated circuit 失效
    半导体集成电路缺陷分析方法与装置

    公开(公告)号:US06828815B2

    公开(公告)日:2004-12-07

    申请号:US10779905

    申请日:2004-02-17

    IPC分类号: G01R3126

    CPC分类号: G01R31/3004 G01R31/3181

    摘要: A fault analysis method and apparatus which is able to improve the reliability of fault analysis of semiconductor integrated circuit. In case of supplying a test pattern sequence having a plurality of test patterns to the semiconductor IC, an analysis point whose electric potential changes according to the change of supplied test pattern is placed corresponding to the test pattern sequence. Then, a transient power supply current generated on the semiconductor IC according to the change of the test pattern is measured and determined whether the measured transient power supply current is abnormal or not. A defection point is presumed based on the test pattern sequence where the transient power supply current is abnormal, and the analysis point placed corresponding to the test pattern sequence.

    摘要翻译: 一种能够提高半导体集成电路故障分析可靠性的故障分析方法和装置。 在向半导体IC提供具有多个测试图案的测试图案序列的情况下,根据所提供的测试图案的变化对其电位变化的分析点与测试图案序列相对应。 然后,测量根据测试图案的变化在半导体IC上产生的瞬态电源电流,并确定测量的瞬态电源电流是否异常。 基于瞬态电源电流异常的测试图案序列推测出缺点,并且对应于测试图案序列放置分析点。

    Apparatus for and method of measuring a jitter
    60.
    发明授权
    Apparatus for and method of measuring a jitter 失效
    用于测量抖动的装置和方法

    公开(公告)号:US06775321B1

    公开(公告)日:2004-08-10

    申请号:US09703469

    申请日:2000-10-31

    IPC分类号: H04B1700

    CPC分类号: G01R29/26

    摘要: A signal under measurement is transformed into a complex analytic signal using Hilbert transformation to estimate an instantaneous phase of the signal under measurement from the complex analytic signal. A least mean square line of the instantaneous phase is calculated to obtain a linear instantaneous phase of the signal under measurement, and a zero-crossing timing of the signal under measurement is estimated using an interpolation method. Then a difference between the instantaneous phase and the linear instantaneous phase at the zero-crossing timing is calculated to estimate a timing jitter sequence. A jitter of the signal under measurement is obtained from the jitter sequence.

    摘要翻译: 使用希尔伯特变换将测量信号转换成复数分析信号,以从复数分析信号估计测量信号的瞬时相位。 计算瞬时相位的最小均方根以获得测量信号的线性瞬时相位,并且使用内插方法估计测量信号的过零定时。 然后计算在过零时刻的瞬时相位和线性瞬时相位之间的差以估计定时抖动序列。 从抖动序列获得测量信号的抖动。