公开(公告)号：US10355014B1

公开(公告)日：2019-07-16

申请号：US15852989

申请日：2017-12-22

Applicant: Micron Technology, Inc.

Inventor： David Ross Economy ,  John Mark Meldrim ,  Haoyu Li ,  Yongjun Jeff Hu ,  Christopher W. Petz ,  Daniel Billingsley ,  Everett A. McTeer

IPC: H01L27/11582 ,  H01L27/11556 ,  H01L27/11519 ,  H01L21/311 ,  H01L27/11565 ,  H01L21/768

Abstract: Some embodiments include an assembly which has channel material pillars, and which has memory cells along the channel material pillars. A conductive structure is under the channel material pillars. The conductive structure has doped semiconductor material in direct contact with bottom regions of the channel material pillars. One or more of magnesium, scandium, yttrium and lanthanide elements is along the bottom regions of the channel material pillars. Some embodiments include methods of forming assemblies. A structure is formed, and a mass is formed against an upper surface of the structure. Plugs are formed within openings in the mass. The plugs comprise a second material over a first material. The first material includes one or more of magnesium, scandium, yttrium and lanthanide elements. Openings are formed to terminate on the first material, and are then extended through the first material. Channel material pillars are formed within the openings.

公开(公告)号：US20190198518A1

公开(公告)日：2019-06-27

申请号：US15852955

申请日：2017-12-22

Applicant: Micron Technology, Inc.

Inventor： Nancy M. Lomeli ,  Tom George ,  Jordan D. Greenlee ,  Scott M. Pook ,  John Mark Meldrim

IPC: H01L27/11582 ,  H01L29/10 ,  H01L23/535 ,  G11C16/04 ,  H01L21/768 ,  H01L21/02 ,  H01L27/11556

CPC classification number: H01L27/11582 ,  G11C16/0483 ,  H01L21/02532 ,  H01L21/76807 ,  H01L21/76843 ,  H01L21/76877 ,  H01L23/535 ,  H01L27/11556 ,  H01L29/1037 ,  H01L29/7883 ,  H01L29/7889 ,  H01L29/7926

Abstract: Some embodiments include a conductive structure of an integrated circuit. The conductive structure includes an upper primary portion, with the upper primary portion having a first conductive constituent configured as a container. The container has a bottom, and a pair of sidewalls extending upwardly from the bottom. An interior region of the container is over the bottom and between the sidewalls. The upper primary portion includes a second conductive constituent configured as a mass filling the interior region of the container. The second conductive constituent is a different composition than the first conductive constituent. One or more conductive projections join to the upper primary portion and extend downwardly from the upper primary portion. Some embodiments include assemblies comprising memory cells over conductive structures. Some embodiments include methods of forming conductive structures.

公开(公告)号：US10170493B1

公开(公告)日：2019-01-01

申请号：US15848398

申请日：2017-12-20

Applicant: Micron Technology, Inc.

Inventor： Jordan D. Greenlee ,  John Mark Meldrim ,  Everett A. McTeer

IPC: H01L27/11556 ,  H01L27/11582 ,  H01L21/285 ,  H01L27/11565 ,  H01L27/11519

Abstract: Some embodiments include a method in which an assembly is formed to have voids within a stack, and to have slits adjacent the voids. Peripheral boundaries of the voids have proximal regions near the slits and distal regions adjacent the proximal regions. A material is deposited within the voids under conditions which cause the material to form to a greater thickness along the distal regions than along the proximal regions. Some embodiments include an assembly having a stack of alternating first and second levels. The second levels include conductive material. Panel structures extend through the stack. The conductive material within the second levels has outer edges with proximal regions near the panel structures and distal regions adjacent the proximal regions. Interface material is along the outer edges of the conductive material and has a different composition along the proximal regions than along the distal regions.

公开(公告)号：US10164044B2

公开(公告)日：2018-12-25

申请号：US14688387

申请日：2015-04-16

Applicant: Micron Technology, Inc.

Inventor： Yushi Hu ,  John Mark Meldrim ,  Eric Blomiley ,  Everett Allen McTeer ,  Matthew J. King

IPC: H01L29/49 ,  H01L21/28 ,  H01L29/66 ,  H01L29/78 ,  H01L29/06

Abstract: Some embodiments disclose a gate stack having a gate (e.g., polysilicon (poly) material) horizontally between shallow trench isolations (STIs), a tungsten silicide (WSix) material over the gate and the STIs, and a tungsten silicon nitride (WSiN) material on a top surface of the WSix material. Some embodiments disclose a gate stack having a gate between STIs, a first WSix material over the gate and the STIs, a WSiN interlayer material on a top surface of the first WSix material, and a second WSix material on a top surface of the WSiN interlayer material. Additional embodiments are disclosed.

公开(公告)号：US20170117449A1

公开(公告)日：2017-04-27

申请号：US15399372

申请日：2017-01-05

Applicant: Micron Technology, Inc.

Inventor： Yongjun Jeff Hu ,  John Mark Meldrim ,  Shanming Mou ,  Everett Allen McTeer

IPC: H01L33/62 ,  H01L33/00

CPC classification number: H01L33/62 ,  H01L33/0066 ,  H01L33/0075 ,  H01L33/32 ,  H01L33/40 ,  H01L33/46 ,  H01L2924/0002 ,  H01L2933/0016 ,  H01L2933/0066 ,  H01L2924/00

Abstract: A composition and method for formation of ohmic contacts on a semiconductor structure are provided. The composition includes a TiAlxNy material at least partially contiguous with the semiconductor structure. The TiAlxNy material can be TiAl3. The composition can include an aluminum material, the aluminum material being contiguous to at least part of the TiAlxNy material, such that the TiAlxNy material is between the aluminum material and the semiconductor structure. The method includes annealing the composition to form an ohmic contact on the semiconductor structure.

公开(公告)号：US11647633B2

公开(公告)日：2023-05-09

申请号：US16927293

申请日：2020-07-13

Applicant: Micron Technology, Inc.

Inventor： Jivaan Kishore Jhothiraman ,  John Mark Meldrim

IPC: H01L27/1157 ,  H01L27/11565 ,  H01L27/11582

CPC classification number: H01L27/1157 ,  H01L27/11565 ,  H01L27/11582

Abstract: A method used in forming integrated circuitry comprises forming a stack comprising vertically-alternating first tiers and second tiers. The stack comprises a cavity therein that comprises a stair-step structure. Sidewalls of the cavity and steps of the stair-step structure are lined with an insulator material. Insulative material is formed in the cavity radially inward of the insulator material. An upper portion of the insulative material is removed from the cavity to leave the insulative material in a bottom of the cavity over the stair-step structure. After the removing, insulating material is formed in the cavity above the insulative material. Other embodiments, including structure independent of method, are disclosed.

公开(公告)号：US20230121315A1

公开(公告)日：2023-04-20

申请号：US18083428

申请日：2022-12-16

Applicant: Micron Technology, Inc.

Inventor： David Ross Economy ,  Rita J. Klein ,  Jordan D. Greenlee ,  John Mark Meldrim ,  Brenda D. Kraus ,  Everett A. McTeer

IPC: H01L29/49 ,  H10B41/10 ,  H10B43/10 ,  H10B43/27 ,  H10B41/27

Abstract: Some embodiments include a memory array having a vertical stack of alternating insulative levels and control gate levels. Channel material extends vertically along the stack. The control gate levels comprising conductive regions. The conductive regions include at least three different materials. Charge-storage regions are adjacent the control gate levels. Charge-blocking regions are between the charge-storage regions and the conductive regions.

公开(公告)号：US20220028996A1

公开(公告)日：2022-01-27

申请号：US17496715

申请日：2021-10-07

Applicant: Micron Technology, Inc.

Inventor： Jordan D. Greenlee ,  Rita J. Klein ,  Everett A. McTeer ,  John Mark Meldrim

IPC: H01L29/49 ,  H01L27/11556 ,  H01L27/11582

Abstract: Some embodiments include a memory array having a vertical stack of alternating insulative levels and wordline levels. Channel material extends vertically along the stack. The wordline levels include conductive regions which have a first metal-containing material and a second metal-containing material. The first metal-containing material at least partially surrounds the second metal-containing material. The first metal-containing material has a different crystallinity than the second metal-containing material. In some embodiments the first metal-containing material is substantially amorphous, and the second metal-containing material has a mean grain size within a range of from greater than or equal to about 5 nm to less than or equal to about 200 nm. Charge-storage regions are adjacent the wordline levels. Charge-blocking regions are between the charge-storage regions and the conductive regions.

公开(公告)号：US20220013530A1

公开(公告)日：2022-01-13

申请号：US16927293

申请日：2020-07-13

Applicant: Micron Technology, Inc.

Inventor： Jivaan Kishore Jhothiraman ,  John Mark Meldrim

IPC: H01L27/1157 ,  H01L27/11565 ,  H01L27/11582

Abstract: A method used in forming integrated circuitry comprises forming a stack comprising vertically-alternating first tiers and second tiers. The stack comprises a cavity therein that comprises a stair-step structure. Sidewalls of the cavity and steps of the stair-step structure are lined with an insulator material. Insulative material is formed in the cavity radially inward of the insulator material. An upper portion of the insulative material is removed from the cavity to leave the insulative material in a bottom of the cavity over the stair-step structure. After the removing, insulating material is formed in the cavity above the insulative material. Other embodiments, including structure independent of method, are disclosed.

公开(公告)号：US20210257526A1

公开(公告)日：2021-08-19

申请号：US17223732

申请日：2021-04-06

Applicant: Micron Technology, Inc.

Inventor： Yongjun Jeff Hu ,  John Mark Meldrim ,  Shanming Mou ,  Everett Allen McTeer

IPC: H01L33/62 ,  H01L33/40 ,  H01L33/00

Abstract: A composition and method for formation of ohmic contacts on a semiconductor structure are provided. The composition includes a TiAlxNy material at least partially contiguous with the semiconductor structure. The TiAlxNy material can be TiAl3. The composition can include an aluminum material, the aluminum material being contiguous to at least part of the TiAlxNy material, such that the TiAlxNy material is between the aluminum material and the semiconductor structure. The method includes annealing the composition to form an ohmic contact on the semiconductor structure.