公开(公告)号：US20140186229A1

公开(公告)日：2014-07-03

申请号：US13948967

申请日：2013-07-23

Applicant: Anna Lee Y. Tonkovich ,  Robert D. Litt ,  Timothy M. Werner ,  Bin Yang

Inventor： Anna Lee Y. Tonkovich ,  Robert D. Litt ,  Timothy M. Werner ,  Bin Yang

IPC: B01J19/18

CPC classification number: B01J19/0093 ,  B01J19/1831 ,  B01J2219/00783 ,  B01J2219/00835 ,  B01J2219/00873 ,  B01J2219/00984 ,  C07C29/152 ,  C10G2/341 ,  C07C31/04

Abstract: An integrated microchannel reactor and heat exchanger comprising: (a) a waveform sandwiched between opposing shim sheets and mounted to the shim sheets to form a series of microchannels, where each microchannel includes a pair of substantially straight side walls, and a top wall formed by at least one of the opposing shim sheets, and (b) a first set of microchannels in thermal communication with the waveform, where the waveform has an aspect ratio greater than two.

Abstract translation: 一种集成微通道反应器和热交换器，包括：（a）夹在相对的垫片之间的波形并安装到垫片以形成一系列微通道，其中每个微通道包括一对基本上直的侧壁，以及由 至少一个相对的垫片，和（b）与波形热连通的第一组微通道，其中波形的纵横比大于2。

公开(公告)号：US08765537B2

公开(公告)日：2014-07-01

申请号：US13606035

申请日：2012-09-07

Applicant: Man Fai Ng ,  Bin Yang

Inventor： Man Fai Ng ,  Bin Yang

IPC: H01L21/338

CPC classification number: H01L21/28114 ,  H01L29/42376 ,  H01L29/66545 ,  H01L29/6659 ,  H01L29/7833

Abstract: A high-k metal gate electrode is formed with reduced gate voids. An embodiment includes forming a replaceable gate electrode, for example of amorphous silicon, having a top surface and a bottom surface, the top surface being larger than the bottom surface, removing the replaceable gate electrode, forming a cavity having a top opening larger than a bottom opening, and filling the cavity with metal. The larger top surface may be formed by etching the bottom portion of the amorphous silicon at greater temperature than the top portion, or by doping the top and bottom portions of the amorphous silicon differently such that the bottom has a greater lateral etch rate than the top.

Abstract translation: 形成具有减小的栅极空隙的高k金属栅电极。 一个实施例包括形成可替换的栅电极，例如具有顶表面和底表面的非晶硅，顶表面大于底表面，去除可更换的栅电极，形成具有大于 底部开口，并用金属填充空腔。 可以通过在比顶部更高的温度下蚀刻非晶硅的底部，或者通过不同地掺杂非晶硅的顶部和底部来形成较大的顶表面，使得底部具有比顶部更大的侧向蚀刻速率 。

公开(公告)号：US08729017B2

公开(公告)日：2014-05-20

申请号：US13494480

申请日：2012-06-12

Applicant: Richard D. DiMarchi ,  David L. Smiley ,  Bin Yang

Inventor： Richard D. DiMarchi ,  David L. Smiley ,  Bin Yang

IPC: A61K38/26 ,  A61P3/10 ,  C07K14/605

CPC classification number: C07K14/605 ,  A61K38/00 ,  A61K47/60 ,  C07K2319/00 ,  G01N33/74 ,  G01N2333/605 ,  G01N2800/042 ,  G01N2800/085 ,  G01N2800/2821 ,  G01N2800/2835

Abstract: Provided herein are peptides and variant peptides that exhibit enhanced activity at the GLP-1 receptor, as compared to native glucagon.

Abstract translation: 本文提供了与天然胰高血糖素相比显示增强的GLP-1受体活性的肽和变体肽。

公开(公告)号：US08632152B2

公开(公告)日：2014-01-21

申请号：US12920267

申请日：2009-02-27

Applicant: Jinghua Shen ,  Yapeng Chen ,  Bin Yang ,  Lidong Wang

Inventor： Jinghua Shen ,  Yapeng Chen ,  Bin Yang ,  Lidong Wang

IPC: B41J29/38 ,  B41J29/393 ,  B41J2/15

CPC classification number: G06K15/02 ,  H04N1/40068

Abstract: Disclosed is a method for printing an image, comprising a step of rasterizing an image to be printed in view of a first resolution to generate a first data bitmap; a step of splitting the first data bitmap according to a ratio of the first resolution to a second resolution to generate second data bitmaps; and a step of outputting the second data bitmaps to a printer with the second resolution for printing. Disclosed is also a device for printing images. The method and device for printing an image may solve the problem in the prior art that the definition of an image printed from a printer is too low and improve the definition of an image printed from a printer.

Abstract translation: 公开了一种打印图像的方法，包括：根据第一分辨率光栅化要打印的图像以生成第一数据位图的步骤; 根据第一分辨率与第二分辨率的比率分割第一数据位图以产生第二数据位图的步骤; 以及将第二数据位图输出到具有用于打印的第二分辨率的打印机的步骤。 公开了一种用于打印图像的装置。 用于打印图像的方法和设备可以解决现有技术中从打印机打印的图像的定义太低并且提高从打印机打印的图像的定义的问题。

公开(公告)号：US20140002864A1

公开(公告)日：2014-01-02

申请号：US13996907

申请日：2011-12-23

Applicant: Haifeng Li ,  Bin Yang

Inventor： Haifeng Li ,  Bin Yang

IPC: H04N1/405

CPC classification number: H04N1/4058 ,  G06T11/40 ,  G09G3/2011 ,  G09G2300/0426 ,  G09G2300/0443 ,  G09G2300/0452 ,  H04N1/4055

Abstract: An amplitude modulation screening method is provided. The method comprises a step of utilizing regular hexagon screen dots to form a threshold matrix for amplitude screening. In embodiments of the present application, an amplitude modulation screening apparatus is also provided. The apparatus may comprise a matrix module configured to constitute a threshold matrix for amplitude screening using regular hexagon screen dots. Due to the threshold matrix formed with regular hexagon screen dots, the method and apparatus of the present application resolve the problem of the screen dots in the prior art, and improve the printing quality.

Abstract translation: 提供了一种幅度调制屏蔽方法。 该方法包括利用正六边形屏幕点形成用于振幅筛选的阈值矩阵的步骤。 在本申请的实施例中，还提供了幅度调制筛选装置。 该装置可以包括矩阵模块，该矩阵模块被配置为使用正六边形屏幕点构成用于振幅筛选的阈值矩阵。 由于由正六边形屏幕点形成的阈值矩阵，本申请的方法和装置解决了现有技术中屏幕点的问题，并提高了打印质量。

公开(公告)号：US20130123178A1

公开(公告)日：2013-05-16

申请号：US13697018

申请日：2011-05-10

Applicant: Richard D. DiMarchi ,  Bin Yang ,  Brian Finan

Inventor： Richard D. DiMarchi ,  Bin Yang ,  Brian Finan

IPC: C07K14/72 ,  C07K14/605

CPC classification number: C07K14/721 ,  A61K38/26 ,  A61K47/55 ,  A61K47/554 ,  A61K47/64 ,  C07K14/605 ,  C07K14/72

Abstract: Provided herein are glucagon superfamily peptides conjugated with NHR ligands that are capable of acting at a nuclear hormone receptor. Also provided herein are pharmaceutical compositions and kits of the conjugates of the invention. Further provided herein are methods of treating a disease, e.g., a metabolic disorder, such as diabetes and obesity, comprising administering the conjugates of the invention.

Abstract translation: 本文提供了与能够作用于核激素受体的NHR配体缀合的胰高血糖素超家族肽。 本文还提供了本发明的缀合物的药物组合物和试剂盒。 本文还提供了治疗疾病，例如代谢紊乱（例如糖尿病和肥胖症）的方法，其包括施用本发明的缀合物。

公开(公告)号：US20130007824A1

公开(公告)日：2013-01-03

申请号：US13581628

申请日：2011-06-24

Applicant: Jianhua Kong ,  Bin Yang ,  Liming Zhou

Inventor： Jianhua Kong ,  Bin Yang ,  Liming Zhou

IPC: H04N21/20

CPC classification number: H04N21/25891 ,  H04L65/4076 ,  H04N21/25

Abstract: The disclosure provides a match-rule based service message transfer method and system in the IPTV, to address the problems in the IPTV message system of message storing and backlog, low push efficiency and poor usability. In the disclosure, match fields are arranged in a set-top box and a service message to be sent, the service message is sent by means of broadcast or multicast, the set-top box performs matching for the match fields based on the match rule, and filters the message. The disclosure avoids sending a service message by means of unicast, increases the push efficiency and can greatly reduce the storage load of offline messages in a message system. The formed message may be sent according to a single or combined policy which depends on a specific service attribute, thereby greatly facilitating the service operation.

公开(公告)号：US08236693B2

公开(公告)日：2012-08-07

申请号：US11748743

申请日：2007-05-15

Applicant: Wen Yu ,  Paul Besser ,  Bin Yang ,  Haijiang Yu ,  Simon S. Chan

Inventor： Wen Yu ,  Paul Besser ,  Bin Yang ,  Haijiang Yu ,  Simon S. Chan

IPC: H01L21/44

CPC classification number: H01L21/324 ,  H01L21/28052 ,  H01L29/66507 ,  H01L29/78

Abstract: The gate and active regions of a device are formed and alternating steps of applying and removing nitride and oxide layers allows exposing silicon in different areas while keeping silicon or polysilicon in other area covered with nitride. Metal layers are deposited over the exposed silicon or polysilicon and annealing forms a silicide layer in the selected exposed areas. The oxide and/or nitride layers are removed from the covered areas and another metal layer is deposited. The anneal process is repeated with silicide of one thickness formed over the second exposed areas with additional thickness of silicide formed over the previous silicide thickness.

Abstract translation: 形成器件的栅极和有源区，并且施加和去除氮化物和氧化物层的交替步骤允许在不同区域暴露硅，同时保持覆盖有氮化物的其它区域中的硅或多晶硅。 金属层沉积在暴露的硅或多晶硅上，退火在所选择的暴露区域中形成硅化物层。 氧化物层和/或氮化物层从被覆盖区域移除，另一个金属层被沉积​​。 在第二暴露区域上形成一层厚度的硅化物，并在先前的硅化物厚度上形成附加的硅化物厚度来重复退火工艺。

公开(公告)号：US20110230017A1

公开(公告)日：2011-09-22

申请号：US12726736

申请日：2010-03-18

Applicant: Marwan H. Khater ,  Christian Lavoie ,  Bin Yang ,  Zhen Zhang

Inventor： Marwan H. Khater ,  Christian Lavoie ,  Bin Yang ,  Zhen Zhang

IPC: H01L21/336

CPC classification number: H01L29/7839 ,  H01L29/78654

Abstract: A method of fabricating a Schottky field effect transistor is provided that includes providing a substrate having at least a first semiconductor layer overlying a dielectric layer, wherein the first semiconductor layer has a thickness of less than 10.0 nm. A gate structure is formed directly on the first semiconductor layer. A raised semiconductor material is selectively formed on the first semiconductor layer adjacent to the gate structure. The raised semiconductor material is converted into Schottky source and drain regions composed of a metal semiconductor alloy. A non-reacted semiconductor material is present between the Schottky source and drain regions and the dielectric layer.

Abstract translation: 提供一种制造肖特基场效应晶体管的方法，其包括提供具有覆盖在电介质层上的至少第一半导体层的衬底，其中第一半导体层具有小于10.0nm的厚度。 栅极结构直接形成在第一半导体层上。 凸起的半导体材料选择性地形成在与栅极结构相邻的第一半导体层上。 凸起的半导体材料被转换成由金属半导体合金构成的肖特基源极和漏极区域。 在肖特基源极和漏极区域与电介质层之间存在未反应的半导体材料。

公开(公告)号：US20110227157A1

公开(公告)日：2011-09-22

申请号：US12726889

申请日：2010-03-18

Applicant: Bin Yang ,  Man Fai Ng

Inventor： Bin Yang ,  Man Fai Ng

IPC: H01L27/12 ,  H01L21/762 ,  H01L29/786

CPC classification number: H01L29/78618 ,  H01L21/76232 ,  H01L21/76283 ,  H01L21/84 ,  H01L27/1203 ,  H01L27/1211 ,  H01L29/66477 ,  H01L29/66545 ,  H01L29/66628 ,  H01L29/66772 ,  H01L29/78 ,  H01L29/78684 ,  H01L29/78696

Abstract: A semiconductor is formed on an SOI substrate, such as an extremely thin SOI (ETSOI) substrate, with increased extension thickness. Embodiments include semiconductor devices having an epitaxially formed silicon-containing layer, such as embedded silicon germanium (eSiGe), on the SOI substrate. An embodiment includes forming an SOI substrate, epitaxially forming a silicon-containing layer on the SOI substrate, and forming a gate electrode on the epitaxially formed silicon-containing layer. After gate spacers and source/drain regions are formed, the gate electrode and underlying silicon-containing layer are removed and replaced with a high-k metal gate. The use of an epitaxially formed silicon-containing layer reduces SOI thickness loss due to fabrication process erosion, thereby increasing extension thickness and lowering extension resistance.

Abstract translation: 在诸如极薄的SOI（ETSOI）衬底的SOI衬底上形成半导体，具有增加的延伸厚度。 实施例包括在SOI衬底上具有外延形成的含硅层（例如嵌入硅锗（eSiGe））的半导体器件。 实施例包括形成SOI衬底，在SOI衬底上外延形成含硅层，并在外延形成的含硅层上形成栅电极。 在形成栅极间隔物和源极/漏极区之后，去除栅电极和下面的含硅层，并用高k金属栅极代替。 使用外延形成的含硅层由于制造工艺侵蚀而减少SOI厚度损失，从而增加延伸厚度并降低延伸电阻。