公开(公告)号：US12125799B2

公开(公告)日：2024-10-22

申请号：US17517608

申请日：2021-11-02

Applicant: Texas Instruments Incorporated

Inventor： Woochan Kim ,  Mutsumi Masumoto ,  Kengo Aoya ,  Vivek Kishorechand Arora ,  Anindya Poddar

IPC: H01L23/538 ,  H01L21/56 ,  H01L23/373 ,  H01L23/498

CPC classification number: H01L23/5389 ,  H01L21/568 ,  H01L23/3735 ,  H01L23/49861

Abstract: Packaged electronic devices and integrated circuits include a ceramic material or other thermally conductive, electrically insulating substrate with a patterned electrically conductive feature on a first side, and an electrically conductive layer on a second side. The IC further includes a semiconductor die mounted to the substrate, the semiconductor die including an electrically conductive contact structure, and an electronic component, with an electrically insulating lamination structure enclosing the semiconductor die, the frame and the thermal transfer structure. A redistribution layer with a conductive structure is electrically connected to the electrically conductive contact structure.

公开(公告)号：US20240332141A1

公开(公告)日：2024-10-03

申请号：US18194463

申请日：2023-03-31

Applicant: Texas Instruments Incorporated

Inventor： Kwang-Soo Kim ,  Makoto Shibuya ,  Woochan Kim

IPC: H01L23/495 ,  H01L21/48 ,  H01L21/56 ,  H01L23/00 ,  H01L23/31 ,  H01L23/373

CPC classification number: H01L23/49555 ,  H01L21/4853 ,  H01L21/56 ,  H01L23/3121 ,  H01L23/3735 ,  H01L23/49562 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L2224/32245 ,  H01L2224/45124 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45664 ,  H01L2224/48137 ,  H01L2224/48175 ,  H01L2224/48472 ,  H01L2224/73265

Abstract: A semiconductor device includes: a package substrate having a device mount surface and on an opposite bottom side surface; at least one semiconductor die mounted on the device mount surface; and leads having a base portion attached to the device mount surface and having an internal portion extending away from a first bend at a first angle, the internal portion of the leads extending to a second bend, a remaining portion of the leads extending from the second bend and lying in a horizontal plane parallel to the device mount surface, the leads having a third bend in the remaining portion forming terminals extending at a second angle with respect to the horizontal plane of the remaining portion. Mold compound covers the device mount surface, portions of the leads, and the semiconductor die. The terminals are exposed at a board side surface of the mold compound.

公开(公告)号：US11929311B2

公开(公告)日：2024-03-12

申请号：US17502706

申请日：2021-10-15

Applicant: Texas Instruments Incorporated

Inventor： Vivek K Arora ,  Woochan Kim

IPC: H01L23/495 ,  H01F27/28 ,  H01L21/56 ,  H01L23/00 ,  H01L23/31 ,  H01L23/373

CPC classification number: H01L23/49575 ,  H01F27/2804 ,  H01L21/56 ,  H01L23/3107 ,  H01L23/3738 ,  H01L23/49513 ,  H01L23/49562 ,  H01L24/48 ,  H01L24/73 ,  H01L24/92 ,  H01F2027/2809 ,  H01L2224/48175 ,  H01L2224/48195 ,  H01L2224/73265 ,  H01L2224/92247

Abstract: A power converter package includes a leadframe including first and second die pads, and supports connected to first leads, and second leads. A first semiconductor die including first bond pads is on the first die pad, and a second semiconductor die including second bond pads is on the second die pad. A transformer stack includes a top magnetic sheet and a bottom magnetic sheet on respective sides of a laminate substrate that includes a coil within, and coil contacts. A silicon block is attached to the bottom magnetic sheet and edges of the laminate substrate are attached to the supports. Bond wires are between the first bond pads and the second leads, the second bond pads and the second leads, and the first and second bond pads and the coil contacts. Mold encapsulates the respective semiconductor and the transformer stack. A bottom of the silicon block is exposed from the mold.

公开(公告)号：US20230378034A1

公开(公告)日：2023-11-23

申请号：US18363496

申请日：2023-08-01

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Woochan Kim ,  Vivek Kishorechand Arora

IPC: H01L23/495 ,  H01L25/065 ,  H02M3/156 ,  H01L23/538 ,  H01L25/07 ,  H01L25/16 ,  H01L21/48 ,  H01L23/48

CPC classification number: H01L23/49575 ,  H01L25/0657 ,  H02M3/156 ,  H01L23/5389 ,  H01L25/072 ,  H01L23/5387 ,  H01L25/165 ,  H01L23/5383 ,  H01L21/4885 ,  H01L23/5384 ,  H01L23/481 ,  H02M1/0012

Abstract: A semiconductor package includes a substrate, a set of terminals protruding from a first surface of the substrate, a power stage physically and thermally coupled to the first surface of the substrate, and a flexible circuit including at least one circuit layer forming power stage conductors and control circuit conductors disposed on a flexible insulating substrate layer. The power stage is between the flexible circuit and the substrate and is mounted on a first surface of the flexible circuit such that the power stage is electrically connected to the power stage conductors. The package includes a die mounted on a second surface of the flexible circuit opposite the power stage. An output of the die is electrically connected to an input of the power stage via the control circuit conductors.

公开(公告)号：US20230378022A1

公开(公告)日：2023-11-23

申请号：US17749311

申请日：2022-05-20

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： KWANG-SOO KIM ,  Vivek Kishorechand Arora ,  Woochan Kim

IPC: H01L23/373 ,  H01L25/07 ,  H01L23/00 ,  H01L23/498 ,  H01L21/48

CPC classification number: H01L23/3735 ,  H01L25/072 ,  H01L24/48 ,  H01L23/49861 ,  H01L21/4839 ,  H01L23/49822 ,  H01L23/49844 ,  H01L2924/1033 ,  H01L2924/1306 ,  H01L2224/48245 ,  H01L24/32 ,  H01L2224/32227 ,  H01L2224/73265 ,  H01L24/73 ,  H01L2224/48137

Abstract: A power module includes an interconnect of an integrated circuit (IC) package having a heat slug. The power module also includes a direct bonded copper (DBC) substrate. The DBC substrate has a first surface formed of pattern copper, the patterned copper has a pad and a second surface that opposes the first surface, the second surface has a sheet of copper. The second surface of the DBC substrate is thermally coupled to the heat slug. The power module further includes a die mounted on the pad of the first surface of the DBC substrate. The die has a power transistor. The die and the heat slug are thermally coupled and electrically isolated.

公开(公告)号：US20230119127A1

公开(公告)日：2023-04-20

申请号：US17502706

申请日：2021-10-15

Applicant: Texas Instruments Incorporated

Inventor： Vivek K. Arora ,  Woochan Kim

IPC: H01L23/495 ,  H01L23/00 ,  H01L23/31 ,  H01L23/373 ,  H01L21/56 ,  H01F27/28

Abstract: A power converter package includes a leadframe including first and second die pads, and supports connected to first leads, and second leads. A first semiconductor die including first bond pads is on the first die pad, and a second semiconductor die including second bond pads is on the second die pad. A transformer stack includes a top magnetic sheet and a bottom magnetic sheet on respective sides of a laminate substrate that includes a coil within, and coil contacts. A silicon block is attached to the bottom magnetic sheet and edges of the laminate substrate are attached to the supports. Bond wires are between the first bond pads and the second leads, the second bond pads and the second leads, and the first and second bond pads and the coil contacts. Mold encapsulates the respective semiconductor and the transformer stack. A bottom of the silicon block is exposed from the mold.

公开(公告)号：US20230060830A1

公开(公告)日：2023-03-02

申请号：US17461423

申请日：2021-08-30

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Woochan Kim ,  Vivek Kishorechand Arora ,  Makoto Shibuya ,  Kengo Aoya

IPC: H02M7/527 ,  H02M3/00 ,  H02M3/158 ,  H02M7/00 ,  H01L29/20 ,  H01L29/16

Abstract: A power converter module includes power transistors and a substrate having a first surface and a second surface that opposes the first surface. A thermal pad is situated on the second surface of the substrate, and the thermal pad is configured to be thermally coupled to a heat sink. The power converter module also includes a control module mounted on a first surface of the substrate. The control module also includes control IC chips coupled to the power transistors. A first control IC chip controls a first switching level of the power converter module and a second control IC chip controls a second switching level of the power converter module. Shielding planes overlay the substrate. A first shielding plane is situated between the thermal pad and the first control IC chip and a second shielding plane is situated between the thermal pad and a second control IC chip.

公开(公告)号：US20220108955A1

公开(公告)日：2022-04-07

申请号：US17517608

申请日：2021-11-02

Applicant: Texas Instruments Incorporated

Inventor： Woochan Kim ,  Mutsumi Masumoto ,  Kengo Aoya ,  Vivek Kishorechand Arora ,  Anindya Poddar

IPC: H01L23/538 ,  H01L23/498 ,  H01L21/56 ,  H01L23/373

Abstract: Packaged electronic devices and integrated circuits include a ceramic material or other thermally conductive, electrically insulating substrate with a patterned electrically conductive feature on a first side, and an electrically conductive layer on a second side. The IC further includes a semiconductor die mounted to the substrate, the semiconductor die including an electrically conductive contact structure, and an electronic component, with an electrically insulating lamination structure enclosing the semiconductor die, the frame and the thermal transfer structure. A redistribution layer with a conductive structure is electrically connected to the electrically conductive contact structure.

公开(公告)号：US20220029519A1

公开(公告)日：2022-01-27

申请号：US17318276

申请日：2021-05-12

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Woochan Kim ,  Vivek Kishorechand Arora ,  David Ryan Huitink ,  Hayden Seth Carlton ,  Fang Luo ,  Asif Imran Emon

IPC: H02M1/00 ,  H05K7/20

Abstract: A power conversion module includes a motherboard having a first surface and a second surface that opposes the first surface. The motherboard includes a first trace that electrically couples a decoupling capacitor mounted on the motherboard to a first pad on the first surface of the motherboard and an output node of a power conversion module. The motherboard includes a via extending through the motherboard that electrically couples a second pad on the first surface of the motherboard and a third pad on the second surface of the motherboard to the output node and a second trace that electrically couples a fourth pad on the second surface of the motherboard and the decoupling capacitor. The power module includes a first daughterboard mounted on the first surface of the motherboard and a second daughterboard mounted on the second surface of the motherboard.

公开(公告)号：US11158567B2

公开(公告)日：2021-10-26

申请号：US16537517

申请日：2019-08-09

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Woochan Kim ,  Vivek Kishorechand Arora ,  Benjamin Allen Samples

IPC: H01L23/495 ,  H05K7/14 ,  H01L23/34 ,  H01L23/00

Abstract: A package includes a semiconductor die forming a power field effect transistor (FET), a control die, and a first leadframe. The control die is arranged on a first surface of the first leadframe, and the semiconductor die is arranged on an opposing second surface of the first leadframe. The package further includes a second leadframe including a first surface and a second surface opposing the first surface, wherein the semiconductor die is arranged on the first surface of the second leadframe to facilitate heat transfer therethrough. The package also includes mold compound at least partially covering the semiconductor die, the control die, the first leadframe and the second leadframe with the second surface of the second leadframe exposed.