公开(公告)号：US20210359109A1

公开(公告)日：2021-11-18

申请号：US17101291

申请日：2020-11-23

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chen-Ping Chen ,  Kuei-Yu Kao ,  Shih-Yao Lin ,  Chih-Han Lin ,  Ming-Ching Chang ,  Chao-Cheng Chen

IPC: H01L29/66 ,  H01L29/78 ,  H01L21/8234

Abstract: A device includes a fin protruding from a semiconductor substrate; a gate stack over and along a sidewall of the fin; a gate spacer along a sidewall of the gate stack and along the sidewall of the fin; an epitaxial source/drain region in the fin and adjacent the gate spacer; and a corner spacer between the gate stack and the gate spacer, wherein the corner spacer extends along the sidewall of the fin, wherein a first region between the gate stack and the sidewall of the fin is free of the corner spacer, wherein a second region between the gate stack and the gate spacer is free of the corner spacer.

公开(公告)号：US11031290B2

公开(公告)日：2021-06-08

申请号：US15876175

申请日：2018-01-21

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Chih-Chang Hung ,  Shu-Yuan Ku ,  I-Wei Yang ,  Yi-Hsuan Hsiao ,  Ming-Ching Chang ,  Ryan Chia-Jen Chen

IPC: H01L21/8234 ,  H01L21/762 ,  H01L27/088 ,  H01L29/66 ,  H01L29/78

Abstract: A semiconductor structure with cutting depth control and method for fabricating the same are provided. In the method for fabricating the semiconductor device, at first, fins protruding from a substrate are formed. Next, source/drain devices are grown on both ends of the fins. Then, an inter-layer dielectric layer crossing the fins and enclosing the source/drain devices is deposited. A metal gate structure enclosed by the inter-layer dielectric layer is formed between the source/drain devices. And then, a replacement operation is performed to replace a portion of the inter-layer dielectric layer with an isolation material, thereby forming an isolation portion that adjoins the metal gate structure and is located between the adjacent source/drain devices. Thereafter, a metal gate cut operation is performed, thereby forming an opening in the metal gate structure and an opening in the isolation portion, and an insulating material is deposited in the openings.

公开(公告)号：US20210125833A1

公开(公告)日：2021-04-29

申请号：US16811079

申请日：2020-03-06

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Shih-Yao Lin ,  Kuei-Yu Kao ,  Chih-Han Lin ,  Ming-Ching Chang ,  Chao-Cheng Chen

IPC: H01L21/28 ,  H01L29/78 ,  H01L29/06 ,  H01L21/762 ,  H01L29/66

Abstract: A method of forming a semiconductor device includes: forming a fin protruding above a substrate; forming isolation regions on opposing sides of the fin; forming a dummy gate over the fin; reducing a thickness of a lower portion of the dummy gate proximate to the isolation regions, where after reducing the thickness, a distance between opposing sidewalls of the lower portion of the dummy gate decreases as the dummy gate extends toward the isolation regions; after reducing the thickness, forming a gate fill material along at least the opposing sidewalls of the lower portion of the dummy gate; forming gate spacers along sidewalls of the dummy gate and along sidewalls of the gate fill material; and replacing the dummy gate with a metal gate.

公开(公告)号：US10658225B2

公开(公告)日：2020-05-19

申请号：US15874889

申请日：2018-01-19

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Jih-Jse Lin ,  Ryan Chia-Jen Chen ,  Fang-Cheng Chen ,  Ming-Ching Chang

IPC: H01L21/762 ,  H01L21/8234 ,  H01L21/764 ,  H01L27/088 ,  H01L21/3065 ,  H01L29/66 ,  H01L29/78 ,  H01L21/311 ,  H01L29/165

Abstract: FinFET devices and methods of forming the same are disclosed. One of the FinFET devices includes first fins, second fins, a first gate strip, a second gate strip and a comb-like insulating structure. The first and second fins are disposed on a substrate. The first gate strip is disposed across the first fins. The second gate strip is disposed across the second fins. The comb-like insulating structure is disposed between the first gate strip and the second gate strip and has a plurality of comb tooth parts. In some embodiments, each of the comb tooth parts has a middle-wide profile.

公开(公告)号：US20200058557A1

公开(公告)日：2020-02-20

申请号：US16665252

申请日：2019-10-28

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Ya-Yi Tsai ,  Yi-Hsuan Hsiao ,  Shu-Yuan Ku ,  Ryan Chia-Jen Chen ,  Ming-Ching Chang

IPC: H01L21/8234 ,  H01L27/088

Abstract: Metal gate cutting techniques for fin-like field effect transistors (FinFETs) are disclosed herein. An exemplary method includes receiving an integrated circuit (IC) device structure that includes a substrate, one or more fins disposed over the substrate, a plurality of gate structures disposed over the fins, a dielectric layer disposed between and adjacent to the gate structures, and a patterning layer disposed over the gate structures. The gate structures traverses the fins and includes first and second gate structures. The method further includes: forming an opening in the patterning layer to expose a portion of the first gate structure, a portion of the second gate structure, and a portion of the dielectric layer; and removing the exposed portion of the first gate structure, the exposed portion of the second gate structure, and the exposed portion of the dielectric layer.

公开(公告)号：US10468527B2

公开(公告)日：2019-11-05

申请号：US15998687

申请日：2018-08-15

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： I-Wei Yang ,  Chih-Chang Hung ,  Shu-Yuan Ku ,  Ryan Chia-Jen Chen ,  Ming-Ching Chang

IPC: H01L29/66 ,  H01L21/8238 ,  H01L29/06 ,  H01L29/78 ,  H01L23/532 ,  H01L21/033 ,  H01L21/762 ,  H01L21/8234 ,  H01L27/088

Abstract: A semiconductor device and method of forming thereof includes a first fin and a second fin each extending from a substrate. A first gate segment is disposed over the first fin and a second gate segment is disposed over the second fin. An interlayer dielectric (ILD) layer is adjacent the first gate segment and the second gate segment. A cut region (e.g., opening or gap between first gate structure and the second gate structure) extends between the first and second gate segments. The cut region has a first portion has a first width and a second portion has a second width, the second width is greater than the first width. The second portion interposes the first and second gate segments and the first portion is defined within the ILD layer.

公开(公告)号：US10460994B2

公开(公告)日：2019-10-29

申请号：US15938812

申请日：2018-03-28

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Ya-Yi Tsai ,  Yi-Hsuan Hsiao ,  Shu-Yuan Ku ,  Ryan Chia-Jen Chen ,  Ming-Ching Chang

IPC: H01L21/8234 ,  H01L27/088

Abstract: Metal gate cutting techniques for fin-like field effect transistors (FinFETs) are disclosed herein. An exemplary method includes receiving an integrated circuit (IC) device structure that includes a substrate, one or more fins disposed over the substrate, a plurality of gate structures disposed over the fins, a dielectric layer disposed between and adjacent to the gate structures, and a patterning layer disposed over the gate structures. The gate structures traverses the fins and includes first and second gate structures. The method further includes: forming an opening in the patterning layer to expose a portion of the first gate structure, a portion of the second gate structure, and a portion of the dielectric layer; and removing the exposed portion of the first gate structure, the exposed portion of the second gate structure, and the exposed portion of the dielectric layer.

公开(公告)号：US10325912B2

公开(公告)日：2019-06-18

申请号：US15797626

申请日：2017-10-30

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Ryan Chia-Jen Chen ,  Li-Wei Yin ,  Tzu-Wen Pan ,  Yi-Chun Chen ,  Cheng-Chung Chang ,  Shao-Hua Hsu ,  Yu-Hsien Lin ,  Ming-Ching Chang

IPC: H01L27/02 ,  H01L29/06 ,  H01L29/66 ,  H01L29/78 ,  H01L21/308 ,  H01L21/321 ,  H01L21/762 ,  H01L27/088 ,  H01L21/3065 ,  H01L21/3105 ,  H01L21/3213 ,  H01L21/8234

Abstract: Methods of cutting gate structures and fins, and structures formed thereby, are described. In an embodiment, a substrate includes first and second fins and an isolation region. The first and second fins extend longitudinally parallel, with the isolation region disposed therebetween. A gate structure includes a conformal gate dielectric over the first fin and a gate electrode over the conformal gate dielectric. A first insulating fill structure abuts the gate structure and extends vertically from a level of an upper surface of the gate structure to at least a surface of the isolation region. No portion of the conformal gate dielectric extends vertically between the first insulating fill structure and the gate electrode. A second insulating fill structure abuts the first insulating fill structure and an end sidewall of the second fin. The first insulating fill structure is disposed laterally between the gate structure and the second insulating fill structure.

公开(公告)号：US20190165155A1

公开(公告)日：2019-05-30

申请号：US15941137

申请日：2018-03-30

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chang-Yun Chang ,  Ming-Ching Chang ,  Shu-Yuan Ku

IPC: H01L29/78 ,  H01L21/762 ,  H01L21/8238 ,  H01L27/092 ,  H01L29/66 ,  H01L29/06 ,  H01L21/8234 ,  H01L21/306

Abstract: A first FinFET device includes first fin structures that extend in a first direction in a top view. A second FinFET device includes second fin structures that extend in the first direction in the top view. The first FinFET device and the second FinFET device are different types of FinFET devices. A plurality of gate structures extend in a second direction in the top view. The second direction is different from the first direction. Each of the gate structures partially wraps around the first fin structures and the second fin structures. A dielectric structure is disposed between the first FinFET device and the second FinFET device. The dielectric structure cuts each of the gate structures into a first segment for the first FinFET device and a second segment for the second FinFET device. The dielectric structure is located closer to the first FinFET device than to the second FinFET device.

公开(公告)号：US20190148539A1

公开(公告)日：2019-05-16

申请号：US15998687

申请日：2018-08-15

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： I-Wei Yang ,  Chih-Chang Hung ,  Shu-Yuan Ku ,  Ryan Chia-Jen Chen ,  Ming-Ching Chang

IPC: H01L29/78 ,  H01L23/532 ,  H01L29/66 ,  H01L21/762 ,  H01L21/8238 ,  H01L29/06 ,  H01L21/033

Abstract: A semiconductor device and method of forming thereof includes a first fin and a second fin each extending from a substrate. A first gate segment is disposed over the first fin and a second gate segment is disposed over the second fin. An interlayer dielectric (ILD) layer is adjacent the first gate segment and the second gate segment. A cut region (e.g., opening or gap between first gate structure and the second gate structure) extends between the first and second gate segments. The cut region has a first portion has a first width and a second portion has a second width, the second width is greater than the first width. The second portion interposes the first and second gate segments and the first portion is defined within the ILD layer.