METHOD FOR DRIVING NON-VOLATILE MEMORY ELEMENT, AND NON-VOLATILE MEMORY DEVICE
    51.
    发明申请
    METHOD FOR DRIVING NON-VOLATILE MEMORY ELEMENT, AND NON-VOLATILE MEMORY DEVICE 有权
    驱动非易失性存储器元件的方法和非易失性存储器件

    公开(公告)号:US20130010530A1

    公开(公告)日:2013-01-10

    申请号:US13636258

    申请日:2011-03-18

    IPC分类号: G11C11/00

    摘要: Provided is a method for driving a non-volatile memory element in which a variable resistance element including a first electrode, a second electrode, and a variable resistance layer capable of reversibly changing between a high resistance state and a low resistance state with application of electrical signals having different polarities is connected in series with a current steering element having bidirectional rectifying characteristics with respect to an applied voltage. After the non-volatile memory element is manufactured, the resistance value of the variable resistance layer is reduced from a resistance value in the initial resistance state higher than that in the high resistance state by applying, to the non-volatile memory element, a voltage pulse having the polarity identical to that of the voltage pulse for changing the variable resistance layer from the low resistance state to the high resistance state in the normal operations.

    摘要翻译: 提供一种用于驱动非易失性存储元件的方法,其中包括第一电极,第二电极和可变电阻层的可变电阻元件,所述可变电阻元件能够通过施加电而在高电阻状态和低电阻状态之间可逆地变化 具有不同极性的信号与具有相对于施加电压的双向整流特性的电流导向元件串联连接。 在制造非易失性存储元件之后,通过向非易失性存储元件施加电压,可变电阻层的电阻值比初始电阻状态中的电阻值高于高电阻状态的电阻值 脉冲具有与用于在正常操作中将可变电阻层从低电阻状态改变为高电阻状态的电压脉冲的极性相同的脉冲。

    NONVOLATILE MEMORY ELEMENT AND NONVOLATILE MEMORY DEVICE
    52.
    发明申请
    NONVOLATILE MEMORY ELEMENT AND NONVOLATILE MEMORY DEVICE 有权
    非易失性存储元件和非易失性存储器件

    公开(公告)号:US20120327702A1

    公开(公告)日:2012-12-27

    申请号:US13599286

    申请日:2012-08-30

    IPC分类号: H01L45/00 G11C11/21

    摘要: A nonvolatile memory element includes: a first electrode layer; a second electrode layer; and a variable resistance layer which is placed between the electrode layers, and whose resistance state reversibly changes between a high resistance state and a low resistance state based on a polarity of a voltage applied between the electrode layers. The variable resistance layer is formed by stacking a first oxide layer including an oxide of a first transition metal and a second oxide layer including an oxide of a second transition metal which is different from the first transition metal. At least one of the following conditions is satisfied: (1) a dielectric constant of the second oxide layer is larger than a dielectric constant of the first oxide layer; and (2) a band gap of the second oxide layer is smaller than a band gap of the first oxide layer.

    摘要翻译: 非易失性存储元件包括:第一电极层; 第二电极层; 以及可变电阻层,其设置在电极层之间,并且其电阻状态基于施加在电极层之间的电压的极性而在高电阻状态和低电阻状态之间可逆地变化。 可变电阻层通过堆叠包括第一过渡金属的氧化物的第一氧化物层和包含与第一过渡金属不同的第二过渡金属的氧化物的第二氧化物层而形成。 满足以下条件中的至少一个:(1)第二氧化物层的介电常数大于第一氧化物层的介电常数; 和(2)第二氧化物层的带隙小于第一氧化物层的带隙。

    METHOD OF PROGRAMMING VARIABLE RESISTANCE ELEMENT AND NONVOLATILE STORAGE DEVICE
    53.
    发明申请
    METHOD OF PROGRAMMING VARIABLE RESISTANCE ELEMENT AND NONVOLATILE STORAGE DEVICE 有权
    可变电阻元件和非易失性存储器件的编程方法

    公开(公告)号:US20120320661A1

    公开(公告)日:2012-12-20

    申请号:US13596154

    申请日:2012-08-28

    IPC分类号: G11C11/00

    摘要: A method includes applying a first polarity writing voltage pulse to a metal oxide layer to change its resistance state from high to low into a write state, applying a second polarity erasing voltage pulse different from the first polarity to the metal oxide layer to change its resistance state from low to high into an erase state, and applying an initial voltage pulse having the second polarity to the metal oxide layer before first application of the writing voltage pulse, to change an initial resistance value of the metal oxide layer. R0>RH>RL and |V0|>|Ve|≧|Vw| are satisfied where R0, RL, and RH are the resistance values of the initial, write, and erase states, respectively, of the metal oxide layer, and V0, Vw, and Ve are voltage values of the initial, writing, and erasing voltage pulses, respectively.

    摘要翻译: 一种方法包括:将第一极性写入电压脉冲施加到金属氧化物层,以将其电阻状态从高变为低电平变为写入状态,将不同于第一极性的第二极性擦除电压脉冲施加到金属氧化物层以改变其电阻 状态从低到高进入擦除状态,以及在首次施加写入电压脉冲之前将具有第二极性的初始电压脉冲施加到金属氧化物层,以改变金属氧化物层的初始电阻值。 R0> RH> RL和| V0 |> | Ve |≥| Vw | 满足R0,RL和RH分别是金属氧化物层的初始,写入和擦除状态的电阻值,V0,Vw和Ve是初始,写入和擦除电压的电压值 脉冲。

    Nonvolatile semiconductor memory apparatus and manufacturing method thereof
    55.
    发明授权
    Nonvolatile semiconductor memory apparatus and manufacturing method thereof 有权
    非易失性半导体存储装置及其制造方法

    公开(公告)号:US08258493B2

    公开(公告)日:2012-09-04

    申请号:US12515379

    申请日:2007-11-13

    IPC分类号: H01L29/00

    摘要: A nonvolatile semiconductor memory apparatus (10) of the present invention comprises a substrate (10), lower-layer electrode wires (15) provided on the substrate (11), an interlayer insulating layer (16) which is disposed on the substrate (11) including the lower-layer electrode wires (15) and is provided with contact holes at locations respectively opposite to the lower-layer electrode wires (15), resistance variable layers (18) which are respectively connected to the lower-layer electrode wires (15); and non-ohmic devices (20) which are respectively provided on the resistance variable layers (18) such that the non-ohmic devices are respectively connected to the resistance variable layers (18). The non-ohmic devices (20) each has a laminated-layer structure including plural semiconductor layers, a laminated-layer structure including a metal electrode layer and an insulator layer, or a laminated-layer structure including a metal electrode layer and a semiconductor layer. One layer of the laminated-layer structure is embedded to fill each of the contact holes and the semiconductor layer or the insulator layer which is the other layer of the laminated-layer structure has a larger area than an opening of each of the contact holes and is provided on the interlayer insulating layer (16).

    摘要翻译: 本发明的非易失性半导体存储装置(10)具备基板(10),设置在基板(11)上的下层电极布线(15),设置在基板(11)上的层间绝缘层(16) ),并且在分别与下层电极线(15)相对的位置设置接触孔,电阻变化层(18)分别与下层电极线(15)连接 15); 和非欧姆器件(20),其分别设置在电阻变化层(18)上,使得非欧姆器件分别连接到电阻变化层(18)。 非欧姆装置(20)各自具有包括多个半导体层的层叠层结构,包括金属电极层和绝缘体层的层叠层结构,或者包括金属电极层和半导体层的层叠层结构 。 嵌入层叠层结构的一层以填充每个接触孔,作为层叠层结构的另一层的半导体层或绝缘体层的面积比每个接触孔的开口大, 设置在层间绝缘层(16)上。

    Nonvolatile memory apparatus and nonvolatile data storage medium
    56.
    发明授权
    Nonvolatile memory apparatus and nonvolatile data storage medium 有权
    非易失性存储装置和非易失性数据存储介质

    公开(公告)号:US08094482B2

    公开(公告)日:2012-01-10

    申请号:US12529466

    申请日:2008-10-28

    IPC分类号: G11C11/00

    摘要: A nonvolatile memory apparatus and a nonvolatile data storage medium of the present invention, including nonvolatile memory elements each of which changes its resistance in response to electric pulses applied, comprises a first write circuit for performing first write in which a first electric pulse is applied to the nonvolatile memory element to switch a resistance value of the nonvolatile memory element from a first resistance value to a second resistance value and a second electric pulse which is opposite in polarity to the first electric pulse is applied to the nonvolatile memory element to switch the resistance value of the nonvolatile memory element from the second resistance value to the first resistance value.

    摘要翻译: 本发明的非易失性存储装置和非易失性数据存储介质,包括各自根据施加的电脉冲改变其电阻的非易失性存储元件,包括用于执行第一写入的第一写入电路,其中施加第一电脉冲到 将非易失性存储元件的电阻值从第一电阻值切换到与第一电脉冲极性相反的第二电阻值和第二电脉冲的非易失性存储元件施加到非易失性存储元件,以将电阻 非易失性存储元件的值从第二电阻值到第一电阻值。

    Nonvolatile memory element, nonvolatile memory element array, and method for manufacturing nonvolatile memory element
    57.
    发明授权
    Nonvolatile memory element, nonvolatile memory element array, and method for manufacturing nonvolatile memory element 有权
    非易失性存储元件,非易失性存储元件阵列和用于制造非易失性存储元件的方法

    公开(公告)号:US08093578B2

    公开(公告)日:2012-01-10

    申请号:US12513638

    申请日:2007-11-16

    IPC分类号: H01L27/10 H01L21/02

    摘要: The present invention is configured such that a resistance variable element (16) and a rectifying element (20) are formed on a substrate (12). The resistance variable element (16) is configured such that a resistance variable layer (14) made of a metal oxide material is sandwiched between a lower electrode (13) and an upper electrode (15). The rectifying element (20) is connected to the resistance variable element (16), and is configured such that a blocking layer (18) is sandwiched between a first electrode layer (17) located on a lower side of the blocking layer (18) and a second electrode layer (19) located on an upper side of the blocking layer (18). The resistance variable element (16) and the rectifying element (20) are connected to each other in series in a thickness direction of the resistance variable layer (14), and the blocking layer (18) is formed as a barrier layer having a hydrogen barrier property.

    摘要翻译: 本发明被构造成使得在基板(12)上形成电阻可变元件(16)和整流元件(20)。 电阻可变元件(16)被构造为使得由金属氧化物材料制成的电阻变化层(14)夹在下电极(13)和上电极(15)之间。 整流元件(20)连接到电阻可变元件(16),并且被构造为使阻挡层(18)夹在位于阻挡层(18)的下侧的第一电极层(17)之间, 以及位于阻挡层(18)的上侧的第二电极层(19)。 电阻可变元件(16)和整流元件(20)在电阻变化层(14)的厚度方向上串联连接,并且阻挡层(18)形成为具有氢的阻挡层 屏障属性。

    NONVOLATILE MEMORY ELEMENT
    59.
    发明申请
    NONVOLATILE MEMORY ELEMENT 有权
    非易失性存储元件

    公开(公告)号:US20110233510A1

    公开(公告)日:2011-09-29

    申请号:US13132058

    申请日:2009-12-01

    IPC分类号: H01L47/00

    摘要: A nonvolatile memory element of the present invention comprises a first electrode (103); a second electrode (109); and a resistance variable layer (106) disposed between the first electrode and the second electrode, resistance values of the resistance variable layer reversibly changing in response to electric signals applied between the first electrode and the second electrode; at least one of the first electrode and the second electrode including a platinum-containing layer (107) comprising platinum; the resistance variable layer including at least a first oxygen-deficient transition metal oxide layer (104) which is not physically in contact with the platinum-containing layer and a second oxygen-deficient transition metal oxide layer (105) which is disposed between the first oxygen-deficient transition metal oxide layer and the platinum-containing layer and is physically in contact with the platinum-containing layer; x

    摘要翻译: 本发明的非易失性存储元件包括第一电极(103) 第二电极(109); 以及设置在所述第一电极和所述第二电极之间的电阻变化层(106),所述电阻变化层的电阻值响应于施加在所述第一电极和所述第二电极之间的电信号而可逆地变化; 所述第一电极和所述第二电极中的至少一个包括含铂的含铂层(107) 所述电阻变化层至少包括不与所述含铂层物理接触的第一缺氧过渡金属氧化物层(104)和第二缺氧过渡金属氧化物层(105),所述第二缺氧过渡金属氧化物层(105)设置在所述第一 氧缺陷型过渡金属氧化物层和含铂层,并且与含铂层物理接触; 当第一缺氧过渡金属氧化物层中包含的缺氧过渡金属氧化物被表示为MOx时,x