公开(公告)号：US09408313B2

公开(公告)日：2016-08-02

申请号：US14174858

申请日：2014-02-07

申请人： Unimicron Technology Corp.

发明人： Chun-Ting Lin ,  Ying-Chih Chan

IPC分类号： H05K1/11 ,  H05K3/40 ,  H05K3/06

CPC分类号： H05K3/4007 ,  H01L2224/13017 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/81385 ,  H05K3/062 ,  H05K2201/0367 ,  H05K2201/0376 ,  Y10T29/49156 ,  H01L2924/014 ,  H01L2924/00014

摘要： A packaging substrate is provided, including a substrate body and conductive pillars. The substrate body has a first surface and a second surface opposite to the first surface. The first surface has a plurality of first conductive pads, and the second surface has a die attach area and a peripheral area surrounding the die attach area. The die attach area has a plurality of second conductive pads embedded therein, wherein top surfaces of the second conductive pads are exposed from the second surface, and the die attach area of the second surface is fully exposed. The conductive pillars are correspondingly disposed on the second conductive pads and have first ends and opposite second ends. The first ends are closer than the second ends from the second conductive pads, and the first ends have a width bigger than a width of the second ends. A fabricating method thereof is also provided.

摘要翻译： 提供了一种包装基板，包括基体和导电支柱。 基板主体具有与第一表面相对的第一表面和第二表面。 第一表面具有多个第一导电焊盘，第二表面具有管芯附着区域和围绕管芯附着区域的周边区域。 管芯附着区域具有嵌入其中的多个第二导电焊盘，其中第二导电焊盘的顶表面从第二表面露出，并且第二表面的管芯附着区域被完全暴露。 导电柱相应地设置在第二导电焊盘上并且具有第一端和相对的第二端。 第一端比第二导电焊盘更靠近第二端，并且第一端的宽度大于第二端的宽度。 还提供了其制造方法。

公开(公告)号：US09370099B2

公开(公告)日：2016-06-14

申请号：US14681298

申请日：2015-04-08

申请人： UNIMICRON TECHNOLOGY CORP.

发明人： Chih-Peng Fan ,  Ching-Ho Hsieh ,  Chung-Chi Huang

IPC分类号： H01B13/00 ,  C23F1/00 ,  H05K3/00 ,  H05K1/11 ,  H05K1/02 ,  H05K3/06 ,  H05K3/28

CPC分类号： H05K1/115 ,  H05K1/0298 ,  H05K1/113 ,  H05K3/007 ,  H05K3/0097 ,  H05K3/06 ,  H05K3/28 ,  H05K3/4007 ,  H05K3/4092 ,  H05K2201/09572 ,  H05K2203/041 ,  H05K2203/1536

摘要： The instant disclosure relates to a manufacturing method of connector which comprises the following steps. The first step is to provide a substrate layer and forming a first metal layer on the substrate layer. The next step is to pattern the first metal layer to form a wiring layer. The next step is to form a dielectric layer on the wiring layer, wherein the dielectric layer is formed with at least one via hole to partially expose the wiring layer and a conductive structure arranged on the inner wall of the at least one via hole and electrically connected to the wiring layer. The next step is to form a first protective layer on the dielectric layer and at least one cantilever structure between the first protective layer and the dielectric layer. The last step is to remove the substrate layer.

摘要翻译： 本公开涉及一种连接器的制造方法，包括以下步骤。 第一步是提供衬底层并在衬底层上形成第一金属层。 下一步是图案化第一金属层以形成布线层。 下一步是在布线层上形成电介质层，其中介电层形成有至少一个通孔以部分地暴露布线层和布置在至少一个通孔的内壁上的导电结构， 连接到布线层。 下一步是在介电层上形成第一保护层，在第一保护层和电介质层之间形成至少一个悬臂结构。 最后一步是去除衬底层。

公开(公告)号：US09324664B2

公开(公告)日：2016-04-26

申请号：US13773647

申请日：2013-02-22

申请人： Unimicron Technology Corp.

发明人： Tsung-Yuan Chen ,  Wei-Ming Cheng

IPC分类号： H01L23/48 ,  H01L23/60 ,  H01L23/00

CPC分类号： H01L23/60 ,  H01L24/24 ,  H01L24/82 ,  H01L24/83 ,  H01L2224/04105 ,  H01L2224/18 ,  H01L2224/19 ,  H01L2224/2518 ,  H01L2924/0002 ,  H01L2924/3511 ,  H01L2924/00

摘要： An embedded chip package structure including a core layer, a chip, a first circuit layer and a second circuit layer is provided. The core layer includes a first surface, a second surface opposite to each other and a chip container passing through the first surface and the second surface. The chip is disposed in the chip container. The chip includes an active surface and a protrusion and a top surface of the protrusion is a part of the active surface. The first circuit layer is disposed on the first surface and electrically connected to the core layer and the chip. The first circuit layer has a through hole. The protrusion of the chip is situated within the through hole, and the top surface of the protrusion is exposed to receive an external signal. The second circuit layer is disposed on the second surface and electrically connected to the core layer.

摘要翻译： 提供了包括核心层，芯片，第一电路层和第二电路层的嵌入式芯片封装结构。 芯层包括第一表面，彼此相对的第二表面和穿过第一表面和第二表面的芯片容器。 芯片设置在芯片容器中。 芯片包括有源表面和突起，突起的顶表面是活性表面的一部分。 第一电路层设置在第一表面上并与芯层和芯片电连接。 第一电路层具有通孔。 芯片的突出部位于通孔内，突出部的顶面露出来接收外部信号。 第二电路层设置在第二表面上并与芯层电连接。

公开(公告)号：US09307651B2

公开(公告)日：2016-04-05

申请号：US13421330

申请日：2012-03-15

申请人： Tsung-Yuan Chen ,  Shu-Sheng Chiang

发明人： Tsung-Yuan Chen ,  Shu-Sheng Chiang

IPC分类号： H01K3/10 ,  H05K3/10 ,  H05K3/04 ,  H05K3/42

CPC分类号： H05K3/107 ,  H05K3/045 ,  H05K3/423 ,  H05K3/426 ,  H05K2201/0376 ,  H05K2201/09036 ,  H05K2201/09563 ,  Y10T29/49155 ,  Y10T29/49165

摘要： A fabricating process for an embedded circuit structure is provided. A through hole is formed in a core panel and penetrates the core panel. Two indent patterns are respectively formed on two opposite surfaces of the core panel. A conductive material is electroplated into the through hole and the indent patterns, so as to form a conductive channel in the through hole and two circuit patterns in the indent patterns respectively. Portions of the circuit patterns, which exceed the indent patterns respectively, are removed for planarizing the circuit patterns to be level with the two surfaces of the core panel respectively.

摘要翻译： 提供了一种用于嵌入式电路结构的制造工艺。 在芯板中形成贯通孔，贯通芯板。 在芯板的两个相对的表面上分别形成两个压痕图案。 将导电材料电镀到通孔和凹陷图案中，以在通孔中分别形成导电通道和凹陷图案中的两个电路图案。 电路图案的分别超过凹口图案的部分被去除，用于将电路图案平坦化以与芯板的两个表面分级。

公开(公告)号：US09253898B2

公开(公告)日：2016-02-02

申请号：US14093660

申请日：2013-12-02

申请人： UNIMICRON TECHNOLOGY CORP.

发明人： Chi-Shiang Chen ,  Hsiu-Ching Hu ,  Kun-Wu Li ,  Fang-Ping Wu

IPC分类号： H05K1/00 ,  H05K3/46 ,  H05K1/02 ,  H05K1/18 ,  H05K3/00

CPC分类号： H05K3/4691 ,  H05K1/0278 ,  H05K1/185 ,  H05K3/0011 ,  H05K3/0035 ,  H05K3/0047 ,  H05K3/005 ,  H05K3/007 ,  H05K3/4644 ,  H05K3/4694 ,  H05K2201/048 ,  H05K2203/0384 ,  H05K2203/167 ,  Y10T29/49155

摘要： A rigid flex board module includes a rigid flex circuit board and a high-density interconnected circuit board. The rigid flex circuit board includes a flexible circuit board, a first rigid circuit board and a first adhesive layer. The flexible circuit board includes a bending portion and a jointing portion connected to the bending part. The rigid flex circuit board is disposed on the jointing portion to expose the bending portion. The first rigid circuit board electrically connects with the flexible circuit board. The first adhesive layer connects the first rigid circuit board and the jointing portion. The high-density interconnected circuit board is disposed in the first rigid circuit board and is electrically connected to the first rigid circuit board.

摘要翻译： 刚性柔性板模块包括刚性柔性电路板和高密度互连电路板。 刚性柔性电路板包括柔性电路板，第一刚性电路板和第一粘合剂层。 柔性电路板包括弯曲部和连接到弯曲部的接合部。 刚性柔性电路板设置在接合部分上以露出弯曲部分。 第一刚性电路板与柔性电路板电连接。 第一粘合剂层连接第一刚性电路板和接合部分。 高密度互连电路板设置在第一刚性电路板中并与第一刚性电路板电连接。

公开(公告)号：US09247631B2

公开(公告)日：2016-01-26

申请号：US13352553

申请日：2012-01-18

申请人： Chen-Chuan Chang

发明人： Chen-Chuan Chang

IPC分类号： H01K3/10 ,  H05K1/02 ,  H01L33/64 ,  H05K3/02 ,  H05K3/40

CPC分类号： H05K1/0204 ,  H01L33/642 ,  H01L33/644 ,  H05K3/022 ,  H05K3/4046 ,  H05K2201/066 ,  H05K2201/10106 ,  H05K2201/10416 ,  H05K2203/0323 ,  H05K2203/061 ,  H05K2203/063 ,  Y10T29/49124 ,  Y10T29/49126

摘要： A method, for fabricating a heat dissipation substrate, includes the steps of: providing a substrate, with the substrate including a metal layer, an insulation layer, and a first conductive layer, with the insulation layer positioned between the metal layer and the first conductive layer, and with the metal layer thicker than the first conductive layer; removing part of the metal layer for forming a metal bulk; providing an adhesive layer including an opening, with the opening corresponding to the metal bulk; providing a second conductive layer; laminating the second conductive layer, the adhesive layer and the substrate; forming a hole in the insulation layer and the first conductive layer, with the hole positioned under the metal bulk; and forming a third conductive layer in the hole.

摘要翻译： 一种用于制造散热基板的方法，包括以下步骤：提供衬底，其中衬底包括金属层，绝缘层和第一导电层，绝缘层位于金属层和第一导电层之间 并且金属层比第一导电层厚; 去除用于形成金属体的金属层的一部分; 提供包括开口的粘合层，所述开口对应于所述金属体; 提供第二导电层; 层叠第二导电层，粘合剂层和基板; 在所述绝缘层和所述第一导电层中形成孔，所述孔位于所述金属体下; 以及在所述孔中形成第三导电层。

公开(公告)号：US09210815B2

公开(公告)日：2015-12-08

申请号：US13474735

申请日：2012-05-18

申请人： Cheng-Po Yu

发明人： Cheng-Po Yu

IPC分类号： H05K3/36 ,  H05K3/00 ,  H05K3/46 ,  H05K3/10

CPC分类号： H05K3/0035 ,  H05K3/107 ,  H05K3/465 ,  H05K2201/0236 ,  H05K2201/0959 ,  H05K2201/09845 ,  H05K2203/1476 ,  Y10T29/49155

摘要： A manufacturing method of an embedded wiring board is provided. The method includes the following steps. First, an insulation layer and a lower wiring layer are provided, wherein the insulation layer includes a polymeric material. Then, the plural catalyst grains are distributed in the polymeric material. A groove and an engraved pattern are formed on the upper surface. A blind via is formed on a bottom surface of the groove to expose the lower pad. An upper wiring layer is formed in the engraved pattern. Some catalyst grains are exposed and activated in the groove, the engraved pattern and the blind via. A first conductive pillar is formed in the groove. Finally, a second conductive pillar is formed in the blind via.

摘要翻译： 提供了一种嵌入式布线板的制造方法。 该方法包括以下步骤。 首先，提供绝缘层和下布线层，其中绝缘层包括聚合材料。 然后，多个催化剂颗粒分布在聚合物材料中。 在上表面上形成有凹槽和雕刻图案。 在槽的底表面上形成盲孔以露出下垫。 上部布线层形成在雕刻图案中。 一些催化剂颗粒在凹槽，雕刻图案和盲孔中暴露和活化。 第一导电柱形成在凹槽中。 最后，在盲通孔中形成第二导电柱。

公开(公告)号：US09184520B2

公开(公告)日：2015-11-10

申请号：US14253885

申请日：2014-04-16

申请人： Unimicron Technology Corp.

发明人： Chih-Peng Fan ,  Yin-Hwa Cheng ,  Ching-Ho Hsieh ,  Ling-Kai Su ,  Yung-Hao Hsueh

IPC分类号： H01R12/00 ,  H01R12/71 ,  H05K3/32 ,  H05K3/40

CPC分类号： H01R12/718 ,  H01L2924/15311 ,  H01L2924/15313 ,  H05K3/326 ,  H05K3/4092 ,  H05K2201/0367 ,  H05K2201/0397 ,  H05K2201/09036 ,  H05K2201/10265 ,  H05K2201/10719

摘要： An electrical connector includes a base and an elastic terminal. The base has a recess. The elastic terminal is connected to the base and extends to the recess. The elastic terminal has a fixed end and a free end, the fixed end is connected to the base, and the free end is located at the recess and is curved. When the contact moves towards the recess, the contact is capable of pushing the contact protrusion to bend towards the bottom of the recess so that the free end leans against the bottom of the recess. The electrical connector may further include a contact protrusion connected to the elastic terminal. When the contact moves towards the recess, the contact is capable of pushing the contact protrusion to make the elastic terminal bend towards the bottom portion of the recess so that the free end leans against the bottom of the recess.

摘要翻译： 电连接器包括基座和弹性端子。 底座有一个凹槽。 弹性端子连接到基座并延伸到凹部。 弹性端子具有固定端和自由端，固定端连接到基座，自由端位于凹槽处并弯曲。 当接触件朝向凹部移动时，触头能够推动接触突起朝向凹部的底部弯曲，使得自由端靠在凹部的底部。 电连接器还可以包括连接到弹性端子的接触突起。 当接触件朝向凹部移动时，触头能够推动接触突起，以使弹性端子朝向凹部的底部弯曲，使得自由端靠在凹部的底部。

公开(公告)号：US09095083B2

公开(公告)日：2015-07-28

申请号：US14074655

申请日：2013-11-07

申请人： Unimicron Technology Corp.

发明人： Pei-Chang Huang ,  Cheng-Po Yu ,  Han-Pei Huang

IPC分类号： B05D5/12 ,  H05K3/46 ,  H05K3/00 ,  H05K3/10 ,  H05K3/40 ,  B05D7/00 ,  H05K3/12 ,  H05K1/02 ,  H05K3/24 ,  H05K1/11 ,  C23C18/16

CPC分类号： H05K1/0298 ,  B05D5/12 ,  B05D7/50 ,  C23C18/165 ,  H05K1/0269 ,  H05K1/111 ,  H05K3/0038 ,  H05K3/12 ,  H05K3/244 ,  H05K3/40 ,  H05K3/46 ,  H05K3/4679 ,  H05K2203/1476

摘要： A manufacturing method for a multi-layer circuit board includes the following steps. Firstly, a substrate having a first via penetrating the substrate is provided. Next, a patterned circuit layer is formed on a surface of the substrate by using the first via as an alignment target. The first patterned circuit layer includes a first concentric-circle pattern surrounding the first via. Next, a first stacking layer is formed on the surface. Then, a first through hole penetrating regions where a first concentric circle from the center of the concentric-circle pattern is orthogonally projected on the first stacking layer and the substrate is formed. Next, a second stacking layer is formed on the first stacking layer. Afterward, a second through hole penetrating regions where a second concentric circle from the center of the concentric-circle pattern is orthogonally projected on of the first, the second stacking layers and the substrate is formed.

摘要翻译： 多层电路板的制造方法包括以下步骤。 首先，提供具有穿过基板的第一通孔的基板。 接下来，通过使用第一通孔作为取向对象，在基板的表面上形成图案化电路层。 第一图案化电路层包括围绕第一通孔的第一同心圆图案。 接下来，在表面上形成第一层叠层。 然后，形成从同心圆图案的中心的第一同心圆正交地突出在第一堆叠层和基板上的第一通孔贯穿区域。 接着，在第一堆叠层上形成第二层叠层。 之后，形成从同心圆图案的中心的第二同心圆正交地突出在第一，第二堆叠层和基板上的第二通孔贯穿区域。

公开(公告)号：US09084379B2

公开(公告)日：2015-07-14

申请号：US13423578

申请日：2012-03-19

申请人： Tsung-Yuan Chen ,  Chun-Chien Chen ,  Cheng-Po Yu

发明人： Tsung-Yuan Chen ,  Chun-Chien Chen ,  Cheng-Po Yu

IPC分类号： H01K3/10 ,  H05K3/00 ,  H05K3/36 ,  H05K1/00 ,  H05K1/14 ,  H05K3/42 ,  H05K3/20

CPC分类号： H05K3/428 ,  H05K3/0032 ,  H05K3/0035 ,  H05K3/0038 ,  H05K3/20 ,  H05K3/205 ,  H05K2201/09509 ,  H05K2201/09563 ,  H05K2201/0969 ,  H05K2203/0369 ,  H05K2203/0376 ,  H05K2203/0384 ,  H05K2203/0554 ,  H05K2203/108 ,  H05K2203/1476 ,  Y10T29/49124 ,  Y10T29/49126

摘要： A process for fabricating a wiring board is provided. In the process, a wiring carrying substrate including a carry substrate and a wiring layer is formed. Next, at least one blind via is formed in the wiring carrying substrate. Next, the wiring carrying substrate is laminated to another wiring carrying substrate via an insulation layer. The insulation layer is disposed between the wiring layers of the wiring carrying substrates and full fills the blind via. Next, parts of the carry substrates are removed to expose the insulation layer in the blind via. Next, a conductive pillar connected between the wiring layers is formed. Next, the rest carry substrates are removed.

摘要翻译： 提供一种制造布线板的工艺。 在该过程中，形成包括携带衬底和布线层的布线承载衬底。 接下来，在布线承载基板中形成至少一个盲孔。 接下来，通过绝缘层将布线承载基板层叠到另一布线承载基板。 绝缘层设置在布线基板的布线层之间，并且完全填充盲孔。 接下来，去除部分搬运基板以露出盲孔中的绝缘层。 接下来，形成连接在布线层之间的导电柱。 接下来，其余的携带衬底被去除。