公开(公告)号：US09559045B2

公开(公告)日：2017-01-31

申请号：US14799593

申请日：2015-07-15

Applicant: Unimicron Technology Corp.

Inventor： Pi-Te Pan ,  Chang-Fu Chen

IPC: H01L23/00 ,  H01L23/36 ,  H01L23/498 ,  H01L21/48

CPC classification number: H01L23/49811 ,  H01L21/486 ,  H01L23/16 ,  H01L23/36 ,  H01L23/3735 ,  H01L23/49805 ,  H01L23/49827 ,  H01L23/5383 ,  H01L23/5384 ,  H01L23/562 ,  H01L24/16 ,  H01L24/73 ,  H01L24/81 ,  H01L25/0655 ,  H01L25/105 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2224/73253 ,  H01L2225/1058 ,  H01L2924/15311 ,  H01L2924/1533 ,  H01L2924/18161 ,  H01L2924/3511 ,  H01L2924/37001

Abstract: Provided is a package structure including a circuit board, a plurality of first contact pads, a plurality of metal pillars and at least one chip. The first contact pads are disposed on the circuit board. The chip is disposed on one portion of the first contact pads. The metal pillars are disposed on the other portion of the first contact pads, where the chip is surrounded by the metal pillars. A method for manufacturing the package structure is also provided.

Abstract translation: 提供包括电路板，多个第一接触焊盘，多个金属柱和至少一个芯片的封装结构。 第一接触垫设置在电路板上。 芯片设置在第一接触垫的一部分上。 金属支柱设置在第一接触垫的另一部分上，其中芯片被金属支柱包围。 还提供了一种用于制造封装结构的方法。

公开(公告)号：US09775246B2

公开(公告)日：2017-09-26

申请号：US14820572

申请日：2015-08-07

Applicant: Unimicron Technology Corp.

Inventor： Kuan-Hsi Wu ,  Pi-Te Pan ,  Chang-Fu Chen

IPC: H05K1/11 ,  H05K3/30 ,  H05K1/02 ,  H05K3/10 ,  H05K3/00 ,  H05K3/40

CPC classification number: H05K1/119 ,  H05K1/0298 ,  H05K1/111 ,  H05K1/113 ,  H05K1/116 ,  H05K3/0023 ,  H05K3/0097 ,  H05K3/10 ,  H05K3/303 ,  H05K3/3452 ,  H05K3/4007 ,  H05K3/4682 ,  H05K3/4697 ,  H05K2201/0367 ,  H05K2201/094 ,  H05K2201/09472 ,  H05K2203/0562 ,  H05K2203/1536 ,  Y02P70/611

Abstract: A circuit board including a substrate, a photo imageable dielectric layer and a plurality of conductive bumps is provided. The substrate has a first surface and a first circuit layer, wherein the first surface has a chip disposing area and an electrical connection area, and the first circuit layer is embedded in the first surface. The photo imageable dielectric layer is disposed on the electrical connection area and has a plurality of openings, wherein parts of the first circuit layer is exposed by the openings. The conductive bumps are disposed at the openings respectively and connected to the first circuit layer, wherein a side surface of each of the conductive bumps is at least partially covered by the photo imageable dielectric layer. In addition, a manufacturing method of the circuit board is also provided.

公开(公告)号：US20170042026A1

公开(公告)日：2017-02-09

申请号：US14820572

申请日：2015-08-07

Applicant: Unimicron Technology Corp.

Inventor： Kuan-Hsi Wu ,  Pi-Te Pan ,  Chang-Fu Chen

IPC: H05K1/11 ,  H05K3/40 ,  H05K3/00 ,  H05K1/02 ,  H05K3/10

CPC classification number: H05K1/119 ,  H05K1/0298 ,  H05K1/111 ,  H05K1/113 ,  H05K1/116 ,  H05K3/0023 ,  H05K3/0097 ,  H05K3/10 ,  H05K3/303 ,  H05K3/3452 ,  H05K3/4007 ,  H05K3/4682 ,  H05K3/4697 ,  H05K2201/0367 ,  H05K2201/094 ,  H05K2201/09472 ,  H05K2203/0562 ,  H05K2203/1536 ,  Y02P70/611

Abstract: A circuit board including a substrate, a photo imageable dielectric layer and a plurality of conductive bumps is provided. The substrate has a first surface and a first circuit layer, wherein the first surface has a chip disposing area and an electrical connection area, and the first circuit layer is embedded in the first surface. The photo imageable dielectric layer is disposed on the electrical connection area and has a plurality of openings, wherein parts of the first circuit layer is exposed by the openings. The conductive bumps are disposed at the openings respectively and connected to the first circuit layer, wherein a side surface of each of the conductive bumps is at least partially covered by the photo imageable dielectric layer. In addition, a manufacturing method of the circuit board is also provided.

Abstract translation: 提供了包括基板，可光致成像介电层和多个导电凸块的电路板。 基板具有第一表面和第一电路层，其中第一表面具有芯片布置区域和电连接区域，并且第一电路层嵌入在第一表面中。 可光致成像介电层设置在电连接区域上并具有多个开口，其中第一电路层的部分被开口露出。 导电凸块分别设置在开口处并连接到第一电路层，其中每个导电凸块的侧表面至少部分被可光致成像介电层覆盖。 此外，还提供了电路板的制造方法。

公开(公告)号：US10825599B2

公开(公告)日：2020-11-03

申请号：US15818773

申请日：2017-11-21

Applicant: Unimicron Technology Corp.

Inventor： Chang-Fu Chen ,  Chun-Hao Chen ,  Kuan-Hsi Wu ,  Pi-Te Pan

IPC: H01F27/28 ,  H01F27/24 ,  H05K1/11 ,  H05K1/16 ,  H01F17/04 ,  H01F17/00 ,  H01F5/00 ,  H01L23/522

Abstract: A carrier structure includes a substrate, a first patterned circuit layer and at least one magnetic element. The substrate has a first surface and an opening passing through the substrate. The first patterned circuit layer is disposed on the first surface of the substrate and includes an annular circuit for generating an electromagnetic field. The magnetic element is disposed within the opening of the substrate, wherein the magnetic element couples the annular circuit and acts in response to the magnetic force of the electromagnetic field.

公开(公告)号：US20190088401A1

公开(公告)日：2019-03-21

申请号：US15818773

申请日：2017-11-21

Applicant: Unimicron Technology Corp.

Inventor： Chang-Fu Chen ,  Chun-Hao Chen ,  Kuan-Hsi Wu ,  Pi-Te Pan

IPC: H01F27/28 ,  H01F27/24 ,  H05K1/16 ,  H05K1/11

Abstract: A carrier structure includes a substrate, a first patterned circuit layer and at least one magnetic element. The substrate has a first surface and an opening passing through the substrate. The first patterned circuit layer is disposed on the first surface of the substrate and includes an annular circuit for generating an electromagnetic field. The magnetic element is disposed within the opening of the substrate, wherein the magnetic element couples the annular circuit and acts in response to the magnetic force of the electromagnetic field.

公开(公告)号：US20160343645A1

公开(公告)日：2016-11-24

申请号：US14799593

申请日：2015-07-15

Applicant: Unimicron Technology Corp.

Inventor： Pi-Te Pan ,  Chang-Fu Chen

IPC: H01L23/498 ,  H01L21/48 ,  H01L23/00

CPC classification number: H01L23/49811 ,  H01L21/486 ,  H01L23/16 ,  H01L23/36 ,  H01L23/3735 ,  H01L23/49805 ,  H01L23/49827 ,  H01L23/5383 ,  H01L23/5384 ,  H01L23/562 ,  H01L24/16 ,  H01L24/73 ,  H01L24/81 ,  H01L25/0655 ,  H01L25/105 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2224/73253 ,  H01L2225/1058 ,  H01L2924/15311 ,  H01L2924/1533 ,  H01L2924/18161 ,  H01L2924/3511 ,  H01L2924/37001

Abstract: Provided is a package structure including a circuit board, a plurality of first contact pads, a plurality of metal pillars and at least one chip. The first contact pads are disposed on the circuit board. The chip is disposed on one portion of the first contact pads. The metal pillars are disposed on the other portion of the first contact pads, where the chip is surrounded by the metal pillars. A method for manufacturing the package structure is also provided.

Abstract translation: 提供包括电路板，多个第一接触焊盘，多个金属柱和至少一个芯片的封装结构。 第一接触垫设置在电路板上。 芯片设置在第一接触垫的一部分上。 金属支柱设置在第一接触垫的另一部分上，其中芯片被金属支柱包围。 还提供了一种用于制造封装结构的方法。