公开(公告)号：US11721647B2

公开(公告)日：2023-08-08

申请号：US17217005

申请日：2021-03-30

Applicant: STMicroelectronics (Rousset) SAS

Inventor： Pascal Fornara

IPC: H01L23/62 ,  H01H85/02 ,  H01L23/525 ,  H01L21/66

CPC classification number: H01L23/62 ,  H01H85/0241 ,  H01L22/34 ,  H01L23/5256 ,  H01H2085/0283

Abstract: A semiconductor wafer includes first zones containing integrated circuits, each first zone including a substrate and a sealing ring at a periphery of the substrate. The first zones are separated from each other by second zones defining cutting lines or paths. The integrated circuit includes an electrically conductive fuse that extends between a first location inside the integrated circuit and a second location situated outside the integrated circuit beyond one of the cutting lines. This electrically conductive fuse includes a portion that passes through the sealing ring and another portion that straddles the adjacent cutting line. The portion of the fuse that passes through is electrically isolated from the sealing ring and from the substrate. The straddling portion is configured to be sliced, when cutting the wafer along the cutting line, so as to cause the fuse to change from an electrical on state to an electrical off state.

公开(公告)号：US20230240082A1

公开(公告)日：2023-07-27

申请号：US18193965

申请日：2023-03-31

Applicant: STMicroelectronics (Rousset) SAS

Inventor： Philippe BOIVIN

IPC: H10B63/00 ,  H10N70/00 ,  H10N70/20

CPC classification number: H10B63/24 ,  H10N70/021 ,  H10N70/063 ,  H10N70/231

Abstract: The disclosure concerns a resistive memory cell, including a stack of a selector, of a resistive element, and of a layer of phase-change material, the selector having no physical contact with the phase-change material. In one embodiment, the selector is an ovonic threshold switch formed on a conductive track of a metallization level.

公开(公告)号：US20230236839A1

公开(公告)日：2023-07-27

申请号：US17583104

申请日：2022-01-24

Applicant: STMICROELECTRONICS (GRENOBLE 2) SAS ,  STMICROELECTRONICS (ROUSSET) SAS

Inventor： Valerie ASSEMAT ,  Isabelle CARNEL ,  Edwin HILKENS ,  Jean Claude BINI

IPC: G06F9/4401 ,  G06F9/54

CPC classification number: G06F9/4403 ,  G06F9/542

Abstract: A device includes an application processor and a hardware signal processor coupled to the application processor. The hardware signal processor, in operation: receives a command pre-list during an initialization phase of the hardware signal processor, the command pre-list including a plurality of function describers, each of the plurality of function describers being associated with a respective plurality of parameter describers; generates a command list based on the command pre-list during the initialization phase; and stores the command list in memory circuitry.

公开(公告)号：US11710711B2

公开(公告)日：2023-07-25

申请号：US17351930

申请日：2021-06-18

Applicant: STMicroelectronics (Rousset) SAS

Inventor： Abderrezak Marzaki ,  Mathieu Lisart

IPC: H01L23/00 ,  G06F21/87 ,  H04N19/44 ,  H01L27/02 ,  G06F21/75

CPC classification number: H01L23/576 ,  G06F21/75 ,  G06F21/87 ,  H01L23/57 ,  H01L27/0207 ,  H04N19/44

Abstract: An integrated circuit includes a first domain supplied with power at a first supply voltage. A first transistor comprising in the first domain includes a first gate region and a first gate dielectric region. A second domain is supply with power at a second supply voltage and includes a second transistor having a second gate region and a second gate dielectric region, the second gate region being biased at a voltage that is higher than the first supply voltage. The first and second gate dielectric regions have the same composition, wherein that composition configures the first transistor in a permanently turned off condition in response to a gate bias voltage lower than or equal to the first supply voltage. The second transistor is a floating gate memory cell transistor, with the second gate dielectric region located between the floating and control gates.

公开(公告)号：US20230223989A1

公开(公告)日：2023-07-13

申请号：US18094309

申请日：2023-01-06

Applicant: STMicroelectronics (Rousset) SAS ,  STMicroelectronics SA ,  STMicroelectronics Razvoj Polprevodnikov D.O.O.

Inventor： Alexandre TRAMONI ,  Kosta KOVACIC ,  Florent SIBILLE ,  Nicolas CORDIER ,  Anthony TORNAMBE ,  Jean Remi RUIZ ,  Guillaume JAUNET

IPC: H04B5/00

CPC classification number: H04B5/0025 ,  H04B5/0056

Abstract: A near-field communication circuit of a first NFC device alternates, in low power mode, between: first phases of emission of field bursts and second phases spanning an entire duration separating two successive first phases. Each second phase includes a field detector enabling phase. In one implementation, the field detector enabling phase extends all along a duration of the second phase. In an alternate implementation, the field detector enabling phase is interrupted by field detector disabling phases. Each field detector disabling phase has a duration shorter than a minimum duration of each first phase.

公开(公告)号：US11700520B2

公开(公告)日：2023-07-11

申请号：US17122789

申请日：2020-12-15

Applicant: STMicroelectronics (Rousset) SAS ,  Proton World International N.V.

Inventor： Olivier Van Nieuwenhuyze ,  Alexandre Tramoni ,  Pierre Rizzo

IPC: H04W4/80 ,  H04W4/029 ,  H04W76/11 ,  H04W84/12

CPC classification number: H04W4/80 ,  H04W4/029 ,  H04W76/11 ,  H04W84/12

Abstract: Devices and methods for configuration of a mobile terminal including a near-field communication device and a radio communication device separate from the near-field communication device are provided. One such method includes determining, by the radio communication device, an identifier of a wireless local network within a range of the mobile terminal. The method further includes selecting, from a configuration table, at least one configuration parameter of a plurality of sets of configuration parameters of the near-field communication device according to the identifier, and applying the at least one configuration parameter to the near-field communication device.

公开(公告)号：US11698651B2

公开(公告)日：2023-07-11

申请号：US17399674

申请日：2021-08-11

Applicant: STMicroelectronics (Rousset) SAS

Inventor： Nicolas Demange ,  Nicolas Borrel ,  Jimmy Fort

IPC: G05F1/56 ,  G06F21/75

CPC classification number: G05F1/56 ,  G06F21/755

Abstract: The present invention concerns an electronic circuit power supply device, configured to: flow, through a first conductor connected to a node, a first current that is an image of a second current consumed by the electronic circuit; flow a third current through a second conductor connected to the node, a first branch of a current mirror conducting the third current; flow a fourth constant current through a third conductor connected to the node; consume a fifth current that is an image of the third current; and regulate a potential of the node by acting on a gate potential of a transistor electrically in series with a second branch of the current mirror.

公开(公告)号：US20230198514A1

公开(公告)日：2023-06-22

申请号：US18064840

申请日：2022-12-12

Applicant: STMICROELECTRONICS S.r.l. ,  STMICROELECTRONICS (ROUSSET) SAS

Inventor： Antoine PAVLIN ,  Vanni POLETTO ,  Vincenzo RANDAZZO

IPC: H03K17/0812

CPC classification number: H03K17/08122 ,  H03K2017/0806

Abstract: The present disclosure relates to a device comprising a first transistor and a first circuit comprising first and second terminals, the first circuit being configured to generate a first voltage representing the temperature of the first transistor, a first terminal of the first circuit being coupled to the drain of the first transistor.

公开(公告)号：US20230186278A1

公开(公告)日：2023-06-15

申请号：US18064088

申请日：2022-12-09

Applicant: Proton World International N.V. ,  STMicroelectronics (Rousset) SAS

Inventor： Olivier Van Nieuwenhuyze ,  Alexandre Charles ,  Alexandra Ducati Manas

IPC: G06Q20/32 ,  G06Q20/40

CPC classification number: G06Q20/3278 ,  G06Q20/3226 ,  G06Q20/40

Abstract: In an embodiment a method for implementing a NFC transaction between a mobile terminal and a distant module is disclosed. The terminal includes a processor hosting an application configured to establish the NFC transaction and an interface software configured to execute instructions of the application, a near-field communication module and a secure element distinct from the processor. The method includes requesting, by the application via the interface software, which verifies whether the application is authorized to communicate with the secure element, authorization to implement the NFC transaction from the secure element, sending, by the secure element, a first temporary authorization to the interface software, verifying, by the interface software, at least for a first time when the near-field communication module receives first data from the distant module, whether the interface software has received the first temporary authorization and transmitting, by the interface software, the first data to the application when the interface software has received the first temporary authorization.

公开(公告)号：US11671078B2

公开(公告)日：2023-06-06

申请号：US17520063

申请日：2021-11-05

Applicant: STMicroelectronics (Rousset) SAS

Inventor： Bruno Gailhard

IPC: H03K3/03 ,  H03K5/26 ,  H03L7/093 ,  H03L7/099 ,  G06F1/06 ,  G06F1/08 ,  H03K5/00

CPC classification number: H03K3/0315 ,  G06F1/06 ,  G06F1/08 ,  H03K5/00006 ,  H03K5/26 ,  H03L7/093 ,  H03L7/0995

Abstract: A device for generating first clock signals includes first circuits, each including a ring oscillator delivering one of the first clock signals and being connected to a first node configured to receive a first current. A circuit selects one the first clock signals, and a phase-locked loop delivers a second signal which is a function of a difference between a frequency of the first selected clock signal and a set point frequency. Each first circuit supplies the first node with a compensation current determined by the second signal, when this first circuit delivers the selected clock signal and operates in controlled mode.