Service area expansion method for mobile communication system and method of processing calls between service areas
    61.
    发明授权
    Service area expansion method for mobile communication system and method of processing calls between service areas 失效
    移动通信系统的服务区域扩展方法和服务区域之间的呼叫处理方法

    公开(公告)号:US06332079B1

    公开(公告)日:2001-12-18

    申请号:US09526599

    申请日:2000-03-16

    CPC classification number: H04W16/26 H04W36/06

    Abstract: Disclosed is a service area expansion method and a method of processing calls between service areas in a mobile communication system adopting a CDMA system like a DCS (digital cellular system) or a PCS (personal communication system), in which a reference clock is delayed and an application specific integrated circuit (ASIC) of a plurality of CSMs (cell site modems) in a base station is controlled using such a delayed reference clock so as to expand service area by each CSM ASIC unit, and a handoff area is positioned between expanded service areas so as to perform a normal call processing. A base station of a CDMA mobile communication system is provided with a plurality of CSM ASICs having the same configuration and a delayed reference clock is fed to each CSM ASIC, thus expanding service area. Such a communication service may be provided to the coastal area where a base station is easily installed. A need to install a base station to the wide area having small subscribers is eliminated, decreasing a cost for base station installation.

    Abstract translation: 公开了一种服务区域扩展方法和处理采用诸如DCS(数字蜂窝系统)或PCS(个人通信系统)的CDMA系统的移动通信系统中的呼叫的方法,其中参考时钟被延迟, 使用这种延迟的参考时钟来控制基站中的多个CSM(小区站点调制解调器)的专用集成电路(ASIC),以便通过每个CSM ASIC单元扩展服务区域,并且切换区域位于扩展 服务区域,以便执行正常呼叫处理。 CDMA移动通信系统的基站设置有具有相同配置的多个CSM ASIC,并且将延迟的参考时钟馈送到每个CSM ASIC,从而扩展服务区域。 可以将这样的通信服务提供给容易安装基站的沿海地区。 消除了在具有小用户的广域上安装基站的需要,降低了基站安装的成本。

    Trench-type insulated gate bipolar transistor and method for making the same
    62.
    发明授权
    Trench-type insulated gate bipolar transistor and method for making the same 有权
    沟槽型绝缘栅双极晶体管

    公开(公告)号:US06262470B1

    公开(公告)日:2001-07-17

    申请号:US09369487

    申请日:1999-08-05

    CPC classification number: H01L29/66348 H01L29/7397

    Abstract: A trench-type insulated gate bipolar transistor in which a channel stop region is partially formed between an n-type high-concentration emitter region and a p-type base region in which a conductive channel is to be formed. The channel stop region is doped with p-type impurities at high concentration. A portion of the emitter region directly contact the base region, and the other portion has the channel stop region disposed between itself and the base region without directly contacting the base region. At the portion where the channel stop region is interposed, an electron current from the emitter region does not flow vertically into a drift region, but horizontally moves to a direct contacts portion between the emitter region and the base region and then vertically flows to the drift region via the conductive channel. The horizontally-flowing electron current within the emitter region causes a voltage drop, thus reducing the voltage difference at the junction between the emitter region and the base region. Therefore, a latch-up phenomenon, in which a parasitic thyristor is turned on, is suppressed.

    Abstract translation: 沟槽型绝缘栅双极晶体管,其中沟道阻挡区域部分地形成在要形成导电沟道的n型高浓度发射极区域和p型基极区域之间。 通道停止区以高浓度掺杂p型杂质。 发射极区域的一部分直接接触基极区域,另一部分具有设置在其与基极区域之间的沟道阻挡区域,而不直接接触基极区域。 在插入通道停止区域的部分,来自发射极区域的电子电流不会垂直流入漂移区域,而是水平移动到发射极区域和基极区域之间的直接接触部分,然后垂直地流到漂移区域 区域。 发射极区域内的水平流动的电子电流引起电压降,从而降低发射极区域和基极区域之间的结处的电压差。 因此,抑制了寄生晶闸管导通的闭锁现象。

    Reference voltage generating circuit
    63.
    发明授权
    Reference voltage generating circuit 有权
    参考电压发生电路

    公开(公告)号:US06184745B2

    公开(公告)日:2001-02-06

    申请号:US09178476

    申请日:1998-10-26

    Applicant: Tae-Hoon Kim

    Inventor: Tae-Hoon Kim

    CPC classification number: G05F3/242

    Abstract: A reference voltage generating circuit generates a reference voltage by using a voltage difference of a PMOS transistor, to thereby exclude the reliability of a back-bias voltage. The reference voltage generating circuit includes a reference voltage generating unit which generates a first reference voltage with respect to a power supply voltage, and a level converting unit which converts the first reference voltage applied from the reference voltage generating unit to a second reference voltage with respect to a ground voltage.

    Abstract translation: 参考电压产生电路通过使用PMOS晶体管的电压差来产生参考电压,从而排除反偏压的可靠性。 参考电压产生电路包括相对于电源电压产生第一参考电压的参考电压产生单元和将从基准电压发生单元施加的第一参考电压转换为第二参考电压的电平转换单元,相对于 到地电压。

    Power semiconductor devices having discontinuous emitter regions therein
for inhibiting parasitic thyristor latch-up
    64.
    发明授权
    Power semiconductor devices having discontinuous emitter regions therein for inhibiting parasitic thyristor latch-up 失效
    功率半导体器件在其中具有不连续的发射极区域,用于抑制寄生晶闸管闩锁

    公开(公告)号:US06111278A

    公开(公告)日:2000-08-29

    申请号:US38871

    申请日:1998-03-11

    Applicant: Tae-Hoon Kim

    Inventor: Tae-Hoon Kim

    CPC classification number: H01L29/7395 H01L29/0692 H01L29/083 H01L2924/0002

    Abstract: Power semiconductor devices having discontinuous emitter regions therein include a semiconductor substrate containing therein a collector region of second conductivity type, a buffer region of first conductivity type which forms a first P-N junction with the collector region and a drift region of first conductivity type which forms a non-rectifying junction with the buffer region. A base region of second conductivity type is also provided in the drift region and forms a second P-N junction therewith. In addition, a base contact region of second conductivity type is provided in the base region of second conductivity type. The base contact region typically has a much higher second conductivity type doping concentration therein than the base region. A preferred emitter region is also provided in the substrate. This preferred emitter region comprises an emitter contact region which is entirely surrounded in the substrate by the highly doped base contact region and a carrier emitting region. This emitter contact region may comprise the central portion of an S, H or C-shaped emitter or one side of an L-shaped emitter. An insulated gate electrode is also provided. The insulated gate electrode provides turn-on and turn-off control by enabling the formation of a highly conductive inversion-layer channel of first conductivity type in the base region. This inversion-layer channel electrically connects the carrier emitting region to the drift region. A first electrode is also electrically coupled to the base contact region and the emitter contact region, and a second electrode is electrically coupled to the collector region.

    Abstract translation: 其中具有不连续发射极区的功率半导体器件包括其中包含第二导电类型的集电极区的半导体衬底,与集电极区形成第一PN结的第一导电类型的缓冲区和形成第一导电类型的漂移区 与缓冲区的非整流结。 第二导电类型的基极区域也设置在漂移区域中并与其形成第二P-N结。 此外,在第二导电类型的基极区域中设置第二导电类型的基极接触区域。 基极接触区域通常在其中比基极区域具有高得多的第二导电类型的掺杂浓度。 在衬底中还提供优选的发射极区域。 该优选的发射极区域包括发射极接触区域,其通过高度掺杂的基极接触区域和载流子发射区域被完全包围在衬底中。 该发射极接触区域可以包括S,H或C形发射体的中心部分或L形发射体的一侧。 还提供了绝缘栅电极。 绝缘栅极通过在基极区域形成第一导电类型的高导电性反型层沟道而提供导通和截止控制。 该反转层通道将载流子发射区电连接到漂移区。 第一电极还电耦合到基极接触区域和发射极接触区域,并且第二电极电耦合到集电极区域。

    Methods forming power semiconductor devices having latch-up inhibiting
regions
    65.
    发明授权
    Methods forming power semiconductor devices having latch-up inhibiting regions 失效
    形成具有闭锁抑制区域的功率半导体器件的方法

    公开(公告)号:US5879967A

    公开(公告)日:1999-03-09

    申请号:US788372

    申请日:1997-01-27

    Applicant: Tae-Hoon Kim

    Inventor: Tae-Hoon Kim

    CPC classification number: H01L29/66333 H01L29/1095

    Abstract: Methods of forming power semiconductor devices include the steps of forming a relatively highly doped latch-up inhibiting region to suppress the likelihood of parasitic thyristor latch-up in a power semiconductor device such as an insulated-gate bipolar transistor (IGBT). In particular, an insulated-gate bipolar transistor is formed by patterning an insulated gate electrode on a surface of a drift region and then implanting first dopants of second conductivity type (e.g., P-type) at a first depth into the drift region, using the gate electrode as an implant mask. The implanted first dopants are then diffused using a thermal treatment to form a base region (e.g., P- well region). Second dopants of second conductivity type are then implanted into the base region at a second depth, less than the first depth, using the insulated gate electrode as a mask. Third dopants of first conductivity type (e.g., N-type) are also implanted into the base region at a third depth, less than the second depth, using the insulated gate electrode as an implant mask. These opposite conductivity type dopants are then simultaneously diffused laterally and vertically in the base region to define a relatively wide and highly doped latch-up inhibiting region (e.g., P-type) and at least one source region disposed between the latch-up inhibiting region and the surface of the drift region. By implanting the second and third dopants using the same implant mask and then diffusing these dopants simultaneously and for the same duration, a latch-up inhibiting region can be formed as wide in the base region as the at least one source region, when the regions are viewed in transverse cross-section. This inhibits the likelihood that the P-N junction at the edge of the at least one source region will become forward biased during high forward current conduction.

    Abstract translation: 形成功率半导体器件的方法包括以下步骤:形成相对高掺杂的闭锁抑制区域,以抑制诸如绝缘栅双极晶体管(IGBT)的功率半导体器件中的寄生晶闸管闩锁的可能性。 特别地,通过对漂移区域的表面上的绝缘栅电极进行图案化,然后在第一深度将第二导电类型(例如,P型)的第一掺杂物注入到漂移区域中,形成绝缘栅双极晶体管,使用 栅电极作为植入物掩模。 然后使用热处理使植入的第一掺杂剂扩散以形成碱基区域(例如,P-阱区域)。 然后使用绝缘栅电极作为掩模,将第二导电类型的第二掺杂剂以比第一深度小的第二深度注入到基极区域中。 使用绝缘栅电极作为植入掩模,第一导电类型(例如,N型)的第三掺杂剂也被注入到第三深度小于第二深度的基极区域中。 然后,这些相反的导电型掺杂剂同时在基极区域中横向和垂直地扩散,以限定相对宽且高度掺杂的闩锁禁止区域(例如,P型)和至少一个源极区域,位于闩锁禁止区域 和漂移区域的表面。 通过使用相同的注入掩模注入第二和第三掺杂剂,然后同时扩散这些掺杂剂并且持续相同的时间,可以在基极区域形成闩锁禁止区域作为至少一个源极区域,当区域 以横截面看。 这抑制了在高正向电流传导期间在至少一个源极区域的边缘处的P-N结将变为正向偏置的可能性。

    Back bias voltage generator circuit of a semiconductor memory device
    66.
    发明授权
    Back bias voltage generator circuit of a semiconductor memory device 失效
    半导体存储器件的背偏压生成电路

    公开(公告)号:US5434820A

    公开(公告)日:1995-07-18

    申请号:US134040

    申请日:1993-10-08

    Applicant: Tae-hoon Kim

    Inventor: Tae-hoon Kim

    CPC classification number: G11C5/146

    Abstract: A Vbb generator having several distributed Vbb generators, which are located respectively adjacent to memory array blocks is disclosed. The distributed Vbb generator is activated during the time when a memory block located adjacent the Vbb generator is accessed for write/read operations. The back bias voltage generator circuit has a first Vbb generator and a second Vbb generator for supplying a back bias voltage to the substrate. The second Vbb generator comprises an oscillator for generating a clock pulse and a plurality of distributed Vbb generators. The distributed Vbb generators include an auxiliary pumping portion including a buffer portion for buffering the clock pulse from the oscillator, a pumping capacitor connected to the output of the buffer portion for pumping a back bias voltage, and a rectifying portion connected to the pumping capacitor for supplying the back bias voltage to the substrate, and a switch for connecting the clock pulse from the oscillator to the auxiliary pumping portion, the clock pulse activating a pumping operation of the auxiliary pumping portion.

    Abstract translation: 公开了一种Vbb发生器,其具有分别位于存储器阵列块附​​近的多个分布式Vbb发生器。 在访问位于Vbb发生器附近的存储器块进行写入/读取操作的时间期间,分配的Vbb发生器被激活。 背偏置电压发生器电路具有第一Vbb发生器和用于向衬底提供反偏压的第二Vbb发生器。 第二Vbb发生器包括用于产生时钟脉冲的振荡器和多个分布式Vbb发生器。 分布式Vbb发生器包括辅助泵送部分,其包括用于缓冲来自振荡器的时钟脉冲的缓冲部分,连接到缓冲部分的输出以泵送反偏压的泵浦电容器,以及连接到泵浦电容器的整流部分 向衬底提供背偏置电压,以及用于将来自振荡器的时钟脉冲连接到辅助泵送部分的开关,所述时钟脉冲激活辅助泵送部分的泵送操作。

    FLUORIDE PHOSPHOR, METHOD OF MANUFACTURING THE SAME, AND LIGHT EMITTING DEVICE
    67.
    发明申请
    FLUORIDE PHOSPHOR, METHOD OF MANUFACTURING THE SAME, AND LIGHT EMITTING DEVICE 审中-公开
    氟化物荧光体,其制造方法和发光装置

    公开(公告)号:US20170009132A1

    公开(公告)日:2017-01-12

    申请号:US15075311

    申请日:2016-03-21

    CPC classification number: C09K11/617 C09K11/025 H01L2933/0041

    Abstract: A fluoride phosphor includes fluoride particles represented by AxMFy:Mnz4+ where A is at least one selected from lithium (Li), sodium (Na), potassium (K), rubidium (Rb), and cesium (Cs), M is at least one selected from silicon (Si), titanium (Ti), zirconium (Zr), hafnium (Hf), germanium (Ge) and tin (Sn), a compositional ratio x of A satisfies 2≦x≦3, and a compositional ratio y of F satisfies 4≦y≦7; and an organic material physically adsorbed onto surfaces of the fluoride particles to allow the fluoride particles to have hydrophobicity. The fluoride particles have a concentration of Mn4+ gradually reduced from respective centers to respective surfaces of the fluoride particles.

    Abstract translation: 氟化物荧光体包括由AxMFy:Mnz4 +表示的氟化物粒子,其中A为选自锂(Li),钠(Na),钾(K),铷(Rb)和铯(Cs)中的至少一种,M为至少一种 选自硅(Si),钛(Ti),锆(Zr),铪(Hf),锗(Ge)和锡(Sn),组成比x满足2≤x≤3,组成比y 的F满足4≤y≤7; 和有机材料物理吸附在氟化物颗粒的表面上,以使氟化物颗粒具有疏水性。 氟化物颗粒的浓度从各个中心逐渐减少到氟化物颗粒的各个表面。

    Method and Apparatus for Searching an Image, and Computer-Readable Recording Medium for Executing the Method
    70.
    发明申请
    Method and Apparatus for Searching an Image, and Computer-Readable Recording Medium for Executing the Method 有权
    用于搜索图像的方法和装置,以及用于执行该方法的计算机可读记录介质

    公开(公告)号:US20140201219A1

    公开(公告)日:2014-07-17

    申请号:US14343164

    申请日:2012-11-12

    CPC classification number: G06F17/30268 G06F17/30247 G06K9/72 G06K2009/4666

    Abstract: The present disclosure relates to a method and apparatus for searching an image, and to a computer-readable recording medium for executing the method. The apparatus for searching an image of the present disclosure obtains features of an input image; and obtains words that correspond to the features respectively and an adjacent word that is adjacent to the words corresponding to the features. When a word is assigned to a first word cell of a plurality of word cells that are included in a visual feature space, an adjacent word is assigned to at least one second word cell that is adjacent to the first word cell, where the plurality of word cells is assigned to different words, and at least one word being within a predetermined distance from a word is designated as the adjacent word. The apparatus is further configured to search for an image that is identical or similar to the input image based on information associated with a first group of images corresponding to the word and information associated with a second group of images corresponding to the adjacent word, the information on the first and second groups of images being stored in a database.

    Abstract translation: 本公开涉及一种用于搜索图像的方法和装置,以及用于执行该方法的计算机可读记录介质。 用于搜索本公开的图像的装置获得输入图像的特征; 并且分别获得与特征相对应的单词和与对应于特征的单词相邻的相邻单词。 当将单词分配给包括在视觉特征空间中的多个单元格的第一单词单元时,将相邻单词分配给与第一单词单元相邻的至少一个第二单词单元,其中多个单词 字单元被分配给不同的单词,并且至少一个在与单词之间的预定距离内的单词被指定为相邻单词。 该设备还被配置为基于与对应于该单词的第一组图像相关联的信息以及与对应于该相邻单词的第二组图像相关联的信息来搜索与该输入图像相同或相似的图像,该信息 在第一组和第二组图像存储在数据库中。

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