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公开(公告)号:US20210333132A1
公开(公告)日:2021-10-28
申请号:US17366459
申请日:2021-07-02
Applicant: Apple Inc.
Inventor: Brijesh Tripathi , Shane J. Keil , Manu Gulati , Jung Wook Cho , Erik P. Machnicki , Gilbert H. Herbeck , Timothy J. Millet , Joshua P. de Cesare , Anand Dalal , Michael F. Culbert
IPC: G01D9/00 , G06F13/16 , G06F1/3206 , G06F1/3287 , G06F1/3293
Abstract: In an embodiment, a system on a chip (SOC) includes a component that remains powered when the remainder of the SOC is powered off. The component may include a sensor capture unit to capture data from various device sensors, and may filter the captured sensor data. Responsive to the filtering, the component may wake up the remainder of the SOC to permit the processing. The component may store programmable configuration data, matching the state at the time the SOC was most recently powered down, for the other components of the SOC, in order to reprogram them after wakeup. In some embodiments, the component may be configured to wake up the memory controller within the SOC and the path to the memory controller, in order to write the data to memory. The remainder of the SOC may remain powered down.
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公开(公告)号:US20210287677A1
公开(公告)日:2021-09-16
申请号:US17332725
申请日:2021-05-27
Applicant: Apple Inc.
Inventor: Timothy J. Millet , Manu Gulati , Michael F. Culbert
IPC: G10L15/28 , G06F3/16 , G06F1/3228 , G06F1/3287 , G06F1/32 , G10L15/22
Abstract: In an embodiment, an integrated circuit may include one or more CPUs, a memory controller, and a circuit configured to remain powered on when the rest of the SOC is powered down. The circuit may be configured to receive audio samples from a microphone, and match those audio samples against a predetermined pattern to detect a possible command from a user of the device that includes the SOC. In response to detecting the predetermined pattern, the circuit may cause the memory controller to power up so that audio samples may be stored in the memory to which the memory controller is coupled. The circuit may also cause the CPUs to be powered on and initialized, and the operating system (OS) may boot. During the time that the CPUs are initializing and the OS is booting, the circuit and the memory may be capturing the audio samples.
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公开(公告)号:US11079261B2
公开(公告)日:2021-08-03
申请号:US16689555
申请日:2019-11-20
Applicant: Apple Inc.
Inventor: Brijesh Tripathi , Shane J. Keil , Manu Gulati , Jung Wook Cho , Erik P. Machnicki , Gilbert H. Herbeck , Timothy J. Millet , Joshua P. de Cesare , Anand Dalal
IPC: G01D9/00 , G06F13/16 , G06F1/3206 , G06F1/3287 , G06F1/3293
Abstract: In an embodiment, a system on a chip (SOC) includes a component that remains powered when the remainder of the SOC is powered off. The component may include a sensor capture unit to capture data from various device sensors, and may filter the captured sensor data. Responsive to the filtering, the component may wake up the remainder of the SOC to permit the processing. The component may store programmable configuration data, matching the state at the time the SOC was most recently powered down, for the other components of the SOC, in order to reprogram them after wakeup. In some embodiments, the component may be configured to wake up the memory controller within the SOC and the path to the memory controller, in order to write the data to memory. The remainder of the SOC may remain powered down.
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公开(公告)号:US10911673B2
公开(公告)日:2021-02-02
申请号:US16673173
申请日:2019-11-04
Applicant: Apple Inc.
Inventor: D. Amnon Silverstein , Shun Wai Go , Suk Hwan Lim , Timothy J. Millet , Ting Chen , Bin Ni
Abstract: In an embodiment, an electronic device may be configured to capture still frames during video capture but may capture the still frames in the 4×3 aspect ratio and at higher resolution than the 16×9 aspect ratio video frames. The device may interleave high resolution, 4×3 frames and lower resolution 16×9 frames in the video sequence, and may capture the nearest higher resolution, 4×3 frame when the user indicates the capture of a still frame. Alternatively, the device may display 16×9 frames in the video sequence, and then expand to 4×3 frames when a shutter button is pressed. The device may capture the still frame and return to the 16×9 video frames responsive to a release of the shutter button.
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公开(公告)号:US20200184976A1
公开(公告)日:2020-06-11
申请号:US16786127
申请日:2020-02-10
Applicant: Apple Inc.
Inventor: Timothy J. Millet , Manu Gulati , Michael F. Culbert
IPC: G10L15/28 , G10L15/22 , G06F1/32 , G06F1/3287 , G06F1/3228 , G06F3/16
Abstract: In an embodiment, an integrated circuit may include one or more CPUs, a memory controller, and a circuit configured to remain powered on when the rest of the SOC is powered down. The circuit may be configured to receive audio samples from a microphone, and match those audio samples against a predetermined pattern to detect a possible command from a user of the device that includes the SOC. In response to detecting the predetermined pattern, the circuit may cause the memory controller to power up so that audio samples may be stored in the memory to which the memory controller is coupled. The circuit may also cause the CPUs to be powered on and initialized, and the operating system (OS) may boot. During the time that the CPUs are initializing and the OS is booting, the circuit and the memory may be capturing the audio samples.
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公开(公告)号:US20200149932A1
公开(公告)日:2020-05-14
申请号:US16689555
申请日:2019-11-20
Applicant: Apple Inc.
Inventor: Brijesh Tripathi , Shane J. Keil , Manu Gulati , Jung Wook Cho , Erik P. Machnicki , Gilbert H. Herbeck , Timothy J. Millet , Joshua P. de Cesare , Anand Dalal
IPC: G01D9/00 , G06F1/3293 , G06F1/3287 , G06F1/3206 , G06F13/16
Abstract: In an embodiment, a system on a chip (SOC) includes a component that remains powered when the remainder of the SOC is powered off. The component may include a sensor capture unit to capture data from various device sensors, and may filter the captured sensor data. Responsive to the filtering, the component may wake up the remainder of the SOC to permit the processing. The component may store programmable configuration data, matching the state at the time the SOC was most recently powered down, for the other components of the SOC, in order to reprogram them after wakeup. In some embodiments, the component may be configured to wake up the memory controller within the SOC and the path to the memory controller, in order to write the data to memory. The remainder of the SOC may remain powered down.
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公开(公告)号:US20200068129A1
公开(公告)日:2020-02-27
申请号:US16673173
申请日:2019-11-04
Applicant: Apple Inc.
Inventor: D. Amnon Silverstein , Shun Wai Go , Suk Hwan Lim , Timothy J. Millet , Ting Chen , Bin Ni
Abstract: In an embodiment, an electronic device may be configured to capture still frames during video capture but may capture the still frames in the 4×3 aspect ratio and at higher resolution than the 16×9 aspect ratio video frames. The device may interleave high resolution, 4×3 frames and lower resolution 16×9 frames in the video sequence, and may capture the nearest higher resolution, 4×3 frame when the user indicates the capture of a still frame. Alternatively, the device may display 16×9 frames in the video sequence, and then expand to 4×3 frames when a shutter button is pressed. The device may capture the still frame and return to the 16×9 video frames responsive to a release of the shutter button.
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公开(公告)号:US20190171380A1
公开(公告)日:2019-06-06
申请号:US16266320
申请日:2019-02-04
Applicant: Apple Inc.
Inventor: James Wang , Zongjian Chen , James B. Keller , Timothy J. Millet
IPC: G06F3/06 , G06F12/0846 , G06F12/0864 , G06F12/123 , G06F12/0877 , G06F12/0831 , G06F12/0802 , G06F12/0853
CPC classification number: G06F3/0631 , G06F3/0604 , G06F3/0638 , G06F3/0673 , G06F12/0802 , G06F12/0831 , G06F12/0848 , G06F12/0853 , G06F12/0864 , G06F12/0877 , G06F12/125 , G06F2212/1021 , G06F2212/2515 , G06F2212/282 , G06F2212/601 , G06F2212/62 , Y02D10/13
Abstract: In one embodiment, a memory that is delineated into transparent and non-transparent portions. The transparent portion may be controlled by a control unit coupled to the memory, along with a corresponding tag memory. The non-transparent portion may be software controlled by directly accessing the non-transparent portion via an input address. In an embodiment, the memory may include a decoder configured to decode the address and select a location in either the transparent or non-transparent portion. Each request may include a non-transparent attribute identifying the request as either transparent or non-transparent. In an embodiment, the size of the transparent portion may be programmable. Based on the non-transparent attribute indicating transparent, the decoder may selectively mask bits of the address based on the size to ensure that the decoder only selects a location in the transparent portion.
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公开(公告)号:US10290620B2
公开(公告)日:2019-05-14
申请号:US15420594
申请日:2017-01-31
Applicant: Apple Inc.
Inventor: John Bruno , Jun Zhai , Timothy J. Millet
IPC: H01L25/18 , H01L25/16 , H01L23/13 , H01L23/367 , H05K1/02 , H05K1/14 , H01L23/538 , H01L25/065 , H01L25/10 , H05K1/18
Abstract: A semiconductor package includes a processor die (e.g., an SoC) and one or more memory die (e.g., DRAM) coupled to a ball grid array (BGA) substrate. The processor die and the memory die are coupled to opposite sides of the BGA substrate using terminals (e.g., solder balls). The package may be coupled to a printed circuit board (PCB) using one or more terminals positioned around the perimeter of the processor die. The PCB may include a recess with at least part of the processor die being positioned in the recess. Positioning at least part of the processor die in the recess reduces the overall height of the semiconductor package assembly. A voltage regulator may also be coupled to the BGA substrate on the same side as the processor die with at least part of the voltage regulator being positioned in the recess a few millimeters from the processor die.
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公开(公告)号:US10276165B2
公开(公告)日:2019-04-30
申请号:US16101603
申请日:2018-08-13
Applicant: Apple Inc. , Diane Culbert
Inventor: Timothy J. Millet , Manu Gulati , Michael F. Culbert
IPC: G10L15/28 , G06F3/16 , G06F1/3228 , G06F1/3287 , G06F1/32 , G10L15/22 , G10L15/08 , G10L25/48
Abstract: In an embodiment, an integrated circuit may include one or more CPUs, a memory controller, and a circuit configured to remain powered on when the rest of the SOC is powered down. The circuit may be configured to receive audio samples from a microphone, and match those audio samples against a predetermined pattern to detect a possible command from a user of the device that includes the SOC. In response to detecting the predetermined pattern, the circuit may cause the memory controller to power up so that audio samples may be stored in the memory to which the memory controller is coupled. The circuit may also cause the CPUs to be powered on and initialized, and the operating system (OS) may boot. During the time that the CPUs are initializing and the OS is booting, the circuit and the memory may be capturing the audio samples.
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