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173 条记录 (耗时 0.028 秒)

    Field effect semiconductor component and method for its production
    61.
    发明申请
    Field effect semiconductor component and method for its production 审中-公开
    场效应半导体元件及其制作方法

    公开(公告)号：US20070075375A1

    公开(公告)日：2007-04-05

    申请号：US11463755

    申请日：2006-08-10

    申请人： Jeno Tihanyi ,  Nada Tihanyi ,  Wolfgang Werner

    发明人： Jeno Tihanyi ,  Nada Tihanyi ,  Wolfgang Werner

    IPC分类号： H01L29/76

    CPC分类号： H01L29/7395 ,  H01L29/0649

    摘要： A field effect semiconductor component has a bipolar transistor structure in a semiconductor body consisting of a lightly doped upper area of a first conductivity type as base region and of a lower heavily doped area as emitter region with a complementary conductivity type. Between the base region and the emitter region, a horizontal pn junction forms. The emitter region is in resistive contact with a large-area emitter electrode on the rear of the semiconductor component. On the top of the semiconductor component, a first insulated gate electrode and a second insulated gate electrode are arranged adjacently in the area close to the surface. A vertical pn junction region insulated from the upper area is arranged in such a manner that a collector region and the base region of the bipolar transistor structure can be controlled via the insulated gate electrodes (G1 and G2) arranged electrically separately.

    摘要翻译： 场效应半导体元件在半导体主体中具有双极晶体管结构，该半导体主体由作为基极区的第一导电类型的轻掺杂上部区域和作为具有互补导电类型的发射极区域的较低重掺杂区域组成。 在基极区域和发射极区域之间形成水平pn结。 发射极区域与半导体元件后面的大面积发射极电阻接触。 在半导体部件的顶部，第一绝缘栅电极和第二绝缘栅电极相邻布置在靠近表面的区域中。 与上部区域绝缘的垂直pn结区域被布置成使得双极晶体管结构的集电极区域和基极区域可以经由绝缘栅极电极（G＆lt; 1＆gt;和＆ 电气分开排列。

    Power trench transistor
    64.
    发明申请
    Power trench transistor 有权
    功率沟槽晶体管

    公开(公告)号：US20060118864A1

    公开(公告)日：2006-06-08

    申请号：US11264756

    申请日：2005-10-31

    申请人： Franz Hirler ,  Wolfgang Werner ,  Markus Zundel ,  Frank Pfirsch

    发明人： Franz Hirler ,  Wolfgang Werner ,  Markus Zundel ,  Frank Pfirsch

    IPC分类号： H01L29/76

    CPC分类号： H01L29/7811 ,  H01L29/0696 ,  H01L29/0878 ,  H01L29/407 ,  H01L29/42368 ,  H01L29/7813

    摘要： A power trench transistor comprises a semiconductor body in which a cell array and an edge region surrounding the cell array are formed. First edge trenches are formed within the edge region. The first edge trenches contain field electrodes and the longitudinal orientations of the first edge trenches run from the cell array towards the edge of the trench transistor.

    摘要翻译： 功率沟槽晶体管包括其中形成有单元阵列和围绕单元阵列的边缘区域的半导体本体。 第一边缘沟槽形成在边缘区域内。 第一边缘沟槽包含场电极，并且第一边缘沟槽的纵向取向从单元阵列朝向沟槽晶体管的边缘延伸。

    Micromechanical component with sealed membrane openings and method of fabricating a micromechanical component
    66.
    发明授权
    Micromechanical component with sealed membrane openings and method of fabricating a micromechanical component 有权
    具有密封膜开口的微机械部件和制造微机械部件的方法

    公开(公告)号：US06541833B2

    公开(公告)日：2003-04-01

    申请号：US09794663

    申请日：2001-02-27

    申请人： Wolfgang Werner ,  Stefan Kolb

    发明人： Wolfgang Werner ,  Stefan Kolb

    IPC分类号： H01L2982

    CPC分类号： B81C1/00158 ,  B81B2201/0235 ,  B81B2201/0257 ,  B81B2201/0264 ,  B81B2203/0127 ,  B81B2203/0315 ,  G01L9/0042 ,  Y10T428/24331

    摘要： The method for producing a micromechanical component includes the following steps: producing a semi-finished micromechanical component; producing openings and forming a cavity; sealing the opening with sealing lids; removing material on the top surface of the first membrane layer, the surface of the first membrane layer being exposed and planarized. The invention also relates to a micromechanical component which can be produced according to the above method and to its use in sensors such as pressure sensors, microphones, or acceleration sensors.

    摘要翻译： 微机械部件的制造方法包括以下步骤：制造半成品微机械部件; 产生开口并形成空腔; 用密封盖密封开口; 去除第一膜层的顶表面上的材料，第一膜层的表面被曝光和平坦化。 本发明还涉及一种可以根据上述方法制造的微机械部件，以及其在诸如压力传感器，麦克风或加速度传感器的传感器中的应用。

    Low impedance VDMOS semiconductor component
    67.
    发明授权
    Low impedance VDMOS semiconductor component 有权

    公开(公告)号：US06534830B2

    公开(公告)日：2003-03-18

    申请号：US10011131

    申请日：2001-11-13

    申请人： Jenoe Tihanyi ,  Wolfgang Werner

    发明人： Jenoe Tihanyi ,  Wolfgang Werner

    IPC分类号： H01L2976

    CPC分类号： H01L29/7802 ,  H01L29/0623 ,  H01L29/0634 ,  H01L29/0653 ,  H01L29/0878 ,  H01L29/1095 ,  H01L29/41766 ,  H01L29/7396

    摘要： A low impedance VDMOS semiconductor component having a planar gate structure is described. The VDMOS semiconductor component contains a semiconductor body of a first conductivity type having two main surfaces, including a first main surface and a second main surface disposed substantially opposite to one another. A highly doped first zone of the first conductivity type is disposed in an area of the first main surface. A second zone of a second conductivity type separates the first zone from the semiconductor body. The first zone and the second zone have a trench with a bottom formed therein reaching down to the semiconductor body. An insulating material fills the trench at least beyond an edge of the second zone facing the semiconductor body. A region of the second conductivity type surrounds an area of the bottom of the trench.

    Semiconductor component with a structure for avoiding parallel-path currents and method for fabricating a semiconductor component
    68.
    发明授权
    Semiconductor component with a structure for avoiding parallel-path currents and method for fabricating a semiconductor component 失效
    具有避免并联路径电流的结构的半导体元件和用于制造半导体元件的方法

    公开(公告)号：US06469365B1

    公开(公告)日：2002-10-22

    申请号：US09415728

    申请日：1999-10-12

    申请人： Wolfgang Werner

    发明人： Wolfgang Werner

    IPC分类号： H01L2900

    CPC分类号： H01L27/0921 ,  H01L21/761

    摘要： A semiconductor component having a structure for avoiding parallel-path currents in the semiconductor component includes a substrate of a first conductivity type having a surface. A plurality of separate wells of a second conductivity type with a more highly doped edge layer of the second conductivity type are disposed at the surface of the substrate and are isolated from one another by pn junctions. At least one of the wells is completely surrounded by an insulating well of the first conductivity type. The doping of the insulating well is higher than that of the substrate. A method for fabricating a semiconductor component is also provided.

    摘要翻译： 具有用于避免半导体部件中的平行通路电流的结构的半导体部件包括具有表面的第一导电型的基板。 具有第二导电类型的更高掺杂边缘层的具有第二导电类型的多个单独的阱设置在衬底的表面并且通过pn结彼此隔离。 至少一个孔被第一导电类型的绝缘阱完全包围。 绝缘阱的掺杂高于衬底的掺杂。 还提供了一种制造半导体部件的方法。

    Semiconductor component
    69.
    发明授权
    Semiconductor component 有权
    半导体元件

    公开(公告)号：US06337499B1

    公开(公告)日：2002-01-08

    申请号：US09530668

    申请日：2000-08-04

    申请人： Wolfgang Werner

    发明人： Wolfgang Werner

    IPC分类号： H01L2978

    CPC分类号： H01L29/7802 ,  H01L21/2255 ,  H01L29/0634 ,  H01L29/0653 ,  H01L29/41766

    摘要： The invention is directed to a semiconductor component having a semiconductor body with two principal faces, at least two electrodes at least one electrode being provided on a principal face, and zones of a conductivity type opposite one another that are arranged in alternation in the semiconductor body and extend perpendicularly to the two principal faces. For an application of a voltage to the two electrodes, the zones arranged in alternation mutually clear of charge carriers so that an essentially constant field strength is built up in the semiconductor body between the two electrodes These zones arranged in alternation inventively contain at least one cavity that is preferably closed by a glass layer.

    摘要翻译： 本发明涉及一种具有半导体主体的半导体部件，该半导体器件具有两个主面，至少两个电极，至少一个电极设置在主面上，以及导电类型彼此相对的区域，其在半导体本体中交替布置 并垂直于两个主面延伸。 为了对两个电极施加电压，交替布置的区域相互清除电荷载体，使得在两个电极之间的半导体本体中建立基本上恒定的场强。这些交替布置的区域本来包含至少一个空腔 优选由玻璃层封闭。

    Process for producing an epitaxial layer with laterally varying doping
    70.
    发明授权
    Process for producing an epitaxial layer with laterally varying doping 有权
    用于制造具有横向变化的掺杂的外延层的工艺

    公开(公告)号：US06171935B2

    公开(公告)日：2001-01-09

    申请号：US09317694

    申请日：1999-05-24

    申请人： Paul Nance ,  Wolfgang Werner

    发明人： Paul Nance ,  Wolfgang Werner

    IPC分类号： H01L2120

    CPC分类号： H01L29/7802 ,  H01L21/02381 ,  H01L21/02532 ,  H01L21/02639 ,  H01L21/30604 ,  H01L29/0634 ,  H01L29/0696 ,  H01L29/0873 ,  H01L29/1095 ,  H01L29/66712 ,  Y10S438/969

    摘要： A process for producing an epitaxial layer with laterally varying doping includes the following steps: (a) applying a patterned insulator layer to a semiconductor body; (b) growing a first epitaxial layer on the semiconductor body and the patterned insulator layer so that monocrystalline regions are formed over the semiconductor body and polycrystalline regions are formed over the patterned insulator layer, the angle of inclination (&agr;) of the interface between the monocrystalline regions and the polycrystalline regions depending on the grain size of the polycrystalline regions; (c) removing the polycrystalline regions and the insulator layer, and (d) growing a second epitaxial layer which, together with the monocrystalline regions of the first epitaxial layer, forms the epitaxial layer.

    摘要翻译： 用于制造具有横向变化掺杂的外延层的方法包括以下步骤：（a）将图案化的绝缘体层施加到半导体本体; （b）在半导体主体和图案化的绝缘体层上生长第一外延层，使得在半导体主体上形成单晶区域，并且多晶区域形成在图案化的绝缘体层之上，其中界面的倾斜角（α） 单晶区域和多晶区域取决于多晶区域的晶粒尺寸; （c）去除多晶区域和绝缘体层，以及（d）生长第二外延层，其与第一外延层的单晶区域一起形成外延层。