公开(公告)号：US20150170923A1

公开(公告)日：2015-06-18

申请号：US14133546

申请日：2013-12-18

Applicant: Intermolecular, Inc.

Inventor： Federico Nardi ,  Randall J. Higuchi ,  Robert A. Huertas ,  Yun Wang

IPC: H01L21/306

CPC classification number: H01L21/32134 ,  H01L21/28123 ,  H01L21/32139 ,  H01L28/20 ,  H01L29/66545

Abstract: Selective wet etching is used to produce feature sizes of reduced width in semiconductor devices. An initial patterning step (e.g., photolithography) forms a pillar of an initial width from at least a selected first layer and an overlayer. A wet etchant that is selective to the selected layer undercuts the sidewalls of the selected layer to a smaller width while leaving at least part of the overlayer in place to protect the top surface of the selected layer. The selected layer becomes a narrow “stem” within the pillar, and may have dimensions below the resolution limit of the technique used for the initial patterning. For some devices, voids may be intentionally left in a fill layer around the stem for electrical or thermal insulation.

Abstract translation: 选择性湿蚀刻用于制造半导体器件中宽度减小的特征尺寸。 初始构图步骤（例如，光刻）从至少所选择的第一层和覆盖层形成初始宽度的柱。 对所选择的层选择性的湿蚀刻剂将所选层的侧壁切割成更小的宽度，同时使覆盖层的至少一部分保留在适当位置以保护所选择的层的顶表面。 所选择的层在柱内成为窄的“茎”，并且可以具有低于用于初始图案化的技术的分辨率极限的尺寸。 对于一些设备，可能有意将空隙留在阀杆周围的填充层中进行电气或绝热。

公开(公告)号：US09013913B2

公开(公告)日：2015-04-21

申请号：US14276229

申请日：2014-05-13

Applicant: Intermolecular, Inc.

Inventor： Yun Wang ,  Tony P. Chiang ,  Prashant B. Phatak

IPC: G11C13/00 ,  G11C11/00 ,  G11C7/00 ,  G11C17/06 ,  G11C5/02 ,  G11C5/06 ,  G11C13/02 ,  G11C11/36 ,  G11C13/04

CPC classification number: G11C13/02 ,  G11C7/00 ,  G11C11/36 ,  G11C13/0002 ,  G11C13/0007 ,  G11C13/0021 ,  G11C13/0069 ,  G11C13/04 ,  G11C2013/0073 ,  G11C2013/0092 ,  G11C2213/72

Abstract: According to various embodiments, a resistive-switching memory element and memory element array that uses a bipolar switching includes a select element comprising only a single diode that is not a Zener diode. The resistive-switching memory elements described herein can switch even when a switching voltage less than the breakdown voltage of the diode is applied in the reverse-bias direction of the diode. The memory elements are able to switch during the very brief period when a transient pulse voltage is visible to the memory element, and therefore can use a single diode per memory cell.

Abstract translation: 根据各种实施例，使用双极开关的电阻式开关存储器元件和存储元件阵列包括仅包括不是齐纳二极管的单个二极管的选择元件。 即使当在二极管的反向偏置方向上施加小于二极管的击穿电压的开关电压时，本文所述的电阻式开关存储元件也可以切换。 存储器元件能够在瞬态脉冲电压对存储元件可见时的非常短的时间内进行切换，因此每个存储单元可以使用单个二极管。

公开(公告)号：US08980766B2

公开(公告)日：2015-03-17

申请号：US14327774

申请日：2014-07-10

Applicant: Intermolecular Inc. ,  Kabushiki Kaisha Toshiba ,  SanDisk 3D LLC

Inventor： Yun Wang ,  Tony P. Chiang ,  Tim Minvielle ,  Takeshi Yamaguchi

IPC: H01L21/68 ,  H01L45/00 ,  H01L27/24

CPC classification number: H01L45/145 ,  H01L27/2481 ,  H01L45/08 ,  H01L45/10 ,  H01L45/1233 ,  H01L45/1253 ,  H01L45/146 ,  H01L45/16 ,  H01L45/1616

Abstract: Provided are methods of forming nonvolatile memory elements using atomic layer deposition techniques, in which at least two different layers of a memory element are deposited sequentially and without breaking vacuum in a deposition chamber. This approach may be used to prevent oxidation of various materials used for electrodes without a need for separate oxygen barrier layers. A combination of signal lines and resistive switching layers may be used to cap the electrodes and to minimize their oxidation. As such, fewer layers are needed in a memory element. Furthermore, atomic layer deposition allows more precise control of electrode thicknesses. In some embodiments, a thickness of an electrode may be less than 50 Angstroms. Overall, atomic layer deposition of electrodes and resistive switching layers lead to smaller thicknesses of entire memory elements making them more suitable for low aspect ratio features of advanced nodes.

Abstract translation: 提供了使用原子层沉积技术形成非易失性存储元件的方法，其中存储元件的至少两个不同层顺次沉积并且在沉积室中不破坏真空。 该方法可以用于防止用于电极的各种材料的氧化，而不需要单独的氧阻隔层。 可以使用信号线和电阻开关层的组合来封盖电极并使其氧化最小化。 因此，存储元件中需要更少的层。 此外，原子层沉积允许更精确地控制电极厚度。 在一些实施例中，电极的厚度可以小于50埃。 总的来说，电极和电阻开关层的原子层沉积导致整个存储元件的较小厚度，使得它们更适合于高级节点的低纵横比特征。

公开(公告)号：US08969844B1

公开(公告)日：2015-03-03

申请号：US14139476

申请日：2013-12-23

Applicant: Intermolecular Inc.

Inventor： Yun Wang

IPC: H01L29/02 ,  H01L45/00

CPC classification number: H01L45/1625 ,  H01L27/2409 ,  H01L27/2481 ,  H01L45/08 ,  H01L45/12 ,  H01L45/1233 ,  H01L45/145 ,  H01L45/1616

Abstract: Provided are resistive random access memory (ReRAM) cells and methods of fabricating thereof. The methods may include forming a first layer on a substrate, where the first layer is operable as a bottom electrode. The methods may also include forming a second layer, where the second layer includes a resistive portion and a resistive switching portion. The resistive portion may be configured to determine, at least in part, an electrical resistivity of the resistive switching nonvolatile memory element. The resistive portion may have a substantially constant resistance. The resistive portion may include, at least in part, a conductive silicon oxide. The resistive switching portion may be configured to switch between a first resistive state and a second resistive state. The resistive switching portion may include, at least in part, silicon oxide. The methods may also include forming a third layer, where the third layer is operable as a top electrode.

Abstract translation: 提供了电阻随机存取存储器（ReRAM）单元及其制造方法。 所述方法可以包括在基底上形成第一层，其中第一层可操作为底部电极。 所述方法还可以包括形成第二层，其中第二层包括电阻部分和电阻切换部分。 电阻部分可以被配置为至少部分地确定电阻式开关非易失性存储元件的电阻率。 电阻部分可具有基本恒定的电阻。 电阻部分可以至少部分地包括导电氧化硅。 电阻开关部分可以被配置为在第一电阻状态和第二电阻状态之间切换。 电阻开关部分可至少部分地包括氧化硅。 所述方法还可以包括形成第三层，其中第三层可操作为顶部电极。

公开(公告)号：US20150056749A1

公开(公告)日：2015-02-26

申请号：US14506298

申请日：2014-10-03

Applicant: Intermolecular Inc. ,  Kabushiki Kaisha Toshiba ,  SanDisk 3D LLC

Inventor： Yun Wang ,  Tony P. Chiang ,  Vidyut Gopal ,  Imran Hashim ,  Dipankar Pramanik

IPC: H01L45/00 ,  H01L21/02

CPC classification number: H01L45/145 ,  C23C16/40 ,  C23C16/45525 ,  H01L21/02175 ,  H01L21/02178 ,  H01L21/02181 ,  H01L21/02186 ,  H01L21/02189 ,  H01L21/02192 ,  H01L21/02194 ,  H01L21/022 ,  H01L21/0228 ,  H01L27/2463 ,  H01L45/08 ,  H01L45/1266 ,  H01L45/146 ,  H01L45/1608 ,  H01L45/1616

Abstract: Embodiments of the invention generally relate to nonvolatile memory devices, such as a ReRAM cells, and methods for manufacturing such memory devices, which includes optimized, atomic layer deposition (ALD) processes for forming metal oxide film stacks. The metal oxide film stacks contain a metal oxide coupling layer disposed on a metal oxide host layer, each layer having different grain structures/sizes. The interface disposed between the metal oxide layers facilitates oxygen vacancy movement. In many examples, the interface is a misaligned grain interface containing numerous grain boundaries extending parallel to the electrode interfaces, in contrast to the grains in the bulk film extending perpendicular to the electrode interfaces. As a result, oxygen vacancies are trapped and released during switching without significant loss of vacancies. Therefore, the metal oxide film stacks have improved switching performance and reliability during memory cell applications compared to traditional hafnium oxide based stacks of previous memory cells.

Abstract translation: 本发明的实施例一般涉及非易失性存储器件，例如ReRAM单元，以及用于制造这种存储器件的方法，其包括用于形成金属氧化物膜堆叠的优化的原子层沉积（ALD）工艺。 金属氧化物膜堆叠包含设置在金属氧化物主体层上的金属氧化物耦合层，每个层具有不同的晶粒结构/尺寸。 设置在金属氧化物层之间的界面有助于氧空位移动。 在许多示例中，与垂直于电极界面延伸的体膜中的晶粒相反，界面是不对齐的晶粒界面，其包含平行于电极界面延伸的许多晶界。 因此，氧空缺在切换期间被捕获和释放，而空位明显损失。 因此，与以前的存储单元的传统的基于氧化铪的堆叠相比，金属氧化物膜堆叠在存储单元应用中具有改进的开关性能和可靠性。

公开(公告)号：US08963117B2

公开(公告)日：2015-02-24

申请号：US14018719

申请日：2013-09-05

Applicant: Intermolecular Inc.

Inventor： Pragati Kumar ,  Tony P. Chiang ,  Prashant B Phatak ,  Yun Wang

IPC: H01L47/00 ,  H01L45/00 ,  G11C13/00 ,  H01L27/24

CPC classification number: H01L45/146 ,  G11C13/0002 ,  G11C2013/0083 ,  G11C2213/51 ,  H01L27/2409 ,  H01L27/2463 ,  H01L45/08 ,  H01L45/10 ,  H01L45/1233 ,  H01L45/1253 ,  H01L45/1625 ,  H01L45/1641

Abstract: This disclosure provides a nonvolatile memory device and related methods of manufacture and operation. The device may include one or more resistive random access memory (ReRAM) approaches to provide a memory device with more predictable operation. In particular, the forming voltage required by particular designs may be reduced through the use of a barrier layer, a reverse polarity forming voltage pulse, a forming voltage pulse where electrons are injected from a lower work function electrode, or an anneal in a reducing environment. One or more of these techniques may be applied, depending on the desired application and results.

公开(公告)号：US08872152B2

公开(公告)日：2014-10-28

申请号：US13714106

申请日：2012-12-13

Applicant: Intermolecular Inc. ,  Kabushiki Kaisha Toshiba ,  SanDisk 3D LLC

Inventor： Federico Nardi ,  Yun Wang

IPC: H01L47/00 ,  H01L45/00

CPC classification number: H01L45/146 ,  H01L27/2409 ,  H01L27/2463 ,  H01L45/08 ,  H01L45/10 ,  H01L45/1233 ,  H01L45/1253 ,  H01L45/16 ,  H01L45/1608

Abstract: A nonvolatile memory device that contains a resistive switching memory element with improved device switching performance and lifetime, and methods of forming the same. A nonvolatile memory element includes a first electrode layer formed on a substrate, a resistive switching layer formed on the first electrode layer, and a second electrode layer. The resistive switching layer comprises a metal oxide and is disposed between the first electrode layer and the second electrode layer. The elemental metal selected for each of the first and second electrode layers is the same metal as selected to form the metal oxide resistive switching layer. The use of common metal materials within the memory element eliminates the growth of unwanted and incompatible native oxide interfacial layers that create undesirable circuit impedance.

Abstract translation: 一种非易失性存储器件，其包含具有改进的器件切换性能和寿命的电阻式开关存储元件及其形成方法。 非易失性存储元件包括形成在基板上的第一电极层，形成在第一电极层上的电阻开关层和第二电极层。 电阻开关层包括金属氧化物，并且设置在第一电极层和第二电极层之间。 为第一和第二电极层中的每一个选择的元素金属与所选择的金属相同，以形成金属氧化物电阻式开关层。 在记忆元件内部使用普通金属材料消除了不希望的和不相容的天然氧化物界面层的生长，产生不希望的电路阻抗。

公开(公告)号：US20140192586A1

公开(公告)日：2014-07-10

申请号：US13738524

申请日：2013-01-10

Applicant: INTERMOLECULAR INC. ,  KABUSHIKI KAISHA TOSHIBA ,  SANDISK 3D LLC

Inventor： Federico Nardi ,  Yun Wang

IPC: G11C13/00 ,  H01L45/00

CPC classification number: G11C13/0007 ,  G11C13/0069 ,  G11C2013/0083 ,  G11C2213/12 ,  G11C2213/15 ,  G11C2213/52 ,  G11C2213/71 ,  H01L27/2463 ,  H01L27/2481 ,  H01L45/06 ,  H01L45/08 ,  H01L45/085 ,  H01L45/1233 ,  H01L45/145 ,  H01L45/146 ,  H01L45/147 ,  H01L45/149

Abstract: Provided are resistive random access memory (ReRAM) cells forming arrays and methods of operating such cells and arrays. The ReRAM cells of the same array may have the same structure, such as have the same bottom electrodes, top electrodes, and resistive switching layers. Yet, these cells may be operated in a different manner. For example, some ReRAM cells may be restively switched using lower switching voltages than other cells. The cells may also have different data retention characteristics. These differences may be achieved by using different forming operations for different cells or, more specifically, flowing forming currents in different directions for different cells. The resulting conductive paths formed within the resistive switching layers are believed to switch at or near different electrode interfaces, i.e., within a so called switching zone. In some embodiments, a switching zone of a ReRAM cell may be changed even after the initial formation.

Abstract translation: 提供形成阵列的电阻随机存取存储器（ReRAM）单元和操作这样的单元和阵列的方法。 相同阵列的ReRAM单元可以具有相同的结构，例如具有相同的底部电极，顶部电极和电阻式开关层。 然而，这些电池可以以不同的方式操作。 例如，可以使用比其他单元更低的开关电压来重新切换一些ReRAM单元。 细胞也可能具有不同的数据保留特征。 这些差异可以通过对于不同的单元使用不同的成形操作来实现，或者更具体地，针对不同的单元流动形成不同方向的电流。 形成在电阻开关层内的所得导电路径被认为在不同的电极接口处，即在所谓的开关区域内或附近切换。 在一些实施例中，即使在初始形成之后，ReRAM单元的切换区也可能改变。

公开(公告)号：US20140175363A1

公开(公告)日：2014-06-26

申请号：US13721476

申请日：2012-12-20

Applicant: INTERMOLECULAR INC. ,  KABUSHIKI KAISHA TOSHIBA ,  SANDISK 3D LLC

Inventor： Mihir Tendulkar ,  Tim Minvielle ,  Yun Wang ,  Takeshi Yamaguchi

IPC: H01L45/00

CPC classification number: H01L45/08 ,  H01L27/2463 ,  H01L45/1266 ,  H01L45/146 ,  H01L45/1633

Abstract: Provided are methods of forming nonvolatile memory elements including resistance switching layers. A method involves diffusing oxygen from a precursor layer to one or more reactive electrodes by annealing. At least one electrode in a memory element is reactive, while another may be inert. The precursor layer is converted into a resistance switching layer as a result of this diffusion. The precursor layer may initially include a stoichiometric oxide that generally does not exhibit resistance switching characteristics until oxygen vacancies are created. Metals forming such oxides may be more electronegative than metals forming a reactive electrode. The reactive electrode may have substantially no oxygen at least prior to annealing. Annealing may be performed at 250-400° C. in the presence of hydrogen. These methods simplify process control and may be used to form nonvolatile memory elements including resistance switching layers less than 20 Angstroms thick.

Abstract translation: 提供了形成包括电阻切换层的非易失性存储元件的方法。 一种方法包括通过退火将氧从前体层扩散到一个或多个反应电极。 存储元件中的至少一个电极是反应性的，而另一个电极可能是惰性的。 作为该扩散的结果，前体层被转换成电阻切换层。 前体层可以最初包括化学计量的氧化物，其通常在氧空位产生之前不表现出电阻转换特性。 形成这种氧化物的金属可能比形成反应性电极的金属更具电负性。 至少在退火之前，反应电极可以基本上不含氧。 在氢气存在下，可以在250-400℃下进行退火。 这些方法简化了过程控制，并且可以用于形成包括小于20埃厚的电阻开关层的非易失性存储元件。

公开(公告)号：US20140175361A1

公开(公告)日：2014-06-26

申请号：US13721406

申请日：2012-12-20

Applicant: Intermolecular Inc. ,  SanDisk 3D LLC ,  Kabushiki Kaisha Toshiba

Inventor： Chien-Lan Hsueh ,  Randall J. Higuchi ,  Tim Minvielle ,  Jinhong Tong ,  Yun Wang ,  Takeshi Yamaguchi

IPC: H01L45/00

CPC classification number: H01L45/08 ,  H01L27/2463 ,  H01L45/1233 ,  H01L45/145 ,  H01L45/146 ,  H01L45/1616

Abstract: Provided are resistive random access memory (ReRAM) cells having switching layers that include hafnium, aluminum, oxygen, and nitrogen. The composition of such layers is designed to achieve desirable performance characteristics, such as low current leakage as well as low and consistent switching currents. In some embodiments, the concentration of nitrogen in a switching layer is between about 1 and 20 atomic percent or, more specifically, between about 2 and 5 atomic percent. Addition of nitrogen helps to control concentration and distribution of defects in the switching layer. Also, nitrogen as well as a combination of two metals helps with maintaining this layer in an amorphous state. Excessive amounts of nitrogen reduce defects in the layer such that switching characteristics may be completely lost. The switching layer may be deposited using various techniques, such as sputtering or atomic layer deposition (ALD).

Abstract translation: 提供了具有包括铪，铝，氧和氮的开关层的电阻随机存取存储器（ReRAM）单元。 这些层的组成被设计成实现期望的性能特性，例如低电流泄漏以及低和一致的开关电流。 在一些实施方案中，开关层中氮的浓度在约1至20原子百分比之间，或更具体地在约2至5原子百分比之间。 添加氮有助于控制开关层缺陷的浓度和分布。 此外，氮气以及两种金属的组合有助于将该层保持在非晶状态。 过量的氮减少了层中的缺陷，使得开关特性可能完全丧失。 可以使用诸如溅射或原子层沉积（ALD）的各种技术来沉积切换层。