公开(公告)号：US20230386970A1

公开(公告)日：2023-11-30

申请号：US17827006

申请日：2022-05-27

Applicant: Micron Technology, Inc.

Inventor： Kunal R. Parekh ,  Angela S. Parekh

IPC: H01L23/48 ,  H01L21/768 ,  H01L49/02

CPC classification number: H01L23/481 ,  H01L21/76898 ,  H01L28/40

Abstract: Semiconductor devices having nano through substrate vias (TSVs), and related systems and methods, are disclosed herein. In some embodiments, the semiconductor device includes a semiconductor substrate that has a first surface and a second surface opposite the first surface. A trench is formed in the first surface and filled with a dielectric material and a TSV extends from the first surface to the second surface within the footprint of the trench. In some embodiments, the TSV includes a conductive material that includes a first portion and a second portion. The first portion includes a first end at the first surfacer and a second end with a larger cross-sectional area than the first end. Similarly, the second portion includes a third end coupled to the second end and a fourth end at the second surface with a larger cross-sectional area than the third end.

公开(公告)号：US11825658B2

公开(公告)日：2023-11-21

申请号：US17000809

申请日：2020-08-24

Applicant: Micron Technology, Inc.

Inventor： Kunal R. Parekh

IPC: H10B43/40 ,  H10B41/27 ,  H10B41/35 ,  H10B41/41 ,  H10B43/27 ,  H10B43/35 ,  H01L23/00 ,  H01L23/532 ,  H01L23/522

CPC classification number: H10B43/40 ,  H01L23/5226 ,  H01L23/53228 ,  H01L24/05 ,  H10B41/27 ,  H10B41/35 ,  H10B41/41 ,  H10B43/27 ,  H10B43/35 ,  H01L2224/05025 ,  H01L2224/05124

Abstract: A method of forming a microelectronic device comprises forming a microelectronic device structure. The microelectronic device structure comprises a semiconductive base structure, and a memory array region vertically overlying the semiconductive base structure and comprising memory cells. The microelectronic device structure is attached to a base structure. A portion of the semiconductive base structure is removed after attaching the microelectronic device structure to a base structure. A control logic region is formed vertically over a remaining portion of the semiconductive base structure. The control logic region comprises control logic devices in electrical communication with the memory cells of the memory array region. Microelectronic devices, memory devices, electronic systems, and additional methods are also described.

公开(公告)号：US11785764B2

公开(公告)日：2023-10-10

申请号：US17364281

申请日：2021-06-30

Applicant: Micron Technology, Inc.

Inventor： Fatma Arzum Simsek-Ege ,  Kunal R. Parekh ,  Terrence B. McDaniel ,  Beau D. Barry

IPC: H10B12/00

CPC classification number: H10B12/485 ,  H10B12/0335 ,  H10B12/315 ,  H10B12/482 ,  H10B12/488 ,  H10B12/50

Abstract: A method of forming a microelectronic device comprises forming a first microelectronic device structure comprising a first semiconductor structure, a first isolation material over the first semiconductor structure, and first conductive routing structures over the first semiconductor structure and surrounded by the first isolation material. A second microelectronic device structure comprising a second semiconductor structure and a second isolation material over the second semiconductor structure is formed. The second isolation material is bonded to the first isolation material to attach the second microelectronic device structure to the first microelectronic device structure. Memory cells comprising portions of the second semiconductor structure are formed after attaching the second microelectronic device structure to the first microelectronic device structure. Control logic devices including transistors comprising portions of the first semiconductor structure are formed after forming the memory cells. Microelectronic devices, electronic systems, and additional methods are also described.

公开(公告)号：US11770932B2

公开(公告)日：2023-09-26

申请号：US18045417

申请日：2022-10-10

Applicant: Micron Technology, Inc.

Inventor： Haitao Liu ,  Kunal R. Parekh

IPC: H01L21/00 ,  H10B43/27 ,  H01L29/47 ,  H01L21/285 ,  H10B41/27 ,  H10B41/41 ,  H10B43/40

CPC classification number: H10B43/27 ,  H01L21/28537 ,  H01L29/47 ,  H10B41/27 ,  H10B41/41 ,  H10B43/40

Abstract: A microelectronic device comprises a stack structure, cell pillar structures, an active body structure, digit line structures, and control logic devices. The stack structure comprises vertically neighboring tiers, each of the vertically neighboring tiers comprising a conductive structure and an insulative structure vertically neighboring the conductive structure. The cell pillar structures vertically extend through the stack structure and each comprise a channel material and an outer material stack horizontally interposed between the channel material and the stack structure. The active body structure vertically overlies the stack structure and is in contact with the channel material of the cell pillar structures. The active body structure comprises a metal material having a work function greater than or equal to about 4.7 electronvolts. The digit line structures vertically underlie the stack structure and are coupled to the cell pillar structures. Memory devices, electronic systems, and methods of forming a microelectronic device are also described.

公开(公告)号：US11705367B2

公开(公告)日：2023-07-18

申请号：US16905452

申请日：2020-06-18

Applicant: Micron Technology, Inc.

Inventor： Kunal R. Parekh

IPC: H01L21/768 ,  H01L23/522 ,  H01L23/532 ,  H10B41/27 ,  H10B43/27

CPC classification number: H01L21/76877 ,  H01L21/76802 ,  H01L23/5226 ,  H01L23/53214 ,  H01L23/53228 ,  H10B41/27 ,  H10B43/27

Abstract: A method of forming a microelectronic device comprises forming line structures comprising conductive material and insulative material overlying the conductive material, the line structures separated from one another by trenches. An isolation material is formed on surfaces of the line structures inside and outside of the trenches, the isolation material only partially filling the trenches to form air gaps interposed between the line structures. Openings are formed to extend through the isolation material and expose portions of the insulative material of the line structures. The exposed portions of the insulative material of the line structures are removed to form extended openings extending to the conductive material of the line structures. Conductive contact structures are formed within the extended openings. Conductive pad structures are formed on the conductive contact structures. Additional methods, microelectronic devices, memory devices, and electronic systems are also described.

公开(公告)号：US20230207454A1

公开(公告)日：2023-06-29

申请号：US18175398

申请日：2023-02-27

Applicant: Micron Technology, Inc.

Inventor： Kunal R. Parekh

IPC: H01L23/522 ,  G11C7/18 ,  H01L23/00 ,  H01L23/528 ,  H01L25/18 ,  H10B41/27 ,  H10B41/35

CPC classification number: H01L23/5226 ,  G11C7/18 ,  H01L23/5283 ,  H01L24/05 ,  H01L25/18 ,  H10B41/27 ,  H10B41/35 ,  H01L2924/1431 ,  H01L2924/1443

Abstract: A method of forming a microelectronic device comprises forming a microelectronic device structure comprising a base structure, a doped semiconductive material overlying the base structure, a stack structure overlying the doped semiconductive material, cell pillar structures vertically extending through the stack structure and the doped semiconductive material and into the base structure, and digit line structures vertically overlying the stack structure. An additional microelectronic device structure comprising control logic devices is formed. The microelectronic device structure is attached to the additional microelectronic device structure to form a microelectronic device structure assembly. The base structure and portions of the cell pillar structures vertically extending into the base structure to are removed to expose the doped semiconductive material. The doped semiconductive material is then patterned to form at least one source structure over the stack structure and coupled to the cell pillar structures. Microelectronic devices and electronic systems are also described.

公开(公告)号：US20230139278A1

公开(公告)日：2023-05-04

申请号：US17719158

申请日：2022-04-12

Applicant: Micron Technology, Inc.

Inventor： Kunal R. Parekh

IPC: H01L21/66 ,  H01L23/31 ,  H01L23/48 ,  H01L23/528

Abstract: A semiconductor device assembly includes a first semiconductor device having front and rear surfaces, a plurality of front-side pads disposed over the front surface at a first distance from the rear surface, and a plurality of additional device pads disposed over the front surface at a second distance from the rear surface greater than the first distance; a second semiconductor device in contact with a top side of each of the additional device pads; an encapsulant material at least partially surrounding the second semiconductor device and covering a top side of the front-side pads; a first plurality of TSVs, each extending from the rear surface through the first semiconductor device to a bottom side of one of the front-side pads; and a second plurality of TSVs, each extending from the rear surface through the first semiconductor device to a bottom side of ding one of the additional device pads.

公开(公告)号：US20230110367A1

公开(公告)日：2023-04-13

申请号：US17500773

申请日：2021-10-13

Applicant: Micron Technology, Inc.

Inventor： Kunal R. Parekh ,  Angela S. Parekh

IPC: H01L27/11556 ,  H01L27/11582 ,  G11C5/06 ,  H01L21/768 ,  H01L29/78

Abstract: A method of forming a microelectronic device comprises forming a first microelectronic device structure comprising a preliminary stack structure comprising sacrificial structures and insulative structures vertically alternating with the sacrificial structures. A second microelectronic device structure comprising control logic circuitry is formed. The first microelectronic device structure is attached to the second microelectronic device structure to form an assembly. After forming the assembly, the sacrificial structures are at least partially replaced with conductive structures to form a stack structure. Contact structures are formed to extend through the stack structure. One or more of the contact structures are coupled to the control logic circuitry. Conductive line structures are formed over the stack structure. One or more of the conductive line structures are coupled to the one or more of the contact structures. Microelectronic devices, memory devices, and electronic systems are also described.

公开(公告)号：US20230005902A1

公开(公告)日：2023-01-05

申请号：US17364377

申请日：2021-06-30

Applicant: Micron Technology, Inc.

Inventor： Fatma Arzum Simsek-Ege ,  Kunal R. Parekh

IPC: H01L25/18 ,  H01L27/108 ,  H01L25/00 ,  H01L23/00

Abstract: A method of forming a microelectronic device comprises forming a microelectronic device structure assembly comprising memory cells, digit lines coupled to the memory cells, word lines coupled to the memory cells, and isolation material overlying the memory cells, the digit lines, and the word lines. An additional microelectronic device structure assembly comprising control logic devices and additional isolation material overlying the control logic devices is formed. The additional isolation material of the additional microelectronic device structure assembly is bonded to the isolation material of the microelectronic device structure assembly to attach the additional microelectronic device structure assembly to the microelectronic device structure assembly. The memory cells are electrically connected to at least some of the control logic devices after bonding the additional isolation material to the isolation material. Microelectronic devices, electronic systems, and additional methods are also described.

公开(公告)号：US20230005854A1

公开(公告)日：2023-01-05

申请号：US17364335

申请日：2021-06-30

Applicant: Micron Technology, Inc.

Inventor： Fatma Arzum Simsek-Ege ,  Kunal R. Parekh ,  Beau D. Barry

IPC: H01L23/00 ,  H01L25/065 ,  H01L25/18 ,  H01L25/00 ,  G11C11/408 ,  G11C11/4091

Abstract: A method of forming a microelectronic device comprises forming a first microelectronic device structure comprising a first semiconductor structure, control logic circuitry including transistors at least partially overlying the first semiconductor structure, and a first isolation material covering the first semiconductor structure and the control logic circuitry. A second microelectronic device structure comprising a second semiconductor structure and a second isolation material over the second semiconductor structure is formed. The second isolation material of the second microelectronic device structure is bonded to the first isolation material of the first microelectronic device structure to attach the second microelectronic device structure to the first microelectronic device structure. Memory cells comprising portions of the second semiconductor structure are formed after attaching the second microelectronic device structure to the first microelectronic device structure. Microelectronic devices, electronic systems, and additional methods are also described.