公开(公告)号：US5252848A

公开(公告)日：1993-10-12

申请号：US829190

申请日：1992-02-03

申请人： Steven J. Adler ,  Robert B. Davies ,  Stephen J. Nugent ,  Hassan Pirastehfar

发明人： Steven J. Adler ,  Robert B. Davies ,  Stephen J. Nugent ,  Hassan Pirastehfar

IPC分类号： H01L29/06 ,  H01L29/10 ,  H01L29/40 ,  H01L29/417 ,  H01L29/78

CPC分类号： H01L29/402 ,  H01L29/1045 ,  H01L29/1087 ,  H01L29/4175 ,  H01L29/41775 ,  H01L29/7813 ,  H01L29/7835

摘要： A performance enhancing conductor (27) is employed to reduce a transistor's (10) on resistance and to also reduce the transistor's (10) parasitic gate to drain capacitance (32). The performance enhancing conductor (27) covers the transistor's (10) gate (22) and a portion of the drain region (18, 19) that is adjacent the transistor's channel (20). The performance enhancing conductor (27) is isolated from the gate (22) by an insulator (24, 26).

摘要翻译： 使用性能增强导体（27）来减小晶体管（10）导通电阻并且还将晶体管（10）的寄生栅极减小到漏极电容（32）。 性能增强导体（27）覆盖晶体管（10）栅极（22）和与晶体管通道（20）相邻的漏极区域（18,19）的一部分。 性能增强导体（27）通过绝缘体（24,26）与栅极（22）隔离。

公开(公告)号：US5103148A

公开(公告)日：1992-04-07

申请号：US609540

申请日：1990-11-06

申请人： Kenneth A. Berringer ,  Robert B. Davies

发明人： Kenneth A. Berringer ,  Robert B. Davies

IPC分类号： H03K17/04 ,  H03K17/06

CPC分类号： H03K17/0406 ,  H03K17/063 ,  Y10S388/903

摘要： A low voltage circuit is used to control a high voltage transistor which operates a high voltage motor. A blocking diode and a bootstrap capacitor are used to shift the voltage of the circuit between two levels. The circuit is enabled by inducing a current flow through an input terminal. The current is amplified and applied to a high voltage transistor. The circuit is disabled by termination of the current flow through the input terminal which causes the circuit to rapidly disable current flow through the high voltage transistor. The circuit also disables current flow through the high voltage transistor during voltage transients to prevent erroneous operation during the transients.

摘要翻译： 低压电路用于控制高压电动机的高压晶体管。 阻塞二极管和自举电容用于在两个电平之间移动电路的电压。 通过引入电流通过输入端子来启用电路。 电流被放大并施加到高电压晶体管。 通过终止通过输入端的电流来使电路无效，这导致电路快速禁止通过高压晶体管的电流。 该电路还在电压瞬变期间禁止通过高压晶体管的电流流动，以防止在瞬变期间的错误操作。

公开(公告)号：US5006736A

公开(公告)日：1991-04-09

申请号：US365403

申请日：1989-06-13

申请人： Robert B. Davies

发明人： Robert B. Davies

IPC分类号： H03K17/04 ,  H03K17/0412 ,  H03K17/0812 ,  H03K17/567 ,  H03K17/687

CPC分类号： H03K17/04123 ,  H03K17/08122 ,  H03K17/6877 ,  H03K2217/0063

摘要： A single 3-terminal integrated circuit for controlling a switching device provides both control terminal voltage limitation and rapid turn off time. In an alternative embodiment the control circuit is contained in the same package which houses the controlled switching device.

公开(公告)号：US4960723A

公开(公告)日：1990-10-02

申请号：US330850

申请日：1989-03-30

申请人： Robert B. Davies

发明人： Robert B. Davies

IPC分类号： H01L21/225 ,  H01L21/336 ,  H01L21/60 ,  H01L29/78

CPC分类号： H01L29/7802 ,  H01L21/76897 ,  H01L29/6656 ,  H01L29/66696 ,  H01L21/2255 ,  H01L29/41766 ,  Y10S148/043 ,  Y10S148/103 ,  Y10S148/126 ,  Y10S148/147 ,  Y10S257/90

摘要： An improved method for making a self-aligned vertical field effect transistor is provided wherein a nitride sidewall spacer is formed around a polysilicon gate, and an oxide sidewall spacer, which may be heavily doped with an n-type dopant, is formed covering the silicon nitride sidewall spacer. The silicon nitride sidewall spacer allows the oxide sidewall spacer of a conventional self-aligned vertical field effect transistor process to be removed partially or completely before making ohmic contact to the source thus increasing the contact area between the source and the source electrode and eliminating reliability problems related to n-type doped oxide in contact with aluminum electrodes.

摘要翻译： 提供一种用于制造自对准垂直场效应晶体管的改进方法，其中在多晶硅栅极周围形成氮化物侧壁间隔物，并且形成可以重掺杂n型掺杂剂的氧化物侧壁间隔物，覆盖硅 氮化物侧壁间隔物。 氮化硅侧壁间隔物允许在对源极进行欧姆接触之前部分或完全去除常规自对准垂直场效应晶体管工艺的氧化物侧壁间隔物，从而增加源极和源极之间的接触面积并消除可靠性问题 涉及与铝电极接触的n型掺杂氧化物。

公开(公告)号：US4871686A

公开(公告)日：1989-10-03

申请号：US173795

申请日：1988-03-28

申请人： Robert B. Davies

发明人： Robert B. Davies

IPC分类号： H01L29/73 ,  H01L21/329 ,  H01L21/331 ,  H01L21/8222 ,  H01L21/8249 ,  H01L27/06 ,  H01L27/07 ,  H01L29/47 ,  H01L29/732 ,  H01L29/872 ,  H03K5/02 ,  H03K17/06

CPC分类号： H01L29/66212 ,  H01L21/8222 ,  H01L21/8249 ,  H01L27/0766 ,  H01L29/872 ,  H03K17/06 ,  H03K17/063

摘要： An improved means and method is described for forming a Schottky diode integrated with transistors and other devices which is particularly useful where both control circuits and a large power device are on the same chip.Nested N-, P-, N- and P+ regions are formed on an N+ semiconductor substrate. A portion of the overlying dielectric is removed adjacent one of the P+ regions over the N- region and a Schottky contact formed to the N- region and an ohmic contact to the adjacent P+ region. N+ and P+ regions are desirably provided where the junctions between the N-/P- regions and the P-/N- regions intersect the surface to provide contact to the N- and P- regions respectively.A P region extends through the upper N- region and has U-shaped arms which partially overlie an annular shaped P+ region and is located between the active region of the PNP transistor and the collector contact to serve as a Kelvin probe. The arrangement is particularly valuable where a vertical PNP device without a buried collector region is required.

公开(公告)号：US4513306A

公开(公告)日：1985-04-23

申请号：US453438

申请日：1982-12-27

申请人： Robert B. Davies

发明人： Robert B. Davies

IPC分类号： H01L29/08 ,  H01L29/417 ,  H01L29/72

CPC分类号： H01L29/0813 ,  H01L29/41708

摘要： A current ratioing device structure wherein a line of equally spaced emitter regions is parallel to another line of equally spaced base contact portions all within a base region. All of the emitter regions except the first and last emitter region in the line have contact portions so that the first and last emitter regions are "dummy" emitters.

摘要翻译： 电流比率器件结构，其中等距离的发射极区域的线平行于基本区域内的等间隔的基极接触部分的另一条线。 除了线中的第一和最后一个发射极区域之外的所有发射极区域都具有接触部分，使得第一和最后的发射极区域是“虚拟”发射极。

公开(公告)号：US4485319A

公开(公告)日：1984-11-27

申请号：US352989

申请日：1982-02-26

申请人： Robert B. Davies ,  Robert N. Dotson ,  Ira Miller

发明人： Robert B. Davies ,  Robert N. Dotson ,  Ira Miller

IPC分类号： G11C11/14 ,  G11C7/06 ,  G11C19/08 ,  H03K5/02 ,  H03K5/24 ,  H03K5/159 ,  H03K17/00

CPC分类号： G11C19/0866 ,  G11C7/06 ,  H03K5/02 ,  H03K5/24

摘要： A sense amplifier which is fully integrated has an on-chip voltage regulator to provide essentially error free operation. The sense amplifier provides peak-to-peak signal detection for comparison to a threshold voltage by a comparator. The output of the comparator is coupled to an RS flip-flop. The output of the RS flip-flop is coupled to a D flip-flop. The use of an RS flip-flop as well as a D flip-flop eliminates clocking problems caused by skewing and keeps a stored detected signal from changing prematurely.

摘要翻译： 完全集成的读出放大器具有片上稳压器，可实质提供无差错的操作。 读出放大器提供峰 - 峰信号检测，以便通过比较器与阈值电压进行比较。 比较器的输出耦合到RS触发器。 RS触发器的输出耦合到D触发器。 使用RS触发器和D触发器可以消除由偏移引起的时钟问题，并保持存储的检测信号过早变化。

公开(公告)号：US4476429A

公开(公告)日：1984-10-09

申请号：US412070

申请日：1982-08-27

申请人： Ira Miller ,  Robert N. Dotson ,  Robert B. Davies

发明人： Ira Miller ,  Robert N. Dotson ,  Robert B. Davies

IPC分类号： G11C19/08 ,  H03K5/08 ,  H03K17/64 ,  G05F5/00

CPC分类号： G11C19/0858 ,  G11C19/085 ,  H03K17/64 ,  H03K5/08

摘要： A circuit for providing the gate of a bubble memory with a precision current pulse at a high voltage is manufactured using a low voltage process; i.e. BV.sub.ceo is approximately 18 volts. In order to accomplish this, first and second voltage level shifting stages are cascoded and the output transistors thereof are used as Zener level shifters each level shifting downward by a BV.sub.ceo when only a small voltage is dropped across the load. If the voltage drop across the load increases, the cascoded output transistors may enter their active region and are prevented from going into saturation by saturation clamps so as to not introduce unwanted delays in the rise or fall times of the current pulse.

摘要翻译： 使用低电压工艺制造用于以高电压提供具有精密电流脉冲的气泡存储器的栅极的电路; 即BVceo约为18伏特。 为了实现这一点，第一和第二电压电平移位级被级联，并且其输出晶体管被用作齐纳电平移位器，当只有小的电压在负载上下降时，每个电平向下移位BVceo。 如果跨越负载的电压降增加，则级联输出晶体管可能进入其有源区，并且通过饱和钳位阻止其进入饱和，从而不会在电流脉冲的上升或下降时间引入不必要的延迟。

公开(公告)号：US07905041B1

公开(公告)日：2011-03-15

申请号：US11864966

申请日：2007-09-29

申请人： Robert B. Davies

发明人： Robert B. Davies

IPC分类号： F41A21/48

CPC分类号： F41C23/16 ,  F41A3/66 ,  F41A21/48 ,  F41A21/482 ,  F41A21/484

摘要： A firearm includes a support block having a forward end and a rearward end, and carrying a receiver on a top surface thereof. A rearward barrel guide having a thrust coupling extending radially outwardly therefrom, the thrust coupling engaging an engagement element located at the forward end of the support block, thereby aligning the rearward barrel guide with the support block. Also provided is a barrel having a breech end and a muzzle end, the breech end is received through the rearward barrel guide and coupled to the receiver. A forward barrel guide is fixed to the barrel intermediate the muzzle end and the breech end. A handguard assembly is received over the barrel and coupled to the rearward barrel guide and the forward barrel guide, stabilizing the barrel.

摘要翻译： 枪支包括具有前端和后端的支撑块，并且在其顶表面上承载接收器。 具有从其向外径向向外延伸的推力联接器的后筒引导件，推力联接器接合位于支撑块的前端处的接合元件，从而使后筒引导件与支撑块对准。 还提供了具有后膛端和枪口端的镜筒，后枪端通过后筒引导器被接收并且被耦合到接收器。 前端枪管导向器固定在枪口端和后膛末端之间的枪管上。 扶手组件被容纳在筒体上并且联接到后筒引导件和前筒引导件，从而稳定枪管。

公开(公告)号：US07821063B2

公开(公告)日：2010-10-26

申请号：US12131295

申请日：2008-06-02

申请人： Gary H. Loechelt ,  Robert B. Davies ,  David H. Lutz

发明人： Gary H. Loechelt ,  Robert B. Davies ,  David H. Lutz

IPC分类号： H01L29/76

CPC分类号： H01L29/7802 ,  H01L21/26586 ,  H01L21/2815 ,  H01L29/0878 ,  H01L29/402 ,  H01L29/42368 ,  H01L29/42376 ,  H01L29/66719 ,  H01L29/66727

摘要： In one embodiment, a semiconductor device is formed in a body of semiconductor material. The semiconductor device includes a localized region of doping near a portion of a channel region where current exits during operation.

摘要翻译： 在一个实施例中，半导体器件形成在半导体材料体中。 半导体器件包括在操作期间电流离开的沟道区域的一部分附近的局部化掺杂区域。