公开(公告)号：US20050020781A1

公开(公告)日：2005-01-27

申请号：US10785978

申请日：2004-02-26

申请人： Masatoshi Sugimasa ,  Akira Nagai ,  Shinji Yamada ,  Satoru Amou

发明人： Masatoshi Sugimasa ,  Akira Nagai ,  Shinji Yamada ,  Satoru Amou

IPC分类号： B32B15/082 ,  B32B15/08 ,  C08F279/02 ,  C08F283/08 ,  C08F287/00 ,  C08L9/06 ,  C08L25/02 ,  C08L101/00 ,  H05K1/03 ,  C08F10/00

CPC分类号： C08F283/08 ,  C08F279/02 ,  C08F287/00 ,  H05K1/032 ,  H05K1/0353 ,  C08F212/34

摘要： There is provided a resin composition suitable for insulating materials for use in electronic parts for handling high frequency signals, low in dielectric constant and low in dielectric dissipation factor, capable of forming thin film by low temperature curing, excellent in the adhesiveness to conductive foil and excellent in flexibility; a cured product derived from the composition; and a film substrate and an electronic part using the composition. A resin composition, low in dielectric dissipation factor, comprising: a crosslinking component having a weight averaged molecular weight of 1,000 or less and a plurality of styrene groups represented by the following general formula: wherein R represents a hydrocarbon moiety; each R1, which may be the same or different, represents a hydrogen atom or a C1-20 hydrocarbon group; R2, R3 and R4, which may be the same or different, represent a hydrogen atom or a C1-6 alkyl group; and m is an integer of 1 to 4, and n is an integer of 2 or more; and a rubber component having a weight averaged molecular weight of 5,000 or more and styrene units; a cured product; and a film substrate and an electronic part using the composition.

摘要翻译： 提供一种适用于电子部件用绝缘材料的树脂组合物，用于处理高频信号，介电常数低，介电损耗因数低，能够通过低温固化形成薄膜，对导电箔的粘合性优异， 优良的灵活性; 衍生自组合物的固化产物; 以及使用该组合物的薄膜基板和电子部件。 一种低介电损耗因子的树脂组合物，其包含：重均分子量为1,000以下的交联组分和由以下通式表示的多个苯乙烯基团：其中R表示烃部分; 每个R 1可以相同或不同，表示氢原子或C1-20烃基; R 2，R 3和R 4可以相同或不同，表示氢原子或C 1-6烷基; m为1〜4的整数，n为2以上的整数。 和重均分子量为5000以上的橡胶成分和苯乙烯单元; 固化产品; 以及使用该组合物的薄膜基板和电子部件。

公开(公告)号：US06651023B2

公开(公告)日：2003-11-18

申请号：US09927367

申请日：2001-08-13

申请人： Hisaya Mori ,  Shinji Yamada ,  Teruhiko Funakura

发明人： Hisaya Mori ,  Shinji Yamada ,  Teruhiko Funakura

IPC分类号： G06F1300

CPC分类号： G01R31/31919 ,  G01R31/3167 ,  G01R31/31935

摘要： A semiconductor test apparatus includes an analog-to-digital converter for converting into a digital signal an analog output from a circuit under test; a test-apparatus-ADC-control-signal generation circuit for generating a control signal for the analog-to-digital converter in accordance with an activation signal entered from the outside; a measured data memory for storing, as measured data for each conversion, a signal output from the analog-to-digital converter; an address counter for generating an address signal for the measured data memory; a DAC counter for generating data to be input to the circuit under test; and a data write control circuit which produces, in response to a flag signal output from the analog-to-digital converter and representing that conversion is being performed, an update signal for the address counter, a memory write signal for the measured data memory, and an update signal for the DAC counter.

公开(公告)号：US06634004B1

公开(公告)日：2003-10-14

申请号：US09706696

申请日：2000-11-07

申请人： Shinji Yamada ,  Hisaya Mori ,  Teruhiko Funakura

发明人： Shinji Yamada ,  Hisaya Mori ,  Teruhiko Funakura

IPC分类号： G11C2900

CPC分类号： G11C29/50004 ,  G11C16/04 ,  G11C16/34 ,  G11C29/50 ,  G11C2029/5604 ,  G11C2029/5606

摘要： In a threshold analysis method obtaining threshold voltages of all bits in a flash memory through single processing, fail bit map information is examined in order from a smaller voltage applied to the flash memory. As to a bit exhibiting a value, read from the flash memory, first mismatching a determination value, the threshold voltage is settled on the basis of a voltage applied when the bit fails in reading.

摘要翻译： 在通过单个处理获得闪存中的所有位的阈值电压的阈值分析方法中，从施加到闪速存储器的较小电压的顺序检查故障位图信息。 对于显示一个值的位，从闪速存储器中读出，首先使确定值不匹配，阈值电压基于读取位故障时施加的电压来确定。

公开(公告)号：US5460858A

公开(公告)日：1995-10-24

申请号：US183092

申请日：1994-01-18

申请人： Shinji Yamada ,  Masaharu Shirai

发明人： Shinji Yamada ,  Masaharu Shirai

IPC分类号： H01L21/312 ,  G03F7/16 ,  H05K3/28 ,  B05D3/02 ,  B05D3/04 ,  B05D3/06

CPC分类号： H05K3/28 ,  G03F7/168 ,  H05K2203/0759 ,  H05K2203/0783 ,  H05K2203/1105

摘要： A method for forming a wrinkle-free insulating layer from a resin having both photo-curing and thermosetting properties by reducing the magnitude of a concentration gradient of residual solvent in the thickness direction of the resin layer after drying the resin layer and prior to photo-curing, developing and thermosetting the resin layer. In one embodiment, such reduction is achieved by passing a substrate bearing the resin layer by a roll coater charged with a solvent for the resin, and allowing solvent to be absorbed by the resin layer. The solvent application roll can be spaced from the resin layer by a small gap such that solvent vapor is applied to the resin layer. Alternatively, solvent in liquid form can be applied to the resin layer. In another embodiment, the concentration gradient of residual solvent in the resin layer is reduced by affixing a barrier film to the resin layer and then heating the resin layer.

摘要翻译： 通过在干燥树脂层之后和在光固化之前减小树脂层的厚度方向上的残留溶剂的浓度梯度的大小，从具有光固化性和热固性两者的树脂形成无皱绝缘层的方法， 固化，显影和热固化树脂层。 在一个实施方案中，通过使带有树脂层的基板通过装有用于树脂的溶剂的辊涂机，使溶剂被树脂层吸收来实现这种还原。 溶剂涂布辊可以与树脂层间隔很小的间隙，使得溶剂蒸气被施加到树脂层上。 或者，液体形式的溶剂可以施加到树脂层。 在另一个实施方案中，通过将阻挡膜粘附到树脂层上然后加热树脂层来降低树脂层中残留溶剂的浓度梯度。

公开(公告)号：US5249854A

公开(公告)日：1993-10-05

申请号：US997154

申请日：1992-12-15

申请人： Shinji Yamada

发明人： Shinji Yamada

IPC分类号： B60T8/34 ,  B60T8/42 ,  B60T8/50 ,  B60T13/14

CPC分类号： B60T8/5037 ,  B60T8/341 ,  B60T8/4291

摘要： A braking circuit provided with an antilocking apparatus, which prevents the pumping pulsation from transferring onto the master cylinder side during pumping operation time in a reflux system of antilocking apparatus of discharging the operating liquid into the reflux passage from the wheel brake at the antilocking time so as to reflux it onto the master cylinder side by a pump provided on the reflux passage, thereby to effectively restrain the undesired pulsation to be transferred onto the master cylinder side by the equalization of the discharge pressure through the absorption of the discharge pressure.

摘要翻译： 一种具有防抱死装置的制动电路，其在泵操作时间期间防止泵送脉动在主缸侧转移到在防抱死时间将工作液体从车轮制动器排放到回流通道中的防抱死装置的回流系统中，从而 通过设置在回流通道上的泵将其回流到主缸侧，从而通过吸收排出压力均衡排出压力，有效地抑制不期望的脉动转移到主缸侧。

公开(公告)号：US4612561A

公开(公告)日：1986-09-16

申请号：US508727

申请日：1983-06-27

申请人： Shin Kimura ,  Hiroshi Fukui ,  Shinji Yamada ,  Shuji Musha ,  Masayoshi Sato

发明人： Shin Kimura ,  Hiroshi Fukui ,  Shinji Yamada ,  Shuji Musha ,  Masayoshi Sato

IPC分类号： H01L25/11 ,  H01L25/10 ,  H01L25/18 ,  H02M1/06 ,  H02M1/08 ,  H03K17/12 ,  H03K17/72 ,  H03K17/73 ,  H01L29/74 ,  H03K17/60

CPC分类号： H02M1/08 ,  H03K17/125 ,  H03K17/72 ,  H01L2224/48091 ,  H01L2224/49113

摘要： A parallel connected gate turn-off thyristor device including an additional short circuiting conductor connected between the gate terminals of the respective gate turn-off thyristors so as to bypass a part of the turn-on and turn-off gate currents of one gate turn-off thyristor to other gate turn-off thyristors to increase the turn-on and turn-off gate currents of the other gate turn-off thyristors thereby hastening the turn-on and turn-off operations of the other gate turn-off thyristors.

摘要翻译： 一种并联的栅极截止晶闸管器件，包括连接在各个栅极截止晶闸管的栅极端子之间的附加的短路导体，以便绕过一个栅极截止晶闸管的导通和截止栅极电流的一部分， 关闭晶闸管到其他栅极截止晶闸管，以增加另一个栅极截止晶闸管的导通和关断栅极电流，从而加速其他栅极截止晶闸管的导通和关断操作。

公开(公告)号：US4371268A

公开(公告)日：1983-02-01

申请号：US219910

申请日：1980-12-24

申请人： Hiroshi Miyasaka ,  Shinji Yamada

发明人： Hiroshi Miyasaka ,  Shinji Yamada

IPC分类号： G04G5/02 ,  G04C19/00 ,  G04C9/00

CPC分类号： G04G5/022

摘要： A time correction circuit for a timepiece with an electrochromic display which includes a timing circuit having counters counting time standard clock signals and for generating time display output signals, a time display circuit having an electrochromic display section displaying output signals from said counters, a correction mode changeover switch selectively switching between a time display mode and a time correction mode, a correcting circuit which works only when said correction mode changeover switch selects the correction mode to change the count in the counters, a writing and erasing control circuit for controlling the timing of the writing and the erasing of the electrochromic display section in response to the mode selected by the correction mode changeover switch and a correction pulse generating circuit for outputting time correction writing pulses of smaller pulse width than time correction writing and erasing pulses during the time display mode when the correction mode changeover switch selects the time correction mode to enable fast correction of the electrochromic display.

摘要翻译： 一种具有电致变色显示器的钟表的时间校正电路，包括具有计数时间标准时钟信号的计数器和用于产生时间显示输出信号的定时电路，具有显示来自所述计数器的输出信号的电致变色显示部分的时间显示电路，校正模式 切换开关选择性地在时间显示模式和时间校正模式之间切换，仅当所述校正模式切换开关选择校正模式以改变计数器的计数时才起作用的校正电路，用于控制计时器的定时的写入和擦除控制电路 响应于由校正模式切换开关选择的模式的电致变色显示部的写入和擦除以及用于在时间显示模式期间输出比时间校正写入和擦除脉冲更小的脉冲宽度的时间校正写入脉冲的校正脉冲发生电路 当校正模式ch 安装开关选择时间校正模式，以实现电致变色显示的快速校正。

公开(公告)号：US08890194B2

公开(公告)日：2014-11-18

申请号：US13729457

申请日：2012-12-28

申请人： Toru Gotoda ,  Shinji Yamada ,  Shinya Nunoue

发明人： Toru Gotoda ,  Shinji Yamada ,  Shinya Nunoue

IPC分类号： H01L33/22 ,  H01L33/00 ,  H01L33/64 ,  H01L33/40 ,  H01L33/32

CPC分类号： H01L33/32 ,  H01L33/0079 ,  H01L33/40 ,  H01L33/641

摘要： According to one embodiment, a semiconductor light emitting device includes a metal substrate, a first semiconductor layer, a first semiconductor layer, a second semiconductor layer, a light emitting layer, a first intermediate layer and a second intermediate layer. The substrate has a coefficient of thermal expansion not more than 10×10−6 m/K. The first and second semiconductor layer include a nitride semiconductor. The second semiconductor layer is provided between the substrate and the first semiconductor layer. The emitting layer is provided between the first semiconductor layer and the second semiconductor layer. The first intermediate layer is provided between the substrate and the second semiconductor layer. The second intermediate layer is provided between the first intermediate layer and the second semiconductor layer. a surface roughness of a first surface of the substrate contacting the first intermediate layer is less than a thickness of the first intermediate layer.

摘要翻译： 根据一个实施例，半导体发光器件包括金属衬底，第一半导体层，第一半导体层，第二半导体层，发光层，第一中间层和第二中间层。 基板的热膨胀系数不大于10×10 -6 m / K。 第一和第二半导体层包括氮化物半导体。 第二半导体层设置在基板和第一半导体层之间。 发光层设置在第一半导体层和第二半导体层之间。 第一中间层设置在基板和第二半导体层之间。 第二中间层设置在第一中间层和第二半导体层之间。 与第一中间层接触的基板的第一表面的表面粗糙度小于第一中间层的厚度。

公开(公告)号：US20130328055A1

公开(公告)日：2013-12-12

申请号：US13724007

申请日：2012-12-21

申请人： Jumpei TAJIMA ,  Kotaro Zaima ,  Shigeya Kimura ,  Hiroshi Ono ,  Shinji Yamada ,  Satoshi Mitsugi ,  Naoharu Sugiyama ,  Shinya Nunoue

发明人： Jumpei TAJIMA ,  Kotaro Zaima ,  Shigeya Kimura ,  Hiroshi Ono ,  Shinji Yamada ,  Satoshi Mitsugi ,  Naoharu Sugiyama ,  Shinya Nunoue

IPC分类号： H01L33/40

CPC分类号： H01L33/40 ,  H01L33/14 ,  H01L33/22 ,  H01L33/38

摘要： According to one embodiment, a semiconductor light emitting device includes first and second electrodes, first, second and third semiconductor layers, and a light emitting layer. The first semiconductor layer of a first conductivity type is provided on the first electrode. The light emitting layer is provided on the first semiconductor layer. The second semiconductor layer of a second conductivity type is provided on the light emitting layer. The third semiconductor layer with low impurity concentration is provided on a part of the second semiconductor layer. The second electrode includes a pad section and a narrow wire section. The pad section is provided on the third semiconductor layer. The narrow wire section extends out from the pad section and includes an extending portion extending along a plane perpendicular to a stacking direction. The narrow wire section is in contact with the second semiconductor layer.

摘要翻译： 根据一个实施例，半导体发光器件包括第一和第二电极，第一，第二和第三半导体层以及发光层。 第一导电类型的第一半导体层设置在第一电极上。 发光层设置在第一半导体层上。 第二导电类型的第二半导体层设置在发光层上。 具有低杂质浓度的第三半导体层设置在第二半导体层的一部分上。 第二电极包括焊盘部分和窄线部分。 焊盘部设置在第三半导体层上。 窄线部分从焊盘部分延伸出并且包括沿垂直于堆叠方向的平面延伸的延伸部分。 窄线部分与第二半导体层接触。

公开(公告)号：US20130169953A1

公开(公告)日：2013-07-04

申请号：US13623305

申请日：2012-09-20

申请人： Michael D. Zordan ,  Gary P. Durack ,  Shinji Yamada ,  Bharath K. Narahari ,  Elizabeth C. Eaton ,  Jeffrey D. Wallace ,  Larry W. Arnold ,  Kevin A. Keilbach

发明人： Michael D. Zordan ,  Gary P. Durack ,  Shinji Yamada ,  Bharath K. Narahari ,  Elizabeth C. Eaton ,  Jeffrey D. Wallace ,  Larry W. Arnold ,  Kevin A. Keilbach

IPC分类号： G01N21/53 ,  G02B5/22 ,  G02B5/02 ,  G01N21/64

CPC分类号： G01N21/53 ,  G01N15/1434 ,  G01N15/1459 ,  G01N21/645 ,  G01N2015/008 ,  G01N2015/1006 ,  G01N2015/149 ,  G01N2021/4711

摘要： The various embodiments disclosed herein utilize multiple lasers that have different wavelengths and a single detection path. The lasers are mounted orthogonal to one another so that one laser will provide a forward angle light scatter (FALS) signal in the detection path, and one laser will provide a side scatter signal in the detection path (i.e., the single detection optics are approximately in-line with the FALS laser and approximately orthogonal to the side scatter laser). The single detector path spectrally separates the forward and side scatter signals prior to applying them to their respective detectors for measurement.

摘要翻译： 本文公开的各种实施例使用具有不同波长和单个检测路径的多个激光器。 激光器彼此正交地安装，使得一个激光器将在检测路径中提供前角光散射（FALS）信号，并且一个激光器将在检测路径中提供侧向散射信号（即，单个检测光学器件近似 与FALS激光器一致，并且大致垂直于侧向散射激光器）。 单个检测器路径在将它们应用于它们各自的检测器进行测量之前，将前向和侧向散射信号光谱分离。