FIN-LIKE FIELD EFFECT TRANSISTOR (FINFET) DEVICE AND METHOD OF MANUFACTURING SAME
    61.
    发明申请
    FIN-LIKE FIELD EFFECT TRANSISTOR (FINFET) DEVICE AND METHOD OF MANUFACTURING SAME 审中-公开
    FIN状势场效应晶体管(FINFET)器件及其制造方法

    公开(公告)号:US20160104706A1

    公开(公告)日:2016-04-14

    申请号:US14885272

    申请日:2015-10-16

    摘要: A FinFET device and method for fabricating a FinFET device is disclosed. An exemplary method includes providing a semiconductor substrate; forming a first fin structure and a second fin structure over the semiconductor substrate; forming a gate structure over a portion of the first and second fin structures, such that the gate structure traverses the first and second fin structures; epitaxially growing a first semiconductor material on exposed portions of the first and second fin structures, such that the exposed portions of the first and second fin structures are merged together; and epitaxially growing a second semiconductor material over the first semiconductor material.

    摘要翻译: 公开了一种用于制造FinFET器件的FinFET器件和方法。 一种示例性方法包括提供半导体衬底; 在半导体衬底上形成第一鳍结构和第二鳍结构; 在所述第一和第二鳍结构的一部分上形成栅极结构,使得所述栅极结构穿过所述第一鳍结构和所述第二鳍结构; 在第一和第二鳍结构的暴露部分上外延生长第一半导体材料,使得第一鳍结构和第二鳍结构的暴露部分合并在一起; 并且在所述第一半导体材料上外延生长第二半导体材料。

    Method of forming semiconductor device including silicide layers
    62.
    发明授权
    Method of forming semiconductor device including silicide layers 有权
    形成包括硅化物层的半导体器件的方法

    公开(公告)号:US09214558B2

    公开(公告)日:2015-12-15

    申请号:US14192742

    申请日:2014-02-27

    摘要: A method includes forming a gate structure on a semiconductor material region, wherein the gate structure includes spacer elements abutting a gate electrode layer. The gate electrode layer is etched to provide a recess. A hard mask layer is formed over the gate electrode layer in the recess. Silicide layers are then formed on a source region and a drain region disposed in the semiconductor material region, while the hard mask is disposed over the gate electrode layer. A source contact and a drain contact is then provided, each source and drain contact being conductively coupled to a respective one of the silicide layers.

    摘要翻译: 一种方法包括在半导体材料区域上形成栅极结构,其中栅极结构包括邻接栅电极层的隔离元件。 蚀刻栅电极层以提供凹陷。 在凹部中的栅电极层上形成硬掩模层。 然后在设置在半导体材料区域中的源极区域和漏极区域上形成硅化物层,同时将硬掩模设置在栅电极层上。 然后提供源极接触和漏极接触,每个源极和漏极接触导电耦合到相应的一个硅化物层。

    Method for fabricating a strained structure
    63.
    发明授权
    Method for fabricating a strained structure 有权
    制造应变结构的方法

    公开(公告)号:US09147594B2

    公开(公告)日:2015-09-29

    申请号:US13910633

    申请日:2013-06-05

    IPC分类号: H01L29/66 H01L21/76 H01L29/78

    摘要: A field effect transistor including a substrate which includes, a fin structure, the fin structure having a top surface. The field effect transistor further including an isolation in the substrate and a source/drain (S/D) recess cavity below the top surface of the substrate disposed between the fin structure and the isolation structure. The S/D recess cavity includes a lower portion, the lower portion further includes a first strained layer, a first dielectric film and a second dielectric film, wherein the first strained layer is disposed between the first dielectric film and the second dielectric film. The S/D recess cavity further includes an upper portion including a second strained layer overlying the first strained layer, wherein a ratio of a height of the upper portion to a height of the lower portion ranges from about 0.8 to about 1.2.

    摘要翻译: 一种场效应晶体管,其包括基板,该基板包括翅片结构,所述翅片结构具有顶表面。 所述场效应晶体管还包括在所述衬底中的隔离以及设置在所述鳍结构和所述隔离结构之间的所述衬底的顶表面下方的源极/漏极(S / D)凹陷腔。 S / D凹部空腔包括下部,下部还包括第一应变层,第一介电膜和第二介电膜,其中第一应变层设置在第一介电膜和第二介电膜之间。 S / D凹部空腔还包括上部,其包括覆盖在第一应变层上的第二应变层,其中上部的高度与下部的高度的比率在约0.8至约1.2的范围内。