Vertical microelectronic field emission devices including elongate
vertical pillars having resistive bottom portions
    61.
    发明授权
    Vertical microelectronic field emission devices including elongate vertical pillars having resistive bottom portions 失效
    垂直微电子场发射装置,包括具有电阻底部的细长垂直柱

    公开(公告)号:US5371431A

    公开(公告)日:1994-12-06

    申请号:US846281

    申请日:1992-03-04

    CPC classification number: H01J3/021 H01J1/3042 H01J9/025 H01J2201/319

    Abstract: A vertical microelectronic field emitter includes a conductive top portion and a resistive bottom portion in an elongated column which extends vertically from a horizontal substrate. An emitter electrode may be formed at the base of the column, and an extraction electrode may be formed adjacent the top of the column. The elongated column reduces the parasitic capacitance of the microelectronic field emitter to provide high speed operation, while providing uniform column-to-column resistance. The field emitter may be formed by first forming tips on the face of a substrate and then forming trenches in the substrate around the tips to form columns in the substrate, with the tips lying on top of the columns. The trenches are filled with a dielectric and a conductor layer is formed on the dielectric. Alternatively, trenches may be formed in the face of the substrate with the trenches defining columns in the substrate. Then, tips are formed on top of the columns. The trenches are filled with dielectric and the conductor layer is formed on the dielectric to form the extraction electrodes.

    Abstract translation: 垂直微电子场发射器包括从水平衬底垂直延伸的细长柱中的导电顶部部分和电阻底部部分。 发射电极可以形成在柱的底部,并且可以在柱的顶部附近形成引出电极。 细长柱减小微电子场发射器的寄生电容,以提供高速操作,同时提供均匀的柱对列电阻。 场发射器可以通过在衬底的表面上首先形成尖端然后在衬底周围形成尖端的沟槽形成衬底中的柱,其中尖端位于柱的顶部。 沟槽填充有电介质,并且在电介质上形成导体层。 或者,可以在衬底的表面形成沟槽,其中沟槽限定在衬底中的列。 然后,尖端形成在列的顶部。 沟槽用电介质填充,并且导体层形成在电介质上以形成提取电极。

    Method of making an array of electron emitters
    62.
    发明授权
    Method of making an array of electron emitters 失效
    制造电子发射体阵列的方法

    公开(公告)号:US5318918A

    公开(公告)日:1994-06-07

    申请号:US814960

    申请日:1991-12-31

    Inventor: Gary A. Frazier

    Abstract: This is a method of forming an array of electron emitters at the face of a semiconductor layer. The method comprises the steps of depositing a layer of polycrystalline silicon on a face of a semiconductor workpiece; doping the polycrystalline silicon layer to render the polycrystalline silicon layer conductive; and for each of a plurality of emitter cells, performing an orientation-dependent polycrystalline silicon etch to define a pyramid for the cell having a base affixed to the workpiece and an upstanding tip opposed to the base. Preferably the method also includes the steps of forming a field effect transistor at the face of the workpiece prior to the depositing of the layer, with the pyramid having a base in conductive contact with the drain of the transistor. The polycrystalline silicon layer may be doped in situ after deposition.

    Abstract translation: 这是在半导体层的表面形成电子发射体阵列的方法。 该方法包括以下步骤:在半导体工件的表面上沉积多晶硅层; 掺杂多晶硅层以使多晶硅层导电; 并且对于多个发射极单元中的每一个,执行取向相关多晶硅蚀刻以限定用于具有固定到工件的基部的单元和与基座相对的直立尖端的金字塔。 优选地,该方法还包括以下步骤:在沉积层之前在工件的表面处形成场效应晶体管,金字塔具有与晶体管的漏极导电接触的基极。 多晶硅层可以沉积后原位掺杂。

    Fabrication methods for bidirectional field emission devices and storage
structures
    63.
    发明授权
    Fabrication methods for bidirectional field emission devices and storage structures 失效
    双向场发射器件和存储结构的制造方法

    公开(公告)号:US5312777A

    公开(公告)日:1994-05-17

    申请号:US951283

    申请日:1992-09-25

    CPC classification number: H01L27/10852 H01J9/025 H01L27/108 H01J2201/319

    Abstract: Bidirectional field emission devices (FEDs) and associated fabrication methods are described. A basic device includes a first unitary field emission structure and an adjacently positioned, second unitary field emission structure. The first unitary structure has a first cathode portion and a first anode portion, while the second unitary structure has a second cathode portion and a second anode portion. The structures are positioned such that the first cathode portion opposes the second anode portion so that electrons may flow by field emission thereto and the second cathode portion opposes the first anode portion, again so that electrons may flow by field emission thereto. A control mechanism defines whether the device is active, while biasing voltages applied to the first and second unitary structures define the direction of current flow. Multiple applications exist for such a bidirectional FED. For example, an FED DRAM cell is discussed, as are methods for fabricating the various devices.

    Abstract translation: 描述了双向场致发射器件(FED)和相关的制造方法。 基本装置包括第一单一场发射结构和相邻定位的第二单一场致发射结构。 第一单一结构具有第一阴极部分和第一阳极部分,而第二整体结构具有第二阴极部分和第二阳极部分。 结构被定位成使得第一阴极部分与第二阳极部分相对,使得电子可以通过场发射流动,并且第二阴极部分与第一阳极部分相反,使得电子可以通过场发射而流动。 控制机构定义设备是否有效,而施加到第一和第二单一结构的偏置电压限定电流的方向。 存在这种双向FED的多种应用。 例如,讨论了FED DRAM单元,以及用于制造各种器件的方法。

    Field electron emission device
    64.
    发明授权
    Field electron emission device 失效
    场电子发射装置

    公开(公告)号:US5229682A

    公开(公告)日:1993-07-20

    申请号:US841194

    申请日:1992-02-21

    Inventor: Hiroshi Komatsu

    Abstract: A field emission device and method for manufacturing which comprises using a diffusion mask to preserve an area of a silicon substrate for use as a cathode while all around the cathode the substrate is being diffused with oxygen to form an insulating layer. And further comprising depositing a molybdenum gate electrode layer on the insulating layer and etching the molybdenum gate electrode layer such that the diffusion mask falls off and the insulating layer is dissolved around the cathode through the hole formed in the gate electrode layer by the diffusion mask being removed. The gate electrode openings are therefore automatically and independently self-aligned with their respective cathodes.

    Abstract translation: 一种场致发射器件及其制造方法,其包括使用扩散掩模来保留用于阴极的硅衬底的面积,同时所述衬底周围的所述衬底全部被氧扩散以形成绝缘层。 并且还包括在所述绝缘层上沉积钼栅极层并蚀刻所述钼栅极层,使得所述扩散掩模脱落,并且所述绝缘层通过所述扩散掩模通过形成在所述栅电极层中的所述孔溶解在所述阴极周围 删除。 因此,栅电极开口自动且独立地与它们各自的阴极自对准。

    Method to form self-aligned gate structures around cold cathode emitter
tips using chemical mechanical polishing technology
    65.
    发明授权
    Method to form self-aligned gate structures around cold cathode emitter tips using chemical mechanical polishing technology 失效
    使用化学机械抛光技术在冷阴极发射器尖端周围形成自对准栅极结构的方法

    公开(公告)号:US5229331A

    公开(公告)日:1993-07-20

    申请号:US837453

    申请日:1992-02-14

    Abstract: A chemical mechanical polishing process for the formation of self-aligned gate structures surrounding an electron emission tip for use in field emission displays in which the emission tip is i) optionally sharpened through oxidation, ii) deposited with a conformal insulating material, iii) deposited with a flowable insulating material, which is reflowed below the level of the tip, iv) optionally deposited with another insulating material, v) deposited with a conductive material layer, and vi) optionally, deposited with a buffering material, vii) planarized with a chemical mechanical planarization (CMP) step, to expose the conformal insulating layer, viii) wet etched to remove the insulating material and thereby expose the emission tip, afterwhich ix) the emitter tip may be coated with a material having a lower work function than silicon.

    Abstract translation: 用于形成围绕用于场发射显示器中的电子发射尖端的自对准栅极结构的化学机械抛光工艺,其中发射尖端i)可选地通过氧化锐化,ii)用保形绝缘材料沉积,iii)沉积 具有可流动的绝缘材料,其被回流到尖端的水平面以下,iv)任选地沉积有另外的绝缘材料,v)沉积有导电材料层,以及vi)任选地沉积有缓冲材料,vii) 化学机械平面化(CMP)步骤,暴露保形绝缘层,viii)湿式蚀刻以去除绝缘材料,从而暴露发射尖端,之后ix)发射极尖端可以涂覆具有比硅功函数低的材料 。

    Electron source with microtip emissive cathodes
    66.
    发明授权
    Electron source with microtip emissive cathodes 失效
    电子源与微波辐射阴极

    公开(公告)号:US5194780A

    公开(公告)日:1993-03-16

    申请号:US703684

    申请日:1991-05-31

    Applicant: Robert Meyer

    Inventor: Robert Meyer

    CPC classification number: H01J1/3042 H01J2201/319

    Abstract: Electron source with microtip emissive cathodes having grating-like electrodes. These electrodes can either be cathode conductors (5) or grids (10). Specific application to the excitation of a display screen.

    Abstract translation: 具有具有格栅状电极的微尖端发射阴极的电子源。 这些电极可以是阴极导体(5)或栅极(10)。 具体应用于显示屏的激发。

    Cold-cathode field emission device employing a current source means
    67.
    发明授权
    Cold-cathode field emission device employing a current source means 失效
    采用电流源的冷阴极场发射装置

    公开(公告)号:US5157309A

    公开(公告)日:1992-10-20

    申请号:US582441

    申请日:1990-09-13

    CPC classification number: H01J3/022 H01J2201/319

    Abstract: A cold-cathode field emission device controls electron emission by using a current source coupled to the emitter. The open circuit voltage of the current source is less than the voltage at which the FED would emit electrons. Application of an accelerating potential on the gate enables electron emission. Electron emission from the FED is governed by the current source.

    Abstract translation: 冷阴极场发射器件通过使用耦合到发射极的电流源来控制电子发射。 电流源的开路电压小于FED发射电子的电压。 栅极上的加速电位的施加使得电子发射。 来自FED的电子发射由当前来源控制。

    Field emission cathode structures, devices utilizing such structures, and methods of producing such structures
    68.
    发明授权
    Field emission cathode structures, devices utilizing such structures, and methods of producing such structures 失效
    场发射阴极结构,使用这种结构的装置,以及生产这种结构的方法

    公开(公告)号:US3789471A

    公开(公告)日:1974-02-05

    申请号:US3789471D

    申请日:1972-01-03

    CPC classification number: H01J9/025 H01J1/3042 H01J2201/319

    Abstract: Vacuum devices incorporate electron or field forming sources formed by a cellular array of emission sites. The sources comprise a metal/insulator/metal film sandwich on a substrate with a cellular array of holes through the upper metal and insulator, leaving the edges of the upper metal electrode effectively exposed to the upper surface of the lower metal electrode. Sharp protuberances directed toward the upper electrode and constituting emitter tips of controlled configurations are formed on the exposed area of the lower electrode. A method of forming the structure includes starting with the metal/insulator/metal film sandwich having the cellular array of holes already formed and directing permanent electrode material into the cellular array of holes and masking or subsequently removable material onto the surface surrounding the holes whereby an individual sharp cone-like emitter is formed within each of the holes in the cellular array. Vacuum devices are formed from such structures. For example, a diode is formed either by making the masking material over each emission site an electrode or by removing the masking material and applying a conductive electrode material over each emission site.

    Abstract translation: 真空装置包含由发射部位的细胞阵列形成的电子或场成形源。 源包括金属/绝缘体/金属膜夹在基板上,孔穿过上金属和绝缘体,使上金属电极的边缘有效地暴露于下金属电极的上表面。 在下电极的暴露区域上形成有朝向上电极并构成受控结构的发射极尖端的锋利突起。 形成该结构的方法包括从金属/绝缘体/金属膜夹层开始,具有已经形成的孔的孔状阵列,并将永久电极材料引导到孔的多孔阵列中,并将掩模或随后的可移除材料掩盖在围绕孔的表面上, 在蜂窝阵列中的每个孔内形成单个尖锐的锥形发射器。 真空装置由这种结构形成。 例如,通过在每个发射部位上形成掩模材料,或者通过去除掩模材料并在每个发射部位上施加导电电极材料来形成二极管。

    Dense array of field emitters using vertical ballasting structures
    70.
    发明授权
    Dense array of field emitters using vertical ballasting structures 有权
    使用垂直压载结构的致密阵列的场发射器

    公开(公告)号:US08198106B2

    公开(公告)日:2012-06-12

    申请号:US12233859

    申请日:2008-09-19

    CPC classification number: H01J1/3042 H01J2201/319

    Abstract: A field emitter array structure is provided. The field emitter array structure includes a plurality of vertical un-gated transistor structures formed on a semiconductor substrate. The semiconductor substrate includes a plurality of vertical pillar structures to define said un-gated transistor structures. A plurality of emitter structures are formed on said vertical un-gated transistor structures. Each of said emitter structures is positioned in a ballasting fashion on one of said vertical un-gated transistor structures so as to allow said vertical ungated transistor structure to effectively provide high dynamic resistance with large saturation currents.

    Abstract translation: 提供场发射器阵列结构。 场发射极阵列结构包括形成在半导体衬底上的多个垂直未门控晶体管结构。 半导体衬底包括多个垂直柱结构,以限定所述未门控晶体管结构。 在所述垂直非门控晶体管结构上形成多个发射极结构。 所述发射极结构中的每一个以压载方式定位在所述垂直非门控晶体管结构之一上,以便允许所述垂直非门控晶体管结构有效地提供具有较大饱和电流的高动态电阻。

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