Abstract:
A vertical microelectronic field emitter includes a conductive top portion and a resistive bottom portion in an elongated column which extends vertically from a horizontal substrate. An emitter electrode may be formed at the base of the column, and an extraction electrode may be formed adjacent the top of the column. The elongated column reduces the parasitic capacitance of the microelectronic field emitter to provide high speed operation, while providing uniform column-to-column resistance. The field emitter may be formed by first forming tips on the face of a substrate and then forming trenches in the substrate around the tips to form columns in the substrate, with the tips lying on top of the columns. The trenches are filled with a dielectric and a conductor layer is formed on the dielectric. Alternatively, trenches may be formed in the face of the substrate with the trenches defining columns in the substrate. Then, tips are formed on top of the columns. The trenches are filled with dielectric and the conductor layer is formed on the dielectric to form the extraction electrodes.
Abstract:
This is a method of forming an array of electron emitters at the face of a semiconductor layer. The method comprises the steps of depositing a layer of polycrystalline silicon on a face of a semiconductor workpiece; doping the polycrystalline silicon layer to render the polycrystalline silicon layer conductive; and for each of a plurality of emitter cells, performing an orientation-dependent polycrystalline silicon etch to define a pyramid for the cell having a base affixed to the workpiece and an upstanding tip opposed to the base. Preferably the method also includes the steps of forming a field effect transistor at the face of the workpiece prior to the depositing of the layer, with the pyramid having a base in conductive contact with the drain of the transistor. The polycrystalline silicon layer may be doped in situ after deposition.
Abstract:
Bidirectional field emission devices (FEDs) and associated fabrication methods are described. A basic device includes a first unitary field emission structure and an adjacently positioned, second unitary field emission structure. The first unitary structure has a first cathode portion and a first anode portion, while the second unitary structure has a second cathode portion and a second anode portion. The structures are positioned such that the first cathode portion opposes the second anode portion so that electrons may flow by field emission thereto and the second cathode portion opposes the first anode portion, again so that electrons may flow by field emission thereto. A control mechanism defines whether the device is active, while biasing voltages applied to the first and second unitary structures define the direction of current flow. Multiple applications exist for such a bidirectional FED. For example, an FED DRAM cell is discussed, as are methods for fabricating the various devices.
Abstract:
A field emission device and method for manufacturing which comprises using a diffusion mask to preserve an area of a silicon substrate for use as a cathode while all around the cathode the substrate is being diffused with oxygen to form an insulating layer. And further comprising depositing a molybdenum gate electrode layer on the insulating layer and etching the molybdenum gate electrode layer such that the diffusion mask falls off and the insulating layer is dissolved around the cathode through the hole formed in the gate electrode layer by the diffusion mask being removed. The gate electrode openings are therefore automatically and independently self-aligned with their respective cathodes.
Abstract:
A chemical mechanical polishing process for the formation of self-aligned gate structures surrounding an electron emission tip for use in field emission displays in which the emission tip is i) optionally sharpened through oxidation, ii) deposited with a conformal insulating material, iii) deposited with a flowable insulating material, which is reflowed below the level of the tip, iv) optionally deposited with another insulating material, v) deposited with a conductive material layer, and vi) optionally, deposited with a buffering material, vii) planarized with a chemical mechanical planarization (CMP) step, to expose the conformal insulating layer, viii) wet etched to remove the insulating material and thereby expose the emission tip, afterwhich ix) the emitter tip may be coated with a material having a lower work function than silicon.
Abstract:
Electron source with microtip emissive cathodes having grating-like electrodes. These electrodes can either be cathode conductors (5) or grids (10). Specific application to the excitation of a display screen.
Abstract:
A cold-cathode field emission device controls electron emission by using a current source coupled to the emitter. The open circuit voltage of the current source is less than the voltage at which the FED would emit electrons. Application of an accelerating potential on the gate enables electron emission. Electron emission from the FED is governed by the current source.
Abstract:
Vacuum devices incorporate electron or field forming sources formed by a cellular array of emission sites. The sources comprise a metal/insulator/metal film sandwich on a substrate with a cellular array of holes through the upper metal and insulator, leaving the edges of the upper metal electrode effectively exposed to the upper surface of the lower metal electrode. Sharp protuberances directed toward the upper electrode and constituting emitter tips of controlled configurations are formed on the exposed area of the lower electrode. A method of forming the structure includes starting with the metal/insulator/metal film sandwich having the cellular array of holes already formed and directing permanent electrode material into the cellular array of holes and masking or subsequently removable material onto the surface surrounding the holes whereby an individual sharp cone-like emitter is formed within each of the holes in the cellular array. Vacuum devices are formed from such structures. For example, a diode is formed either by making the masking material over each emission site an electrode or by removing the masking material and applying a conductive electrode material over each emission site.
Abstract:
A field emitter array structure is provided. The field emitter array structure includes a plurality of vertical un-gated transistor structures formed on a semiconductor substrate. The semiconductor substrate includes a plurality of vertical pillar structures to define said un-gated transistor structures. A plurality of emitter structures are formed on said vertical un-gated transistor structures. Each of said emitter structures is positioned in a ballasting fashion on one of said vertical un-gated transistor structures so as to allow said vertical ungated transistor structure to effectively provide high dynamic resistance with large saturation currents.