公开(公告)号：US06248671B1

公开(公告)日：2001-06-19

申请号：US09136883

申请日：1998-08-19

申请人： J. Brett Rolfson ,  Rodney C. Langley

发明人： J. Brett Rolfson ,  Rodney C. Langley

IPC分类号： H01L21469

CPC分类号： H01L21/68742 ,  H01L21/67109 ,  H01L21/68757

摘要： In one aspect, the invention encompasses an apparatus for semiconductor processing comprising: a) at least one support member comprising an upper surface for supporting a semiconductor wafer; b) a component through which the support member extends, the component comprising a front surface and a back surface, at least one of the support member and the component being movable relative to the other of the support member and the component such that the support member can support a wafer in an elevated position above the front surface and can be withdrawn into the component to lower the wafer relative to the front surface of the component; and c) a block joined to the support member below the component back surface, the block engaging the component back surface when the support member upper surface extends above the component to a predetermined distance, the block preventing the support member upper surface from extending beyond the front surface by more than the predetermined distance. In other aspects, the invention encompasses semiconductor processing methods, such as, for example, methods utilizing the above-described apparatus.

摘要翻译： 一方面，本发明包括用于半导体处理的装置，包括：a）至少一个支撑构件，其包括用于支撑半导体晶片的上表面; b）支撑构件延伸的构件，该构件包括前表面和后表面，支撑构件和构件中的至少一个可相对于支撑构件和构件中的另一个移动，使得支撑构件 可以在前表面上方的升高位置支撑晶片，并且可以将晶片取出到组件中以相对于部件的前表面降低晶片; 以及c）在所述部件后表面下方连接到所述支撑构件的块，当所述支撑构件上表面在所述构件上方延伸到预定距离时，所述块与所述构件背面接合，所述块防止所述支撑构件上表面延伸超过 前表面超过预定距离。 在其它方面，本发明包括半导体处理方法，例如利用上述装置的方法。

公开(公告)号：US06236149B1

公开(公告)日：2001-05-22

申请号：US09126939

申请日：1998-07-30

申请人： J. Brett Rolfson

发明人： J. Brett Rolfson

IPC分类号： H01J1304

CPC分类号： H01J3/022 ,  H01J2329/00

摘要： The present invention includes field emission devices and methods of forming field emission devices. According to one aspect of the invention, a field emission device includes a substrate; at least two adjacent and spaced emitters extending from the substrate; a conductor spaced from the substrate and configured to receive an electrical charge to control the emission of electrons from the at least two adjacent and spaced emitters; and a plurality of spaced insulative conductor supports positioned between the conductor and the substrate, and intermediate the at least two adjacent and spaced emitters.

摘要翻译： 本发明包括场致发射器件和形成场致发射器件的方法。 根据本发明的一个方面，一种场致发射器件包括衬底; 至少两个相邻和间隔的发射器从衬底延伸; 与衬底间隔开并被配置为接收电荷以控制来自至少两个相邻和间隔的发射器的电子的发射; 以及定位在所述导体和所述基板之间的多个隔开的绝缘导体支撑件，并且在所述至少两个相邻和间隔的发射器之间。

公开(公告)号：US06195163B1

公开(公告)日：2001-02-27

申请号：US09175061

申请日：1998-10-19

申请人： Randhir P. S. Thakur ,  Michael Nuttall ,  J. Brett Rolfson ,  Robert James Burke

发明人： Randhir P. S. Thakur ,  Michael Nuttall ,  J. Brett Rolfson ,  Robert James Burke

IPC分类号： G01B1130

CPC分类号： G01B11/303

摘要： Disclosed is a process for analyzing the surface characteristics of opaque materials. The method comprises in one embodiment the use of a UV reflectometer to build a calibration matrix of data from a set of control samples and correlating a desired surface characteristic such as roughness or surface area to the set of reflectances of the control samples. The UV reflectometer is then used to measure the reflectances of a test sample of unknown surface characteristics. Reflectances are taken at a variety of angles of reflection for a variety of wavelengths, preferably between about 250 nanometers to about 400 nanometers. These reflectances are then compared against the reflectances of the calibration matrix in order to correlate the closest data in the calibration matrix. By so doing, a variety of information is thereby concluded, due to the broad spectrum of wavelengths and angles of reflection used. This includes information pertaining to the roughness and surface area, as well as other surface characteristics such as grain size, grain density, grain shape, and boundary size between the grains. Surface characteristic evaluation can be conducted in-process in a manner which is non-destructive to the test sample. The method is particularly useful for determining the capacitance of highly granular polysilicon test samples used in the construction of capacitator plates in integrated circuit technology, and can be used to determine the existence of flat smooth surfaces, and the presence of prismatic and hemispherical irregularities on flat smooth surfaces.

摘要翻译： 公开了一种用于分析不透明材料的表面特性的方法。 该方法在一个实施方案中包括使用UV反射计来构建来自一组对照样品的数据的校准矩阵，并将期望的表面特性如粗糙度或表面积与对照样品的一组反射率相关联。 然后使用UV反射计来测量未知表面特性的测试样品的反射率。 对于各种波长，优选在约250纳米到约400纳米之间的各种反射角拍摄反射率。 然后将这些反射率与校准矩阵的反射率进行比较，以便将校准矩阵中最接近的数据相关联。 通过这样做，由于广泛的波长和使用的反射角度，从而得出各种信息。 这包括关于粗糙度和表面积的信息，以及晶粒之间的其他表面特性，例如晶粒尺寸，晶粒密度，晶粒形状和边界尺寸。 表面特性评估可以以对测试样品非破坏性的方式进行。 该方法对于确定集成电路技术中电容器板结构中使用的高度粒状多晶硅测试样品的电容特别有用，可用于确定平坦光滑表面的存在，以及平面上存在棱镜和半球形不规则 光滑的表面。

公开(公告)号：US6004868A

公开(公告)日：1999-12-21

申请号：US587403

申请日：1996-01-17

申请人： J. Brett Rolfson ,  Tyler A. Lowrey ,  Fernando Gonzalez ,  W. Richard Barbour

发明人： J. Brett Rolfson ,  Tyler A. Lowrey ,  Fernando Gonzalez ,  W. Richard Barbour

IPC分类号： H01L21/225 ,  H01L21/8238 ,  H01L21/324

CPC分类号： H01L21/823892 ,  H01L21/2253

摘要： Disclosed is an improved CMOS fabrication method that allows an implanted well in a bare silicon wafer to be simultaneously, driven annealed and denuded in a single process step. More specifically, a single step drive-anneal-denude (DAD) process is accomplished using a non-inert ambient environment. The DAD process is accomplished in a combination argon/hydrogen ambient environment. This process causes the silicon wafer to roughen slightly and is followed by an oxidation step, that optionally takes place in a combination argon/oxygen ambient environment to smooth out the silicon surface. The oxidation step may also optionally act as a pad-oxide or screening oxide for subsequent fabrication.

公开(公告)号：US5976732A

公开(公告)日：1999-11-02

申请号：US3543

申请日：1998-01-06

申请人： Christophe Pierrat ,  J. Brett Rolfson

发明人： Christophe Pierrat ,  J. Brett Rolfson

IPC分类号： G03F1/26 ,  G03F1/30 ,  G03F9/00

CPC分类号： G03F1/26 ,  G03F1/30

摘要： A photomask for printing multiple configurations includes a transparent substrate and a patterned opaque layer on a surface of the substrate defining transmitting and non-transmitting portions. A phase shifting layer is provided adjacent the opaque layer and has a depth such that it shifts a light having a first wavelength about 180.degree. and shifts the phase of a second light about 0.degree..

摘要翻译： 用于打印多个配置的光掩模包括透明基板和在基板的表面上的图案化不透明层，其限定透射部分和非透射部分。 相邻层设置在不透明层附近，并且具有使第一波长约180度的光移动并使第二光的相位偏移约0度的深度。

公开(公告)号：US5831378A

公开(公告)日：1998-11-03

申请号：US918766

申请日：1997-08-25

申请人： J. Brett Rolfson ,  Kevin Tjaden

发明人： J. Brett Rolfson ,  Kevin Tjaden

IPC分类号： H01J9/02 ,  H01L21/3105 ,  H01J1/16 ,  H01J1/02 ,  H01J1/62 ,  H01J19/10

CPC分类号： H01L21/31053 ,  H01J9/025 ,  H01J2201/30426 ,  H01J2201/319 ,  H01J2209/0226

摘要： A field emitter display having reduced surface leakage comprising at least one emitter tip surrounded by a dielectric region. The dielectric region is formed of a composite of insulative layers, at least one of which has fins extending toward the emitter tip. A conductive gate, for extracting electrons from the emitter tip, is disposed superjacent the dielectric region. The fins increase the length of the path that leaked electrical charge travels before impacting the gate.

摘要翻译： 具有减小的表面泄漏的场发射器显示器包括由电介质区域包围的至少一个发射极尖端。 电介质区域由绝缘层的复合体形成，其中至少一个具有朝向发射极尖端延伸的翅片。 用于从发射极尖端提取电子的导电栅极设置在电介质区域的上方。 在撞击门之前，翅片增加了泄漏电荷行进路径的长度。

公开(公告)号：US5825498A

公开(公告)日：1998-10-20

申请号：US596469

申请日：1996-02-05

申请人： Randhir P. S. Thakur ,  Michael Nuttall ,  J. Brett Rolfson ,  Robert James Burke

发明人： Randhir P. S. Thakur ,  Michael Nuttall ,  J. Brett Rolfson ,  Robert James Burke

IPC分类号： G01B11/30 ,  G01B11/00

CPC分类号： G01B11/303

摘要： Disclosed is a process for analyzing the surface characteristics of opaque materials. The method comprises in one embodiment the use of a UV reflectometer to build a calibration matrix of data from a set of control samples and correlating a desired surface characteristic such as roughness or surface area to the set of reflectances of the control samples. The UV reflectometer is then used to measure the reflectances of a test sample of unknown surface characteristics. Reflectances are taken at a variety of wavelengths, preferably between about 250 nanometers to about 400 nanometers. These reflectances are then compared against the reflectances of the calibration matrix in order to correlate the closest data in the calibration matrix. By so doing, a variety of information is thereby concluded, due to the broad spectrum of wavelengths used. This includes information pertaining to the roughness and surface area, as well as other surface characteristics such as grain size, grain density, grain shape, and boundary size between the grains. Surface characteristic evaluation can be conducted in-process in a manner which is non-destructive to the test sample. The method is particularly useful for determining the capacitance of highly granular polysilicon test samples used in the construction of capacitator plates in integrated circuit technology.

摘要翻译： 公开了一种用于分析不透明材料的表面特性的方法。 该方法在一个实施方案中包括使用UV反射计来构建来自一组对照样品的数据的校准矩阵，并将期望的表面特性如粗糙度或表面积与对照样品的一组反射率相关联。 然后使用UV反射计测量未知表面特性的测试样品的反射率。 反射率以各种波长进行，优选在约250纳米至约400纳米之间。 然后将这些反射率与校准矩阵的反射率进行比较，以便将校准矩阵中最接近的数据相关联。 通过这样做，由于所使用的波长范围广，因此得出各种信息。 这包括关于粗糙度和表面积的信息，以及晶粒之间的其他表面特性，例如晶粒尺寸，晶粒密度，晶粒形状和边界尺寸。 表面特性评估可以以对测试样品非破坏性的方式进行。 该方法对于确定集成电路技术中用于构造电容器板的高度粒状多晶硅测试样品的电容特别有用。

公开(公告)号：US5825074A

公开(公告)日：1998-10-20

申请号：US692043

申请日：1996-08-01

申请人： J. Brett Rolfson ,  Monte Manning

发明人： J. Brett Rolfson ,  Monte Manning

IPC分类号： H01L21/02 ,  H01L21/768 ,  H01L21/8244 ,  H01L27/11 ,  H01L29/00

CPC分类号： H01L28/20 ,  H01L21/76888 ,  H01L21/76895 ,  H01L27/11 ,  H01L27/1112 ,  Y10S257/903 ,  Y10S257/904 ,  Y10S438/98

摘要： Disclosed are methods of forming resistors and diodes from semiconductive material, and static random access memory (SRAM) cells incorporating resistors, and to integrated circuitry incorporating resistors and diodes. A node to which electrical connection is to be made is provided. An electrically insulative layer is provided outwardly of the node. An opening is provided in the electrically insulative layer over the node. The opening is filled with semiconductive material which depending on configuration serves as one or both of a vertically elongated diode and resistor.

公开(公告)号：US5754390A

公开(公告)日：1998-05-19

申请号：US589899

申请日：1996-01-23

申请人： Gurtej S. Sandhu ,  J. Brett Rolfson

发明人： Gurtej S. Sandhu ,  J. Brett Rolfson

IPC分类号： H01L21/02 ,  H01L21/8242 ,  H01G4/06

CPC分类号： H01L27/10852 ,  H01L28/40 ,  H01L28/82 ,  H01L28/84 ,  H01L28/86 ,  H01L28/90

摘要： Disclosed is a capacitor construction for a more uniformly thick capacitor dielectric layer, and a method for fabricating the same. The method has special utility where the bottom electrode comprises composite layers over which the capacitor dielectric demonstrates differential growth during deposition. Exposed portions of an underlying first electrode layer, are covered either by a conductive or dielectric spacer, or by a dielectric padding. For the preferred embodiments, in which the bottom electrode comprises titanium carbonitride over rough polysilicon, a dielectric padding may be formed during a rapid thermal nitridation step, which causes silicon nitride to grow out of an exposed polysilicon sidewall. Alternatively, a sidewall spacer may be formed by deposition an additional layer of titanium nitride over the original titanim nitride strap, and performing a spacer etch.

公开(公告)号：US5372973A

公开(公告)日：1994-12-13

申请号：US53794

申请日：1993-04-27

申请人： Trung T. Doan ,  J. Brett Rolfson ,  Tyler A. Lowrey ,  David A. Cathey

发明人： Trung T. Doan ,  J. Brett Rolfson ,  Tyler A. Lowrey ,  David A. Cathey

IPC分类号： H01J1/304 ,  H01J9/02 ,  H01L21/3105 ,  H01L21/465

CPC分类号： H01J9/025 ,  H01L21/31053 ,  H01J2201/30426 ,  H01J2201/319 ,  H01J2209/0226

摘要： A chemical mechanical polishing process for the formation of self-aligned gate structures surrounding an electron emission tip for use in field emission displays in which the emission tip is i) optionally sharpened through oxidation, ii) deposited with a conformal insulating material, iii) deposited with a flowable insulating material, which is reflowed below the level of the tip, iv) optionally deposited with another insulating material, v) deposited with a conductive material layer, and vi) optionally, deposited with a buffering material, vii) planarized with a chemical mechanical planarization (CMP) step, to expose the conformal insulating layer, viii) wet etched to remove the insulating material and thereby expose the emission tip, afterwhich ix) the emitter tip may be coated with a material having a lower work function than silicon.

摘要翻译： 用于形成围绕用于场发射显示器中的电子发射尖端的自对准栅极结构的化学机械抛光工艺，其中发射尖端i）可选地通过氧化锐化，ii）用保形绝缘材料沉积，iii）沉积 具有可流动的绝缘材料，其被回流到尖端的水平面以下，iv）任选地沉积有另外的绝缘材料，v）沉积有导电材料层，以及vi）任选地沉积有缓冲材料，vii） 化学机械平面化（CMP）步骤，暴露保形绝缘层，viii）湿式蚀刻以去除绝缘材料，从而暴露发射尖端，之后ix）发射极尖端可以涂覆具有比硅功函数低的材料 。