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    ALTERNATE DYNAMIC KEYBOARD FOR CONVERTIBLE TABLET COMPUTERS
    71.
    发明申请
    ALTERNATE DYNAMIC KEYBOARD FOR CONVERTIBLE TABLET COMPUTERS 有权
    用于可转换平板电脑的替代动态键盘

    公开(公告)号：US20150277580A1

    公开(公告)日：2015-10-01

    申请号：US14229655

    申请日：2014-03-28

    Applicant: Arvind Kumar ,  Duncan Glendinning

    Inventor： Arvind Kumar ,  Duncan Glendinning

    IPC: G06F3/023 ,  G06F3/0488

    CPC classification number: G06F3/0238 ,  G06F1/1662 ,  G06F3/04886 ,  G06F2200/1637

    Abstract: Systems and methods may provide for detecting an event on a computing device having an embedded keyboard with a default mapping of keys to functions and disabling a first subset of keys on the embedded keyboard in response to the event. Additionally, a second subset of keys on the embedded keyboard may be re-mapped to one or more different functions if an application running on the computing device supports keyboard re-mapping. In one example, re-mapping the second subset of keys includes grouping two or more keys in the second subset into a common function.

    Abstract translation: 系统和方法可以提供用于检测具有嵌入式键盘的计算设备上的事件，所述嵌入式键盘具有键的功能的默认映射以及响应于该事件禁用嵌入式键盘上的键的第一子集。 另外，如果在计算设备上运行的应用支持键盘重新映射，则嵌入式键盘上的键的第二子集可被重新映射到一个或多个不同的功能。 在一个示例中，重新映射密钥的第二子集包括将第二子集中的两个或多个密钥分组为公共功能。

    Processor extensions for execution of secure embedded containers
    72.
    发明授权
    Processor extensions for execution of secure embedded containers 有权
    用于执行安全嵌入式容器的处理器扩展

    公开(公告)号：US09086913B2

    公开(公告)日：2015-07-21

    申请号：US12347890

    申请日：2008-12-31

    Applicant: Vedvyas Shanbhogue ,  Arvind Kumar ,  Purushottam Goel

    Inventor： Vedvyas Shanbhogue ,  Arvind Kumar ,  Purushottam Goel

    IPC: G06F9/46 ,  G06F9/48 ,  G06F9/50 ,  G06F9/455

    CPC classification number: G06F12/1408 ,  G06F9/45558 ,  G06F9/4812 ,  G06F9/5077 ,  G06F2009/45579 ,  G06F2212/1052 ,  H04L9/14 ,  H04L9/3242 ,  H04L63/168 ,  H04L2209/24 ,  Y02D10/22 ,  Y02D10/24 ,  Y02D10/36

    Abstract: Methods and apparatus relating to processor extensions for execution of secure embedded containers are described. In an embodiment, a scalable solution for manageability function is provided, e.g., for UMPC environments or otherwise where utilizing a dedicated processor or microcontroller for manageability is inappropriate or impractical. For example, in an embodiment, an OS (Operating System) or VMM (Virtual Machine Manager) Independent (generally referred to herein as “OI”) architecture involves creating one or more containers on a processor by dynamically partitioning resources (such as processor cycles, memory, devices) between the HOST OS/VMM and the OI container. Other embodiments are also described and claimed.

    Abstract translation: 描述与用于执行安全嵌入式容器的处理器扩展有关的方法和装置。 在一个实施例中，提供了用于可管理性功能的可扩展解决方案，例如对于UMPC环境，或者其他利用专用处理器或微控制器进行可管理性是不合适或不切实际的。 例如，在一个实施例中，OS（操作系统）或VMM（虚拟机管理器）独立（本文通常称为“OI”）架构涉及通过动态地划分资源（例如处理器周期）来在处理器上创建一个或多个容器 ，内存，设备）在HOST OS / VMM和OI容器之间。 还描述和要求保护其他实施例。

    Offloading Touch Processing To A Graphics Processor
    75.
    发明申请
    Offloading Touch Processing To A Graphics Processor 有权
    将触摸处理卸载到图形处理器

    公开(公告)号：US20140176573A1

    公开(公告)日：2014-06-26

    申请号：US13785098

    申请日：2013-03-05

    Applicant: Balaji Vembu ,  David I. Poisner ,  Arvind Kumar ,  Chaitanya R. Gandra

    Inventor： Balaji Vembu ,  David I. Poisner ,  Arvind Kumar ,  Chaitanya R. Gandra

    IPC: G06T1/20

    CPC classification number: G06T1/20

    Abstract: In an embodiment, a processor includes a graphics domain including a graphics engines each having at least one execution unit. The graphics domain is to schedule a touch application offloaded from a core domain to at least one of the plurality of graphics engines. The touch application is to execute responsive to an update to a doorbell location in a system memory coupled to the processor, where the doorbell location is written responsive to a user input to the touch input device. Other embodiments are described and claimed.

    Abstract translation: 在一个实施例中，处理器包括图形域，包括每个具有至少一个执行单元的图形引擎。 图形域是将从核心域卸载的触摸应用程序调度到多个图形引擎中的至少一个。 所述触摸应用是响应于对耦合到所述处理器的系统存储器中的门铃位置的更新执行的，其中响应于对所述触摸输入设备的用户输入来写入所述门铃位置。 描述和要求保护其他实施例。

    Techniques for Enabling Multiple Vt Devices Using High-K Metal Gate Stacks
    77.
    发明申请
    Techniques for Enabling Multiple Vt Devices Using High-K Metal Gate Stacks 有权
    使用高K金属栅极堆栈启用多个Vt器件的技术

    公开(公告)号：US20120181610A1

    公开(公告)日：2012-07-19

    申请号：US13433815

    申请日：2012-03-29

    Applicant: Martin M. Frank ,  Arvind Kumar ,  Vijay Narayanan ,  Vamsi K. Paruchuri ,  Jeffrey Sleight

    Inventor： Martin M. Frank ,  Arvind Kumar ,  Vijay Narayanan ,  Vamsi K. Paruchuri ,  Jeffrey Sleight

    IPC: H01L27/092

    CPC classification number: H01L27/1104 ,  H01L27/11 ,  H01L27/1108

    Abstract: Techniques for combining transistors having different threshold voltage requirements from one another are provided. In one aspect, a semiconductor device comprises a substrate having a first and a second nFET region, and a first and a second pFET region; a logic nFET on the substrate over the first nFET region; a logic pFET on the substrate over the first pFET region; a SRAM nFET on the substrate over the second nFET region; and a SRAM pFET on the substrate over the second pFET region, each comprising a gate stack having a metal layer over a high-K layer. The logic nFET gate stack further comprises a capping layer separating the metal layer from the high-K layer, wherein the capping layer is further configured to shift a threshold voltage of the logic nFET relative to a threshold voltage of one or more of the logic pFET, SRAM nFET and SRAM pFET.

    Abstract translation: 提供了用于组合彼此具有不同阈值电压要求的晶体管的技术。 在一个方面，一种半导体器件包括具有第一和第二nFET区的衬底以及第一和第二pFET区; 在第一nFET区域上的衬底上的逻辑nFET; 在第一pFET区上的衬底上的逻辑pFET; 位于第二nFET区上的衬底上的SRAM nFET; 以及在第二pFET区上的衬底上的SRAM pFET，每个包括在高K层上具有金属层的栅极堆叠。 逻辑nFET栅极堆叠还包括将金属层与高K层分隔开的覆盖层，其中封盖层还被配置为相对于逻辑pFET中的一个或多个的阈值电压移动逻辑nFET的阈值电压 ，SRAM nFET和SRAM pFET。

    Method and apparatus for cost and power efficient, scalable operating system independent services
    78.
    发明授权
    Method and apparatus for cost and power efficient, scalable operating system independent services 有权
    用于成本和功率高效，可扩展的操作系统独立服务的方法和设备

    公开(公告)号：US08171321B2

    公开(公告)日：2012-05-01

    申请号：US11964439

    申请日：2007-12-26

    Applicant: Arvind Kumar ,  Per Hammarlund ,  Glenn Hinton ,  Johan G. Van De Groenendaal

    Inventor： Arvind Kumar ,  Per Hammarlund ,  Glenn Hinton ,  Johan G. Van De Groenendaal

    IPC: G06F1/00

    CPC classification number: G06F1/3287 ,  G06F1/3209 ,  Y02D10/171

    Abstract: A low cost, low power consumption scalable architecture is provided to allow a computer system to be managed remotely during all system power states. In a lowest power state, power is only applied to minimum logic necessary to examine a network packet. Power is applied for a short period of time to an execution subsystem and one of a plurality of cores selected to handle processing of received service requests. After processing the received service requests, the computer system returns to the lowest power state.

    Abstract translation: 提供了低成本，低功耗的可扩展架构，以允许在所有系统电源状态期间远程管理计算机系统。 在最低功率状态下，功率仅适用于检查网络分组所需的最小逻辑。 将电力短时间施加到执行子系统，并且被选择用于处理所接收的服务请求的处理的多个核心中的一个。 在处理接收到的服务请求之后，计算机系统返回到最低功率状态。

    Utilization based installation on a computing system
    79.
    发明授权
    Utilization based installation on a computing system 有权
    在计算系统上的基于利用的安装

    公开(公告)号：US07802083B2

    公开(公告)日：2010-09-21

    申请号：US11613317

    申请日：2006-12-20

    Applicant: Nagasubramanian Gurumoorthy ,  Michael Rhodehamel ,  Arvind Kumar

    Inventor： Nagasubramanian Gurumoorthy ,  Michael Rhodehamel ,  Arvind Kumar

    IPC: G06F9/445 ,  G06F15/173

    CPC classification number: G06F9/505 ,  G06F8/65

    Abstract: Methods, apparatuses, articles, and systems for performing an installation by a client system at a time when the client system is predicted to be below a level, are disclosed. The installation may be a software or a patch. In various embodiments, the methods, apparatus et al may include performance of the adaptive prediction, and the adaptive prediction may be performed by a learning algorithm. In other embodiments, the methods et al may also develop a model of the client system's utilization by observing and recording metrics of hardware and software utilization over time.

    Abstract translation: 公开了在客户端系统被预测为低于某一水平时由用户系统执行安装的方法，装置，物品和系统。 安装可能是软件或补丁程序。 在各种实施例中，方法，装置等可以包括自适应预测的执行，并且可以通过学习算法执行自适应预测。 在其他实施例中，方法等也可以通过观察和记录硬件和软件利用率随时间推移来开发客户系统利用的模型。

    Techniques for enabling multiple Vt devices using high-K metal gate stacks
    80.
    发明授权
    Techniques for enabling multiple Vt devices using high-K metal gate stacks 失效
    使用高K金属栅极堆叠实现多个Vt器件的技术

    公开(公告)号：US07718496B2

    公开(公告)日：2010-05-18

    申请号：US11927964

    申请日：2007-10-30

    Applicant: Martin M. Frank ,  Arvind Kumar ,  Vijay Narayanan ,  Vamsi K. Paruchuri ,  Jeffrey Sleight

    Inventor： Martin M. Frank ,  Arvind Kumar ,  Vijay Narayanan ,  Vamsi K. Paruchuri ,  Jeffrey Sleight

    IPC: H01L21/8234 ,  H01L21/8244

    CPC classification number: H01L27/1104 ,  H01L27/11 ,  H01L27/1108

    Abstract: Techniques for combining transistors having different threshold voltage requirements from one another are provided. In one aspect, a semiconductor device comprises a substrate having a first and a second nFET region, and a first and a second pFET region; a logic nFET on the substrate over the first nFET region; a logic pFET on the substrate over the first pFET region; a SRAM nFET on the substrate over the second nFET region; and a SRAM pFET on the substrate over the second pFET region, each comprising a gate stack having a metal layer over a high-K layer. The logic nFET gate stack further comprises a capping layer separating the metal layer from the high-K layer, wherein the capping layer is further configured to shift a threshold voltage of the logic nFET relative to a threshold voltage of one or more of the logic pFET, SRAM nFET and SRAM pFET.

    Abstract translation: 提供了用于组合彼此具有不同阈值电压要求的晶体管的技术。 在一个方面，一种半导体器件包括具有第一和第二nFET区的衬底以及第一和第二pFET区; 在第一nFET区域上的衬底上的逻辑nFET; 在第一pFET区上的衬底上的逻辑pFET; 位于第二nFET区上的衬底上的SRAM nFET; 以及在第二pFET区上的衬底上的SRAM pFET，每个包括在高K层上具有金属层的栅极堆叠。 逻辑nFET栅极堆叠还包括将金属层与高K层分隔开的覆盖层，其中封盖层还被配置为相对于逻辑pFET中的一个或多个的阈值电压移动逻辑nFET的阈值电压 ，SRAM nFET和SRAM pFET。

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