公开(公告)号：US20100237967A1

公开(公告)日：2010-09-23

申请号：US12681284

申请日：2008-07-29

申请人： Hiroaki Ueno ,  Hiroyuki Sakai ,  Tsuyoshi Tanaka ,  Daisuke Ueda

发明人： Hiroaki Ueno ,  Hiroyuki Sakai ,  Tsuyoshi Tanaka ,  Daisuke Ueda

IPC分类号： H01P3/08

CPC分类号： H01L21/02118 ,  H01L21/02178 ,  H01L21/02181 ,  H01L21/02186 ,  H01L21/312 ,  H01L23/5222 ,  H01L23/5223 ,  H01L23/66 ,  H01L28/40 ,  H01L2223/6627 ,  H01L2223/6644 ,  H01L2924/0002 ,  H01L2924/19032 ,  H01L2924/3011 ,  H01P3/003 ,  H01P3/081 ,  H01L2924/00

摘要： A circuit device includes a substrate 11, and a transmission line 10. The transmission line 10 includes a dielectric film 13 formed on the substrate 11, and a signal line formed on the dielectric film 13. The dielectric film 13 includes a nano-composite film in which particles of a first material are dispersed in a second material.

摘要翻译： 电路装置包括基板11和传输线10.传输线10包括形成在基板11上的电介质膜13和形成在电介质膜13上的信号线。电介质膜13包括纳米复合膜 其中第一材料的颗粒分散在第二材料中。

公开(公告)号：US07790988B2

公开(公告)日：2010-09-07

申请号：US11915914

申请日：2007-02-13

申请人： Tsuyoshi Tanaka ,  Masaharu Yamamoto

发明人： Tsuyoshi Tanaka ,  Masaharu Yamamoto

IPC分类号： H01L23/02 ,  H05K5/06

CPC分类号： H01L23/10 ,  H01L21/4817 ,  H01L23/06 ,  H01L2224/16 ,  H01L2924/01019 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/1617 ,  H01L2924/16195 ,  H01L2924/1627

摘要： A hermetic sealing cap can be provided which is capable of suppressing that a production process becomes complicated, and additionally of suppressing that a solder layer wetly spreads inward on a sealing surface. This hermetic sealing cap (1, 30) includes a base member (2), a first plating layer (3, 31) that is formed on the surface of the base member, and a second plating layer (4, 32) that is formed on the surface of the first plating layer and is less oxidized than the first plating layer, wherein a part of the second plating layer in an area (S1, S5) inside an area (S2, S6) to which an electronic component accommodation member is joined is removed so that the surface of the first plating layer is exposed, and the surface of the first plating layer that is exposed in the area from which the second plating layer is removed is oxidized.

摘要翻译： 可以提供一种能够抑制生产过程变得复杂的气密密封盖，另外抑制焊料层在密封表面上向内湿润地扩展。 该气密密封盖（1,30）包括基体（2），形成在基体表面上的第一镀层（3,31）和形成的第二镀层（4,32） 在第一镀层的表面上比第一镀层氧化少，其中在电子部件容纳部件的区域（S2，S6）内的区域（S1，S5）内的区域（S1，S5）中的部分第二镀层 被除去，使得第一镀层的表面被暴露，并且暴露在从其去除第二镀层的区域中的第一镀层的表面被氧化。

公开(公告)号：US20100149871A1

公开(公告)日：2010-06-17

申请号：US12654062

申请日：2009-12-09

申请人： Tsuyoshi Tanaka

发明人： Tsuyoshi Tanaka

IPC分类号： G11C16/04

CPC分类号： G11C11/5642 ,  G11C16/26

摘要： Reading methods of a nonvolatile semiconductor memory device are described herein. Methods may include supplying, to a word line, one of a voltage corresponding to a highest reading level or a voltage having a level higher than a first reading level of a read operation to be performed on the word line, and subsequently supplying a voltage of the first reading level to the word line and performing the read operation.

摘要翻译： 这里描述了非易失性半导体存储器件的读取方法。 方法可以包括向字线提供对应于最高读取电平的电压或具有高于要在字线上执行的读取操作的第一读取电平的电平的电压之一，并且随后提供 到字线的第一读取电平并执行读取操作。

公开(公告)号：US20100097105A1

公开(公告)日：2010-04-22

申请号：US12445390

申请日：2007-11-20

申请人： Tatsuo Morita ,  Manabu Yanagihara ,  Hidetoshi Ishida ,  Yasuhiro Uemoto ,  Hiroaki Ueno ,  Tsuyoshi Tanaka ,  Daisuke Ueda

发明人： Tatsuo Morita ,  Manabu Yanagihara ,  Hidetoshi Ishida ,  Yasuhiro Uemoto ,  Hiroaki Ueno ,  Tsuyoshi Tanaka ,  Daisuke Ueda

IPC分类号： H03B1/00 ,  H01L29/20 ,  H01L29/24 ,  H01L29/772 ,  H03K17/56

CPC分类号： H01L29/7787 ,  H01L27/0605 ,  H01L29/0619 ,  H01L29/1066 ,  H01L29/2003 ,  H01L29/432 ,  H01L29/739 ,  H01L29/8124

摘要： A semiconductor device includes a semiconductor layer stack 13 formed on a substrate 11 and having a channel region, a first electrode 16A and a second electrode 16B formed spaced apart from each other on the semiconductor layer stack 13, a first gate electrode 18A formed between the first electrode 16A and the second electrode 16B, and a second gate electrode 18B formed between the first gate electrode 18A and the second electrode 16B. A first control layer 19A having a p-type conductivity is formed between the semiconductor layer stack 13 and the first gate electrode 18A.

摘要翻译： 半导体器件包括形成在衬底11上并具有沟道区的半导体层堆叠13，在半导体层叠层13上彼此隔开形成的第一电极16A和第二电极16B，形成在第一栅电极18A之间的第一栅电极18A 第一电极16A和第二电极16B，以及形成在第一栅电极18A和第二电极16B之间的第二栅电极18B。 在半导体层堆叠13和第一栅电极18A之间形成具有p型导电性的第一控制层19A。

公开(公告)号：US20080291123A1

公开(公告)日：2008-11-27

申请号：US11579627

申请日：2005-04-28

申请人： Tetsujiro Kondo ,  Yasushi Tatehira ,  Tsuyoshi Tanaka ,  Kazutaka Uchida ,  Naohide Yamada ,  Yoshinori Watanabe ,  Shinsuke Araya

发明人： Tetsujiro Kondo ,  Yasushi Tatehira ,  Tsuyoshi Tanaka ,  Kazutaka Uchida ,  Naohide Yamada ,  Yoshinori Watanabe ,  Shinsuke Araya

IPC分类号： G09G3/20

CPC分类号： G09F9/30 ,  G09F9/35 ,  G09G2300/026 ,  H04N9/12

摘要： The present invention relates to a space-diving apparatus that could well be preferably applied to a single-leaf section, a divider etc. A division plate section 110 constitutes a single-leaf screen device 100 and divides a space. On a front surface of the division plate section 110, nine TV receiving sets 131-1 through 131-9 are arranged in a matrix shape and an attachable/detachable manner. These TV receiving sets 131-1 through 131-9 can be detached and individually used. If the TV receiving set is detached, a decorative sheet is arranged to a position where this receiving set has been arranged. On a back surface of the division plate section 110, nine image pickup elements are mounted to, for example, positions that correspond to the TV receiving sets 131-1 through 131-9, respectively. An imaging direction of each of the image pickup elements can be automatically aligned with a line of sight of the user based on a position of the user (position of a remote controller). An image due to a video signal obtained by each of the image pickup elements can be displayed on the TV receiving sets 131-1 through 131-9, thereby permitting the user to observe the other side of the division plate section 110 easily.

摘要翻译： 本发明涉及一种可以优选地应用于单叶片部分，分隔件等的空间潜水装置。分隔板部分110构成单叶屏幕装置100并且划分空间。 在分隔板部110的前表面上，九个TV接收组131-1至131-9以矩阵形状和可附接/可拆卸的方式布置。 这些电视接收机组131-1至131-9可以分离并单独使用。 如果电视接收机被拆卸，则将装饰片布置到已经布置了该接收组的位置。 在分割板部分110的背面上，分别将9个摄像元件安装到例如与TV接收组131-1至131-9对应的位置。 每个图像拾取元件的成像方向可以基于用户的位置（遥控器的位置）自动与用户的视线对齐。 可以在TV接收组131-1至131-9上显示由每个图像拾取元件获得的视频信号的图像，从而允许用户容易地观察分隔板部分110的另一侧。

公开(公告)号：US20080266012A1

公开(公告)日：2008-10-30

申请号：US12109804

申请日：2008-04-25

申请人： Kazuhiro Yahata ,  Takashi Uno ,  Hiroyuki Sakai ,  Tsuyoshi Tanaka ,  Daisuke Ueda

发明人： Kazuhiro Yahata ,  Takashi Uno ,  Hiroyuki Sakai ,  Tsuyoshi Tanaka ,  Daisuke Ueda

IPC分类号： H03L7/099

CPC分类号： H03H7/40 ,  H05B6/686 ,  H05B6/705 ,  Y02B40/146

摘要： A method for controlling a high-frequency radiator includes the steps of: (a) applying a high-frequency radiation through the solid-state oscillator and the antenna; (b) sensing part of the high-frequency radiation returned from the antenna to the solid-state oscillator; (c) adjusting radiation/propagation conditions for the high-frequency radiation on the basis of the sensed results in the step (b), the high-frequency radiation propagating from the solid-state oscillator to the antenna; and (d) after the step (c), applying the high-frequency radiation through the solid-state oscillator and the antenna to a target object. In the step (c), the oscillation frequency of the solid-state oscillator, the power of the high-frequency radiation applied by the solid-state oscillator, the power supply voltage supplied to the solid-state oscillator, the impedance match between the output impedance of the solid-state oscillator and the impedance of the antenna, or any other condition is changed.

摘要翻译： 一种用于控制高频辐射器的方法包括以下步骤：（a）通过固态振荡器和天线施加高频辐射; （b）感测从天线返回到固态振荡器的一部分高频辐射; （c）基于步骤（b）中检测到的结果，调整从固态振荡器传播到天线的高频辐射来调整高频辐射的辐射/传播条件; 和（d）在步骤（c）之后，将高频辐射通过固态振荡器和天线施加到目标对象。 在步骤（c）中，固态振荡器的振荡频率，由固态振荡器施加的高频辐射的功率，提供给固态振荡器的电源电压， 固体振荡器的输出阻抗和天线的阻抗，或任何其他条件改变。

公开(公告)号：US20070285044A1

公开(公告)日：2007-12-13

申请号：US11783789

申请日：2007-04-12

申请人： Junnosuke Nakatsugawa ,  Tsuyoshi Tanaka ,  Kenji Sakurai ,  Tunehiro Endo

发明人： Junnosuke Nakatsugawa ,  Tsuyoshi Tanaka ,  Kenji Sakurai ,  Tunehiro Endo

IPC分类号： H02P27/04

CPC分类号： H02P6/10 ,  H02P6/182 ,  H02P27/08

摘要： A control apparatus and a semiconductor apparatus of AC motors capable of reducing torque ripple with a comparatively simple circuit corresponding to a high withstand voltage and capable of driving a motor at high efficiency even when the rotational speed or load has changed. The control apparatus detects first phase signals fixed in relative phase to induced voltages of the motor and current polarity signals, recognizes phase differences between them, generates second phase signals so as to make the phase differences approach zero to drive the motor at high efficiency, generates modulation wave signals having quasi-sinusoidal waveforms or trapezoidal waveforms on the basis of the second phase signals, compares the modulation wave signals with a carrier wave signal, and conducts PWM control on an inverter.

摘要翻译： 一种AC电动机的控制装置和半导体装置，其能够以对应于高耐受电压的比较简单的电路来减小转矩脉动，并且即使当转速或负载已经改变时也能够以高效率驱动电动机。 控制装置检测相对于电动机的感应电压和电流极性信号相对固定的第一相位信号，识别它们之间的相位差，产生第二相位信号，以使相位接近零，以高效率驱动电动机，产生 基于第二相位信号具有准正弦波形或梯形波形的调制波信号将调制波信号与载波信号进行比较，并对逆变器进行PWM控制。

公开(公告)号：US20070284653A1

公开(公告)日：2007-12-13

申请号：US11785801

申请日：2007-04-20

申请人： Hiroaki Ueno ,  Manabu Yanagihara ,  Yasuhiro Uemoto ,  Tsuyoshi Tanaka

发明人： Hiroaki Ueno ,  Manabu Yanagihara ,  Yasuhiro Uemoto ,  Tsuyoshi Tanaka

IPC分类号： H01L29/792

CPC分类号： H01L29/7786 ,  H01L29/1066 ,  H01L29/2003 ,  H01L29/452

摘要： A semiconductor device includes a first group III-V nitride semiconductor layer, a second group III-V nitride semiconductor layer having a larger band gap than the first group Ill-V nitride semiconductor layer and at least one ohmic electrode successively formed on a substrate. The ohmic electrode is formed so as to have a base portion penetrating the second group III-V nitride semiconductor layer and reaching a portion of the first group III-V nitride semiconductor layer disposed beneath a two-dimensional electron gas layer. An impurity doped layer is formed in portions of the first group III-V nitride semiconductor layer and the second group III-V nitride semiconductor layer in contact with the ohmic electrode.

摘要翻译： 半导体器件包括第一III-V族氮化物半导体层，具有比第一组III-V族氮化物半导体层更大的带隙的第二III-V族氮化物半导体层和在衬底上依次形成的至少一个欧姆电极。 欧姆电极形成为具有穿透第二III-V族氮化物半导体层并且到达设置在二维电子气体层下方的第一III-V族氮化物半导体层的一部分的基极部分。 在与欧姆电极接触的第一III-V族氮化物半导体层和第二III-V族氮化物半导体层的部分中形成杂质掺杂层。

公开(公告)号：US20070254419A1

公开(公告)日：2007-11-01

申请号：US11819198

申请日：2007-06-26

申请人： Atsuhiko Kanda ,  Tsuyoshi Tanaka ,  Yasuhiro Uemoto ,  Yutaka Hirose ,  Tomohiro Murata

发明人： Atsuhiko Kanda ,  Tsuyoshi Tanaka ,  Yasuhiro Uemoto ,  Yutaka Hirose ,  Tomohiro Murata

IPC分类号： H01L21/338

CPC分类号： H01L29/7787 ,  H01L27/14609 ,  H01L27/1463 ,  H01L27/14636 ,  H01L27/14656 ,  H01L29/2003 ,  H01L29/66462

摘要： A semiconductor device has a first nitride semiconductor layer, a second nitride semiconductor layer formed on the first nitride semiconductor layer and having such a composition as to generate a 2-dimensional electron gas layer in the upper portion of the first nitride semiconductor layer, and an electrode having an ohmic property and formed selectively on the second nitride semiconductor layer. The second nitride semiconductor layer includes a contact area having at least one inclined portion with a bottom or wall surface thereof being inclined toward the upper surface of the first nitride semiconductor layer and defining a depressed cross-sectional configuration. The electrode is formed on the contact area.

公开(公告)号：US20070176215A1

公开(公告)日：2007-08-02

申请号：US11600102

申请日：2006-11-16

申请人： Manabu Yanagihara ,  Masahiro Hikita ,  Tetsuzo Ueda ,  Yasuhiro Uemoto ,  Tsuyoshi Tanaka

发明人： Manabu Yanagihara ,  Masahiro Hikita ,  Tetsuzo Ueda ,  Yasuhiro Uemoto ,  Tsuyoshi Tanaka

IPC分类号： H01L29/76

CPC分类号： H01L29/7787 ,  H01L29/1066 ,  H01L29/2003 ,  H01L29/4175 ,  H01L29/432 ,  H01L29/66462

摘要： A transistor includes a first semiconductor layer formed on a substrate, a second semiconductor layer formed on the first semiconductor layer and has a band gap larger than that of the first semiconductor layer, a control layer formed on the second semiconductor layer and contains p-type impurities, a gate electrode formed in contact with at least part of the control layer and a source electrode and a drain electrode formed on both sides of the control layer, respectively. A third semiconductor layer made of material having a lower etch rate than that of the control layer is formed between the control layer and the second semiconductor layer.

摘要翻译： 晶体管包括形成在基板上的第一半导体层，形成在第一半导体层上并具有比第一半导体层的带隙大的带隙的第二半导体层，形成在第二半导体层上并包含p型 杂质，形成为与控制层的至少一部分接触的栅极电极以及分别形成在控制层两侧的源电极和漏电极。 在控制层和第二半导体层之间形成由蚀刻率低于控制层的材料制成的第三半导体层。