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    SEMICONDUCTOR MEMORY DEVICE AND SEMICONDUCTOR DEVICE
    74.
    发明申请
    SEMICONDUCTOR MEMORY DEVICE AND SEMICONDUCTOR DEVICE 有权
    半导体存储器件和半导体器件

    公开(公告)号：US20110216571A1

    公开(公告)日：2011-09-08

    申请号：US13034750

    申请日：2011-02-25

    申请人： Shunpei Yamazaki ,  Jun Koyama ,  Kiyoshi Kato ,  Yasuhiko Takemura

    发明人： Shunpei Yamazaki ,  Jun Koyama ,  Kiyoshi Kato ,  Yasuhiko Takemura

    IPC分类号： G11C5/06

    CPC分类号： G11C11/565 ,  G11C11/404 ,  G11C11/405 ,  H01L27/108 ,  H01L27/11 ,  H01L27/1207 ,  H01L27/1225 ,  H01L27/1255 ,  H01L28/40

    摘要： A matrix is formed using a plurality of memory cells in each of which a drain of the writing transistor is connected to a gate of a reading transistor and one electrode of a capacitor. A gate of the writing transistor, a source of the writing transistor, a source of the reading transistor, and a drain of the reading transistor are connected to a writing word line, a writing bit line, a reading bit line, and a bias line, respectively. In order to reduce the number of wirings, a writing word line to which the gate of the writing transistor is not connected is substituted for the reading word line. Further, the writing bit line is substituted for the reading bit line.

    摘要翻译： 使用多个存储单元形成矩阵，每个存储单元中的写入晶体管的漏极连接到读取晶体管的栅极和电容器的一个电极。 写入晶体管的栅极，写入晶体管的源极，读取晶体管的源极和读取晶体管的漏极连接到写入字线，写入位线，读取位线和偏置线 ， 分别。 为了减少布线数量，写入晶体管的栅极未连接到的写入字线代替读取字线。 此外，写位线被代替读位线。