Abstract:
The technique of the present invention effectively relieves potential deterioration of the picture quality due to an interpolating process carried out simultaneously with a skipping process. When a skipping rate of the original image is set in at least one of a horizontal direction and a vertical direction, an image display apparatus of the present invention carries out a skipping process at selected positions in the at least one of the horizontal direction and the vertical direction, and simultaneously carries out interpolation on non-skipped pixels adjacent to skipped pixel, thereby generating an interpolated image. The image display apparatus subsequently carries out a filtering process on the interpolated image, the filtering process being carried out with a spatial low pass filter and a spatial high pass filter which are used substantially in this sequence.
Abstract:
A video multiplexing system for superimposition scalable video data streams upon a background data stream has a video decoder to extract a first luminance signal, an A/D converter to converter the first luminance signal to digital form, a three-port video memory for storing the digitized luminance signal, a D/A converter for receiving the stored digitized luminance signal and converting it to analog form, a mixing, or multiplexing circuit, having one input coupled to the D/A converter output, at least one other luminance signal source as an input and control inputs for directing the selection of one of the input luminance signals as an output, and a control circuit such as a microprocessor for controlling the various components. The write operations to the video memory are synchronized to the incoming luminance signal, and the read operations from video memory are synchronized to the display device. This video multiplexing architecture provides the ability to open a view port of arbitrary size at any position within a larger display. Scaling of the digitized luminance signal to fit an a view port of arbitrary size is archived by varying the frequency of the A/D converter clocks so as to expand or shrink the resulting image.
Abstract:
A video display apparatus of the present invention simultaneously displays a plurality of video images, which are overlapping with one another, on a display screen as a function of video data read out of a plurality of video memories without transferring the video data among the video memories. The video display apparatus includes three memory control units 71-73, which output clock signals CLK1 through CLK3 synchronous with three video signals RGB01-3 read out of three video memory units 61-63, respectively. A video signal switching unit 82 selects one of the three video signals while a clock signal switching unit 4 selects one of the three clock signals. A digital-to-analog converter 86 executes digital-to-analog conversion of the selected video signal using the selected clock signal. A video control signal generator 80 supplies read-permit signals HPIE1-3 and VPIE1-3 to the three memory control units 71-73 to alternate the video signals suppled to the display device. This results in displaying video images read out of the three video memory units 61-63 to be overlapped one upon another on the display screen.
Abstract:
A video multiplexing system for superimposition of scalable video data streams upon a background data stream and having a video decoder to extract a first luminance signal, an A/D converter to convert the first luminance signal to digital form, a three-port video memory for storing digitized luminance signal, a D/A converter for receiving the stored digitized luminance signal and converting it to analog form, a mixing or multiplexing means, having one input coupled to the D/A converter output, at least one other luminance signal source as an input and controlling inputs for directing the selection of one of the input luminance signals as an output, and a control means such as a microprocessor for controlling the various components. The write operations to the video memory are synchronized to the incoming luminance signal, and the read operations from the video memory are synchronized to the display device. This video multiplexing architecture provides the ability to open a viewport of arbitrary size at any position within a larger display. Scaling of the digitized luminance signal to fit in a viewport of arbitrary size is achieved by varying the frequency of the A/D converter clocks so as to expand or shrink the resulting image.
Abstract:
A video processor which is capable of arbitrarily expanding or contracting an image in a vertical direction is described. A horizontal synchronizing signal HS of a video signal CS is inputted to a reference input terminal 63a of a phase comparator 63 of a PLL circuit 62 to take out a clock signal CK having a frequency N1 times larger than that of the horizontal synchronizing signal HS. This clock signal is frequency-divided by N2. Since N2 is set to the number of horizontal synchronizing signals within a vertical synchronous period, the number of sampling lines in a vertical direction becomes equal to N1. Accordingly, When an output signal (line clock signal LCK) of the frequency divider 67 is used as a signal for increment of a vertical address of a video memory 70, enlargement/contraction of an image can be carried out by changing N1.
Abstract:
An electromechanical device includes a central shaft; a rotor having a rotor magnet disposed along the periphery of the central shaft; a stator disposed on the periphery of the rotor; and a rotation mechanism connected to the rotor and used for transfer of a rotational driving force, wherein in the rotor, between the central shaft and the rotor magnet, a space which opens in at least one of an axial direction of the central shaft and houses at least part of the rotation mechanism is formed.
Abstract:
Specific image quality adjustment of an image is performed according to a setting made by a user, and contrast compensation is performed such that a brightness is kept unchanged at the center of a specific color region larger than a predetermined size, regardless of the setting of the image quality adjustment. The image quality adjustment is performed by selecting one of a plurality of filters with different frequency characteristics according to the setting of the image quality adjustment, and then performing filter processing on the image by using the selected filter. The contrast compensation is performed upon the image that has undergone the filter processing, by using a contrast compensation value related to the selected filter.
Abstract:
A robotic device includes an electric motor in which a drive control circuit includes a driver circuit for intermittently supplying the magnetic coils with a supply voltage VSUP; a switching signal generating circuit that generates a switching signal supplied to the driver circuit; and a voltage setter that supplies a supply voltage control value Ya to the switching signal generating circuit. By adjusting pulse width of the switching signals DRVA1, DRVA2 with reference to the supply voltage control value Ya, the switching signal generating circuit adjusts the effective voltage which is applied to the magnetic coils.
Abstract:
A control device includes a drive controller that controls the driving of an electromagnetic coil, and a regeneration controller that controls the regeneration of power from the electromagnetic coil. The drive controller includes an excitation interval setting unit that sets excitation and non-excitation intervals such that voltage is applied to the electromagnetic coil during the excitation interval but is not applied during the non-excitation interval. The excitation and non-excitation intervals are symmetrical with centers that respectively correspond to the π/2 and π phase points of the induced voltage waveform. The regeneration controller includes a regeneration interval setting unit that sets regeneration and non-regeneration intervals such that power is regenerated from the electromagnetic coil during the regeneration interval but is not regenerated during the non-regeneration interval. The regeneration and non-regeneration intervals are symmetrical with centers that respectively correspond to the π/2 and π phase points of the induced voltage waveform.
Abstract:
The brushless motor includes a stator having a electromagnetic coil and a position sensor; an axis fixed to the stator; and a rotor having a permanent magnet. The rotor rotates around the axis. The rotor is linked to a driven member that is driven by the brushless motor.