公开(公告)号：US08866221B2

公开(公告)日：2014-10-21

申请号：US13539973

申请日：2012-07-02

申请人： Franz Hirler ,  Hans Weber ,  Hans-Joachim Schulze ,  Uwe Wahl

发明人： Franz Hirler ,  Hans Weber ,  Hans-Joachim Schulze ,  Uwe Wahl

IPC分类号： H01L29/66

CPC分类号： H01L29/66712 ,  H01L29/0634 ,  H01L29/0649 ,  H01L29/0653 ,  H01L29/0696 ,  H01L29/1095 ,  H01L29/161 ,  H01L29/167 ,  H01L29/408 ,  H01L29/7395 ,  H01L29/7811 ,  H01L29/8611

摘要： A drift layer of a super junction semiconductor device includes first portions of a first conductivity type and second portions of a second conductivity type opposite to the first conductivity type. The first and second portions are formed both in a cell area and in an edge area surrounding the cell area, wherein an on-state or forward current through the drift layer flows through the first portions in the cell area. At least one of the first and second portions other than the first portions in the cell area includes an auxiliary structure or contains auxiliary impurities to locally reduce the avalanche rate. Locally reducing the avalanche rate increases the total voltage blocking capability of the super junction semiconductor device.

摘要翻译： 超结半导体器件的漂移层包括第一导电类型的第一部分和与第一导电类型相反的第二导电类型的第二部分。 第一和第二部分在单元区域和围绕单元区域的边缘区域中形成，其中通过漂移层的导通状态或正向电流流过单元区域中的第一部分。 电池区域中除了第一部分之外的第一和第二部分中的至少一个包括辅助结构或包含辅助杂质以局部降低雪崩率。 本地降低雪崩率提高了超结半导体器件的总电压阻断能力。

公开(公告)号：US20120305993A1

公开(公告)日：2012-12-06

申请号：US13484490

申请日：2012-05-31

申请人： Armin Willmeroth ,  Franz Hirler ,  Hans Weber ,  Michael Treu

发明人： Armin Willmeroth ,  Franz Hirler ,  Hans Weber ,  Michael Treu

IPC分类号： H01L27/088

CPC分类号： H01L29/7813 ,  H01L27/088 ,  H01L27/098 ,  H01L29/0634 ,  H01L29/407 ,  H01L29/41766 ,  H01L29/42356 ,  H01L29/7803 ,  H01L29/7831

摘要： A semiconductor device includes a gate terminal, at least one control terminal and first and second load terminals and at least one device cell. The at least one device cell includes a MOSFET device having a load path and a control terminal, the control terminal coupled to the gate terminal and a JFET device having a load path and a control terminal, the load path connected in series with the load path of the MOSFET device between the load terminals. The at least one device cell further includes a first coupling transistor having a load path and a control terminal, the load path coupled between the control terminal of the JFET device and one of the source terminal and the gate terminal, and the control terminal coupled to the at least one control terminal of the transistor device.

摘要翻译： 半导体器件包括栅极端子，至少一个控制端子以及第一和第二负载端子以及至少一个器件单元。 所述至少一个器件单元包括具有负载路径和控制端子的MOSFET器件，所述控制端子耦合到所述栅极端子以及具有负载路径和控制端子的JFET器件，所述负载路径与所述负载路径串联连接 的MOSFET器件在负载端子之间。 所述至少一个器件单元还包括具有负载路径和控制端子的第一耦合晶体管，所述负载路径耦合在所述JFET器件的控制端子与所述源极端子和所述栅极端子之一之间，并且所述控制端子耦合到 晶体管器件的至少一个控制端子。

公开(公告)号：US08803205B2

公开(公告)日：2014-08-12

申请号：US13484490

申请日：2012-05-31

申请人： Armin Willmeroth ,  Franz Hirler ,  Hans Weber ,  Michael Treu

发明人： Armin Willmeroth ,  Franz Hirler ,  Hans Weber ,  Michael Treu

IPC分类号： H01L29/66

CPC分类号： H01L29/7813 ,  H01L27/088 ,  H01L27/098 ,  H01L29/0634 ,  H01L29/407 ,  H01L29/41766 ,  H01L29/42356 ,  H01L29/7803 ,  H01L29/7831

摘要： A semiconductor device includes a gate terminal, at least one control terminal and first and second load terminals and at least one device cell. The at least one device cell includes a MOSFET device having a load path and a control terminal, the control terminal coupled to the gate terminal and a JFET device having a load path and a control terminal, the load path connected in series with the load path of the MOSFET device between the load terminals. The at least one device cell further includes a first coupling transistor having a load path and a control terminal, the load path coupled between the control terminal of the JFET device and one of the source terminal and the gate terminal, and the control terminal coupled to the at least one control terminal of the transistor device.

摘要翻译： 半导体器件包括栅极端子，至少一个控制端子以及第一和第二负载端子以及至少一个器件单元。 所述至少一个器件单元包括具有负载路径和控制端子的MOSFET器件，所述控制端子耦合到所述栅极端子以及具有负载路径和控制端子的JFET器件，所述负载路径与所述负载路径串联连接 的MOSFET器件在负载端子之间。 所述至少一个器件单元还包括具有负载路径和控制端子的第一耦合晶体管，所述负载路径耦合在所述JFET器件的控制端子与所述源极端子和所述栅极端子之一之间，并且所述控制端子耦合到 晶体管器件的至少一个控制端子。

公开(公告)号：US09112053B2

公开(公告)日：2015-08-18

申请号：US13537374

申请日：2012-06-29

申请人： Hans Weber ,  Franz Hirler ,  Andreas Meiser ,  Anton Mauder ,  Kurt Sorschag ,  Stefan Gamerith ,  Roman Knoefler

发明人： Hans Weber ,  Franz Hirler ,  Andreas Meiser ,  Anton Mauder ,  Kurt Sorschag ,  Stefan Gamerith ,  Roman Knoefler

IPC分类号： H01L21/8234 ,  H01L27/06 ,  H01L29/40 ,  H01L29/66 ,  H01L29/78 ,  H01L29/06

CPC分类号： H01L29/7802 ,  H01L21/823437 ,  H01L21/823481 ,  H01L21/823487 ,  H01L27/0629 ,  H01L29/0653 ,  H01L29/407 ,  H01L29/66734 ,  H01L29/7828

摘要： A semiconductor device with a dielectric layer is produced by providing a semiconductor body with a first trench extending into the semiconductor body, the first trench having a bottom and a sidewall. A first dielectric layer is formed on the sidewall in a lower portion of the first trench and a first plug is formed in the lower portion of the first trench so as to cover the first dielectric layer. The first plug leaves an upper portion of the sidewall uncovered. A sacrificial layer is formed on the sidewall in the upper portion of the first trench and a second plug is formed in the upper portion of the first trench. The sacrificial layer is removed so as to form a second trench having sidewalls and a bottom. A second dielectric layer is formed in the second trench and extends to the first dielectric layer.

摘要翻译： 具有电介质层的半导体器件通过向半导体本体提供延伸到半导体本体中的第一沟槽，第一沟槽具有底部和侧壁来制造。 第一电介质层形成在第一沟槽的下部的侧壁上，第一插塞形成在第一沟槽的下部，以覆盖第一电介质层。 第一个塞子留下未覆盖的侧壁的上部。 牺牲层形成在第一沟槽的上部的侧壁上，第二插塞形成在第一沟槽的上部。 除去牺牲层以形成具有侧壁和底部的第二沟槽。 第二介电层形成在第二沟槽中并延伸到第一介电层。

公开(公告)号：US20130005099A1

公开(公告)日：2013-01-03

申请号：US13537374

申请日：2012-06-29

申请人： Hans Weber ,  Franz Hirler ,  Andreas Meiser ,  Anton Mauder ,  Kurt Sorschag ,  Stefan Gamerith ,  Roman Knoefler

发明人： Hans Weber ,  Franz Hirler ,  Andreas Meiser ,  Anton Mauder ,  Kurt Sorschag ,  Stefan Gamerith ,  Roman Knoefler

IPC分类号： H01L21/336 ,  H01L21/20

CPC分类号： H01L29/7802 ,  H01L21/823437 ,  H01L21/823481 ,  H01L21/823487 ,  H01L27/0629 ,  H01L29/0653 ,  H01L29/407 ,  H01L29/66734 ,  H01L29/7828

摘要： A semiconductor device with a dielectric layer is produced by providing a semiconductor body with a first trench extending into the semiconductor body, the first trench having a bottom and a sidewall. A first dielectric layer is formed on the sidewall in a lower portion of the first trench and a first plug is formed in the lower portion of the first trench so as to cover the first dielectric layer. The first plug leaves an upper portion of the sidewall uncovered. A sacrificial layer is formed on the sidewall in the upper portion of the first trench and a second plug is formed in the upper portion of the first trench. The sacrificial layer is removed so as to form a second trench having sidewalls and a bottom. A second dielectric layer is formed in the second trench and extends to the first dielectric layer.

摘要翻译： 具有电介质层的半导体器件通过向半导体本体提供延伸到半导体本体中的第一沟槽，第一沟槽具有底部和侧壁来制造。 第一电介质层形成在第一沟槽的下部的侧壁上，第一插塞形成在第一沟槽的下部，以覆盖第一电介质层。 第一个塞子留下未覆盖的侧壁的上部。 牺牲层形成在第一沟槽的上部的侧壁上，第二插塞形成在第一沟槽的上部。 除去牺牲层以形成具有侧壁和底部的第二沟槽。 第二介电层形成在第二沟槽中并延伸到第一介电层。

公开(公告)号：US08829562B2

公开(公告)日：2014-09-09

申请号：US13556335

申请日：2012-07-24

申请人： Hans-Joachim Schulze ,  Franz Hirler ,  Hans-Peter Felsl ,  Franz-Josef Niedernostheide

发明人： Hans-Joachim Schulze ,  Franz Hirler ,  Hans-Peter Felsl ,  Franz-Josef Niedernostheide

IPC分类号： H01L29/66 ,  H01L21/336

CPC分类号： H01L29/66 ,  H01L29/1095 ,  H01L29/407 ,  H01L29/408 ,  H01L29/42368 ,  H01L29/512 ,  H01L29/513 ,  H01L29/517 ,  H01L29/518 ,  H01L29/7397 ,  H01L29/7813

摘要： A semiconductor device includes a trench extending into a drift zone of a semiconductor body from a first surface. The semiconductor device further includes a gate electrode in the trench and a body region adjoining a sidewall of the trench. The semiconductor device further includes a dielectric structure in the trench. The dielectric structure includes a high-k dielectric in a lower part of the trench. The high-k dielectric includes a dielectric constant higher than that of SiO2. An extension of the high-k dielectric in a vertical direction perpendicular to the first surface is limited between a bottom side of the trench and a level where a bottom side of the body region adjoins the sidewall of the trench.

摘要翻译： 半导体器件包括从第一表面延伸到半导体本体的漂移区的沟槽。 半导体器件还包括在沟槽中的栅极电极和与沟槽的侧壁相邻的主体区域。 半导体器件还包括沟槽中的电介质结构。 电介质结构包括沟槽下部的高k电介质。 高k电介质包括比SiO2更高的介电常数。 在垂直于第一表面的垂直方向上的高k电介质的延伸在沟槽的底侧和体区的底侧与沟槽的侧壁相邻的水平之间被限制。

公开(公告)号：US20100009525A1

公开(公告)日：2010-01-14

申请号：US12498418

申请日：2009-07-07

申请人： Franz Hirler ,  Hans-Joachim Schulze

发明人： Franz Hirler ,  Hans-Joachim Schulze

IPC分类号： H01L21/20

CPC分类号： H01L21/02667 ,  C30B11/14 ,  C30B19/12 ,  C30B29/06 ,  C30B29/52 ,  C30B31/22 ,  H01L21/02532 ,  H01L21/02686

摘要： A method including producing a monocrystalline layer is disclosed. A first lattice constant on a monocrystalline substrate has a second lattice constant at least in a near-surface region. The second lattice constant is different from the first lattice constant. Lattice matching atoms are implanted into the near-surface region. The near-surface region is momentarily melted. A layer is epitaxially deposited on the near-surface region that has solidified in monocrystalline fashion.

摘要翻译： 公开了一种制造单晶层的方法。 单晶衬底上的第一晶格常数至少在近表面区域具有第二晶格常数。 第二晶格常数与第一晶格常数不同。 将晶格匹配原子注入近表面区域。 近表面区域瞬间熔化。 外延沉积在已经以单晶固化的近表面区域上的层。

公开(公告)号：US08659023B2

公开(公告)日：2014-02-25

申请号：US13610206

申请日：2012-09-11

申请人： Franz Hirler ,  Hans-Joachim Schulze

发明人： Franz Hirler ,  Hans-Joachim Schulze

IPC分类号： H01L31/036

CPC分类号： H01L21/02667 ,  C30B11/14 ,  C30B19/12 ,  C30B29/06 ,  C30B29/52 ,  C30B31/22 ,  H01L21/02532 ,  H01L21/02686

摘要： A monocrystalline layer having a first lattice constant on a monocrystalline substrate having a second lattice constant at least in a near-surface region, wherein the second lattice constant is different from the first lattice constant. Lattice matching atoms are implanted into the near-surface region. The near-surface region is momentarily melted. A layer is epitaxially deposited on the near-surface region that has solidified in monocrystalline fashion.

摘要翻译： 在单晶衬底上具有至少在近表面区域中具有第二晶格常数的第一晶格常数的单晶层，其中第二晶格常数不同于第一晶格常数。 将晶格匹配原子注入近表面区域。 近表面区域瞬间熔化。 外延沉积在已经以单晶固化的近表面区域上的层。

公开(公告)号：US20060211189A1

公开(公告)日：2006-09-21

申请号：US11364882

申请日：2006-02-28

申请人： Ralf Siemieniec ,  Hans-Joachim Schulze ,  Franz Hirler

发明人： Ralf Siemieniec ,  Hans-Joachim Schulze ,  Franz Hirler

IPC分类号： H01L21/8238

CPC分类号： H01L29/7813 ,  H01L21/263 ,  H01L21/761 ,  H01L27/0623 ,  H01L27/088 ,  H01L27/0922 ,  H01L29/0878 ,  H01L29/407 ,  H01L29/41741 ,  H01L29/66734

摘要： A method for producing a region of increased doping in an n-doped semiconductor layer which is buried in a semiconductor body of a vertical power transistor and which is arranged between a p-doped body region facing the front side contact of the power transistor and an n-doped substrate facing the rear side contact of the power transistor has the following steps: a) irradiation of at least one part of the surface of the semiconductor body with protons, and b) heat treatment of the semiconductor body.

公开(公告)号：US20080265329A1

公开(公告)日：2008-10-30

申请号：US12112624

申请日：2008-04-30

申请人： Franz Hirler ,  Elmar Falck ,  Hans-Joachim Schulze

发明人： Franz Hirler ,  Elmar Falck ,  Hans-Joachim Schulze

IPC分类号： H01L29/06 ,  H01L21/00 ,  H01L21/8234

CPC分类号： H01L29/7816 ,  H01L29/0619 ,  H01L29/0696 ,  H01L29/407 ,  H01L29/66681

摘要： A semiconductor device which has a semiconductor body and a method for producing it. At the semiconductor body, a first electrode which is electrically connected to a first near-surface zone of the semiconductor body and a second electrode which is electrically connected to a second zone of the semiconductor body are arranged. A drift section is arranged between the first and the second electrode. In the drift section, a coupling structure is provided for at least one field plate arranged in the drift section. The coupling structure has a floating first area doped complementarily to the drift section and a second area arranged in the first area. The second area forms a locally limited punch-through effect or an ohmic contact to the drift section, and the field plate is electrically connected at least to the second area.

摘要翻译： 具有半导体本体的半导体器件及其制造方法。 在半导体本体上，配置电连接到半导体主体的第一近表面区域的第一电极和与半导体本体的第二区域电连接的第二电极。 漂移部分设置在第一和第二电极之间。 在漂移部分中，为布置在漂移部分中的至少一个场板提供耦合结构。 耦合结构具有与漂移部分互补地掺杂的浮置的第一区域和布置在第一区域中的第二区域。 第二区域形成局部有限的穿通效应或者与漂移部分的欧姆接触，并且场板至少电连接到第二区域。