TRANSISTOR WITH CONTROLLABLE COMPENSATION REGIONS
    1.
    发明申请
    TRANSISTOR WITH CONTROLLABLE COMPENSATION REGIONS 有权
    具有可控制补偿区的晶体管

    公开(公告)号:US20120305993A1

    公开(公告)日:2012-12-06

    申请号:US13484490

    申请日:2012-05-31

    IPC分类号: H01L27/088

    摘要: A semiconductor device includes a gate terminal, at least one control terminal and first and second load terminals and at least one device cell. The at least one device cell includes a MOSFET device having a load path and a control terminal, the control terminal coupled to the gate terminal and a JFET device having a load path and a control terminal, the load path connected in series with the load path of the MOSFET device between the load terminals. The at least one device cell further includes a first coupling transistor having a load path and a control terminal, the load path coupled between the control terminal of the JFET device and one of the source terminal and the gate terminal, and the control terminal coupled to the at least one control terminal of the transistor device.

    摘要翻译: 半导体器件包括栅极端子,至少一个控制端子以及第一和第二负载端子以及至少一个器件单元。 所述至少一个器件单元包括具有负载路径和控制端子的MOSFET器件,所述控制端子耦合到所述栅极端子以及具有负载路径和控制端子的JFET器件,所述负载路径与所述负载路径串联连接 的MOSFET器件在负载端子之间。 所述至少一个器件单元还包括具有负载路径和控制端子的第一耦合晶体管,所述负载路径耦合在所述JFET器件的控制端子与所述源极端子和所述栅极端子之一之间,并且所述控制端子耦合到 晶体管器件的至少一个控制端子。

    Transistor with controllable compensation regions
    2.
    发明授权
    Transistor with controllable compensation regions 有权
    具有可控补偿区域的晶体管

    公开(公告)号:US08803205B2

    公开(公告)日:2014-08-12

    申请号:US13484490

    申请日:2012-05-31

    IPC分类号: H01L29/66

    摘要: A semiconductor device includes a gate terminal, at least one control terminal and first and second load terminals and at least one device cell. The at least one device cell includes a MOSFET device having a load path and a control terminal, the control terminal coupled to the gate terminal and a JFET device having a load path and a control terminal, the load path connected in series with the load path of the MOSFET device between the load terminals. The at least one device cell further includes a first coupling transistor having a load path and a control terminal, the load path coupled between the control terminal of the JFET device and one of the source terminal and the gate terminal, and the control terminal coupled to the at least one control terminal of the transistor device.

    摘要翻译: 半导体器件包括栅极端子,至少一个控制端子以及第一和第二负载端子以及至少一个器件单元。 所述至少一个器件单元包括具有负载路径和控制端子的MOSFET器件,所述控制端子耦合到所述栅极端子以及具有负载路径和控制端子的JFET器件,所述负载路径与所述负载路径串联连接 的MOSFET器件在负载端子之间。 所述至少一个器件单元还包括具有负载路径和控制端子的第一耦合晶体管,所述负载路径耦合在所述JFET器件的控制端子与所述源极端子和所述栅极端子之一之间,并且所述控制端子耦合到 晶体管器件的至少一个控制端子。

    HETEROJUNCTION SEMICONDUCTOR DEVICE AND METHOD
    3.
    发明申请
    HETEROJUNCTION SEMICONDUCTOR DEVICE AND METHOD 有权
    异相半导体器件和方法

    公开(公告)号:US20090085064A1

    公开(公告)日:2009-04-02

    申请号:US11862661

    申请日:2007-09-27

    IPC分类号: H01L29/778 H01L21/336

    摘要: A semiconductor device includes a first semiconductor substrate of a first band-gap material and a second semiconductor substrate of a second band-gap material. The second band-gap material has a lower band-gap than the first band-gap material. A heterojunction is formed between the first semiconductor substrate and the second semiconductor substrate substantially in a first plane. The semiconductor device further includes, in a cross-section which is perpendicular to the first plane, a first semiconductor region of a first conductivity type and a second semiconductor region of the first conductivity type both of which extend from the second semiconductor substrate at least partially into the first semiconductor substrate. The first and second semiconductor regions are spaced in the first semiconductor substrate from each other in a direction parallel to the first plane by a first distance which is arranged in an area proximate to the heterojunction and which is larger than a second distance which is arranged in an area distal to the heterojunction.

    摘要翻译: 半导体器件包括第一带隙材料的第一半导体衬底和第二带隙材料的第二半导体衬底。 第二带隙材料具有比第一带隙材料低的带隙。 基本上在第一平面中在第一半导体衬底和第二半导体衬底之间形成异质结。 所述半导体器件还包括垂直于所述第一平面的横截面,所述第一导电类型的第一半导体区域和所述第一导电类型的第二半导体区域从所述第二半导体衬底至少部分地延伸 进入第一半导体衬底。 第一和第二半导体区域在第一半导体衬底中沿平行于第一平面的方向彼此间隔开第一距离,第一距离布置在接近异质结的区域中,并且大于第二距离 远离异质结的区域。

    Heterojunction semiconductor device and method
    4.
    发明授权
    Heterojunction semiconductor device and method 有权
    异质结半导体器件及方法

    公开(公告)号:US08492771B2

    公开(公告)日:2013-07-23

    申请号:US11862661

    申请日:2007-09-27

    IPC分类号: H01L29/15 H01L31/0312

    摘要: A semiconductor device includes a first semiconductor substrate of a first band-gap material and a second semiconductor substrate of a second band-gap material. The second band-gap material has a lower band-gap than the first band-gap material. A heterojunction is formed between the first semiconductor substrate and the second semiconductor substrate substantially in a first plane. The semiconductor device further includes, in a cross-section which is perpendicular to the first plane, a first semiconductor region of a first conductivity type and a second semiconductor region of the first conductivity type both of which extend from the second semiconductor substrate at least partially into the first semiconductor substrate. The first and second semiconductor regions are spaced in the first semiconductor substrate from each other in a direction parallel to the first plane by a first distance which is arranged in an area proximate to the heterojunction and which is larger than a second distance which is arranged in an area distal to the heterojunction.

    摘要翻译: 半导体器件包括第一带隙材料的第一半导体衬底和第二带隙材料的第二半导体衬底。 第二带隙材料具有比第一带隙材料低的带隙。 基本上在第一平面中,在第一半导体衬底和第二半导体衬底之间形成异质结。 所述半导体器件还包括垂直于所述第一平面的横截面,所述第一导电类型的第一半导体区域和所述第一导电类型的第二半导体区域从所述第二半导体衬底至少部分地延伸 进入第一半导体衬底。 第一和第二半导体区域在第一半导体衬底中沿平行于第一平面的方向彼此间隔开第一距离,第一距离布置在接近异质结的区域中,并且大于第二距离 远离异质结的区域。

    Method for producing a semiconductor device with a semiconductor body
    7.
    发明授权
    Method for producing a semiconductor device with a semiconductor body 有权
    一种具有半导体本体的半导体器件的制造方法

    公开(公告)号:US08569150B2

    公开(公告)日:2013-10-29

    申请号:US13085196

    申请日:2011-04-12

    IPC分类号: H01L21/20 H01L21/38

    摘要: A semiconductor device with a semiconductor body and method for its production is disclosed. The semiconductor body includes drift zones of epitaxially grown semiconductor material of a first conduction type. The semiconductor body further includes charge compensation zones of a second conduction type complementing the first conduction type, which are arranged laterally adjacent to the drift zones. The charge compensation zones are provided with a laterally limited charge compensation zone doping, which is introduced into the epitaxially grown semiconductor material. The epitaxially grown semiconductor material includes 20 to 80 atomic % of the doping material of the drift zones and a doping material balance of 80 to 20 atomic % introduced by ion implantation and diffusion.

    摘要翻译: 公开了一种半导体器件及其制造方法。 半导体本体包括第一导电类型的外延生长的半导体材料的漂移区。 半导体本体还包括与第一导电类型相互补充的第二导电类型的电荷补偿区,它们被布置成横向邻近漂移区。 电荷补偿区带有横向有限的电荷补偿区掺杂,其被引入外延生长的半导体材料中。 外延生长的半导体材料包括漂移区的掺杂材料的20至80原子%和通过离子注入和扩散引入的80至20原子%的掺杂材料平衡。