METHOD FOR SELECTING CONTENT AND ELECTRONIC DEVICE THEREOF
    73.
    发明申请
    METHOD FOR SELECTING CONTENT AND ELECTRONIC DEVICE THEREOF 审中-公开
    选择内容的方法及其电子设备

    公开(公告)号:US20160196043A1

    公开(公告)日:2016-07-07

    申请号:US14982980

    申请日:2015-12-29

    Inventor: Taeyoung Kim

    Abstract: A method of operating an electronic device is provided. The method includes displaying checkboxes for respective content, sensing a touch start position and drag of the checkbox, sensing a touch release position of a checkbox of other content, and displaying a selection of content in checkboxes between the touch start position and the touch release position.

    Abstract translation: 提供一种操作电子设备的方法。 该方法包括显示相应内容的复选框,感测触摸开始位置和拖动复选框,感测其他内容的复选框的触摸释放位置,以及在触摸开始位置和触摸释放位置之间的复选框中显示内容选择 。

    SEMICONDUCTOR DEVICE AND ELECTRONIC SYSTEM HAVING THE SAME

    公开(公告)号:US20240397726A1

    公开(公告)日:2024-11-28

    申请号:US18655488

    申请日:2024-05-06

    Abstract: A semiconductor device includes a stacked structure including a plurality of gate lines and a plurality of insulation patterns that are alternately stacked in a vertical direction, where the stacked structure defines a vertical hole that extends into the stacked structure and in the vertical direction, a channel film that extends into a vertical hole, and a multiple dielectric layer structure between the channel film and the stacked structure, where the multiple dielectric layer structure includes a plurality of interlayer dielectric layers and a plurality of ferroelectric layers that are alternately stacked and extend from the channel film toward the stacked structure, and where an inner ferroelectric layer of the plurality of ferroelectric layers is thicker than an outer ferroelectric layer of the plurality of ferroelectric layers.

    SEMICONDUCTOR DEVICES
    76.
    发明公开

    公开(公告)号:US20230413557A1

    公开(公告)日:2023-12-21

    申请号:US18183903

    申请日:2023-03-14

    CPC classification number: H10B43/27 H10B41/27

    Abstract: A semiconductor device includes a source structure, a plurality of gate electrodes on the source structure. The plurality of gate electrodes are stacked and spaced apart from each other in a first direction and extend in a second direction perpendicular to the first direction, and a channel structure in a channel hole extends through the plurality of gate electrodes and in the first direction, the channel structure including a first dielectric layer on a sidewall of the channel hole, a second dielectric layer on the first dielectric layer opposite the sidewall of the channel hole, a channel layer on the second dielectric layer opposite the sidewall of the channel hole, and a filling insulating layer on the channel layer opposite the sidewall of the channel hole, and further including a channel pad layer in a region including an upper end of the channel hole, wherein the second dielectric layer includes a ferroelectric material, and wherein the channel pad layer is in contact with an internal side surface of the first dielectric layer and covers an upper surface of the second dielectric layer, an upper surface of the channel layer, and an upper surface of the filling insulating layer.

    Semiconductor device
    78.
    发明授权

    公开(公告)号:US11699703B2

    公开(公告)日:2023-07-11

    申请号:US17451688

    申请日:2021-10-21

    CPC classification number: H01L27/0886 H01L29/42392 H01L29/785 H01L29/78696

    Abstract: A semiconductor device includes an active pattern extending on a substrate in a first direction, divided into a plurality of regions by a separation region, and having a first edge portion exposed toward the separation region; first, second and third channel layers vertically separated and sequentially disposed on the active pattern; a first gate electrode extending in a second direction, intersecting the active pattern, and surrounding the first, second and third channel layers; source/drain regions disposed on the active pattern, on at least one side of the first gate electrode, and contacting the first, second and third channel layers; a semiconductor structure including first semiconductor layers and second semiconductor layers alternately stacked on the active pattern, and having a second edge portion exposed toward the separation region; and a blocking layer covering at least one of an upper surface, side surfaces, or the second edge portion, of the semiconductor structure.

    Method and device for removing phase noise in wireless communication system

    公开(公告)号:US11677522B2

    公开(公告)日:2023-06-13

    申请号:US16644041

    申请日:2018-09-11

    CPC classification number: H04L5/0048 H04L5/0023 H04L27/2613

    Abstract: The present disclosure relates to a pre-5th-Generation (5G) or 5G communication system to be provided for supporting higher data rates Beyond 4th-Generation (4G) communication system such as Long Term Evolution (LTE). According to various embodiments of the present disclosure, an operating method of a base station includes determining at least one sub-carrier for allocating a phase tracking reference signal (PTRS), transmitting information relating to the PTRS allocation to a terminal, and based on the information, transmitting the PTRS to the terminal through the at least one sub-carrier. An apparatus and a method according to various embodiments of the present disclosure, may determine a sub-carrier for PTRS allocation and provide information relating to the PTRS allocation to a terminal, thus controlling PTRS interference caused from neighboring base stations and improving PTRS tracking performance.

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