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71.
公开(公告)号:US20240243156A1
公开(公告)日:2024-07-18
申请号:US18155096
申请日:2023-01-17
发明人: Tsung Hsien Tsai , Cheng Yu Huang , Jen-Cheng Liu , Keng-Yu Chou , Ming-En Chen , Shyh-Fann Ting
IPC分类号: H01L27/146
CPC分类号: H01L27/1464 , H01L27/14636 , H01L27/14685
摘要: A process of forming a back side deep trench isolation structure for an image sensing device includes etching first trenches in the back side of a semiconductor substrate, lining the first trenches with dielectric, depositing passivation layers over and within the first trenches, and etching second trenches through the passivation layers into the first trenches, and filling the second trenches to form a substrate-embedded metal grid. Optionally, the bottoms of the first trenches are filled by depositing and etching a lower fill material prior to depositing the passivation layers. The method prevents the passivation layers from pinching off in a way that causes voids within the first trenches. The result is better optical performance such as increased quantum efficiency and reduced crosstalk.
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公开(公告)号:US20240021514A1
公开(公告)日:2024-01-18
申请号:US18358285
申请日:2023-07-25
发明人: Min-Feng Kao , Dun-Nian Yaung , Jen-Cheng Liu , Hsing-Chih Lin , Kuan-Hua Lin
IPC分类号: H01L23/522
CPC分类号: H01L23/5223 , H01L28/91 , H01L28/87
摘要: Various embodiments of the present disclosure are directed towards an integrated chip (IC). The IC includes a first inter-metal dielectric (IMD) structure disposed over a semiconductor substrate. A metal-insulator-metal (MIM) device is disposed over the first IMD structure. The MIM device includes at least three metal plates that are spaced from one another. The MIM device further includes a plurality of capacitor insulator structures. Each of the plurality of capacitor insulator structures are disposed between and electrically isolate neighboring metal plates of the at least three metal plates.
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公开(公告)号:US20230361005A1
公开(公告)日:2023-11-09
申请号:US18355463
申请日:2023-07-20
发明人: Min-Feng Kao , Dun-Nian Yaung , Hsing-Chih Lin , Jen-Cheng Liu , Yi-Shin Chu , Ping-Tzu Chen
IPC分类号: H01L23/48 , H01L25/065 , H01L23/00 , H01L21/768 , H01L25/00
CPC分类号: H01L23/481 , H01L25/0657 , H01L24/08 , H01L21/76898 , H01L24/80 , H01L25/50 , H01L2224/80896 , H01L2225/06524 , H01L2225/06544 , H01L2224/08145 , H01L2224/80895
摘要: The present disclosure, in some embodiments, relates to an integrated chip structure. The integrated chip structure includes a first via disposed within a dielectric structure on a substrate, and a second via disposed within the dielectric structure and laterally separated from the first via by the dielectric structure. The first via has a first width that is smaller than a second width of the second via. An interconnect wire vertically contacts the second via and extends laterally past an outermost sidewall of the second via. A through-substrate via (TSV) is arranged over the second via and extends through the substrate. The TSV has a minimum width that is smaller than the second width of the second via. The second via has opposing outermost sidewalls that are laterally outside of the TSV.
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公开(公告)号:US20230352508A1
公开(公告)日:2023-11-02
申请号:US17892820
申请日:2022-08-22
IPC分类号: H01L27/146
CPC分类号: H01L27/1463 , H01L27/14645 , H01L27/14621 , H01L27/14623 , H01L27/14627 , H01L27/1464 , H01L27/14689
摘要: Image sensors and processes of forming the same are provided. An image sensor according to the present disclosure includes a first photodiode disposed between a second photodiode and a third photodiode along a direction, a first deep trench isolation (DTI) feature disposed between the first photodiode and the second photodiode, and a second DTI feature disposed between the first photodiode and the third photodiode. A depth of the first DTI feature is greater than a depth of the second DTI feature. A quantum efficiency of the second photodiode is smaller than a quantum efficiency of the first photodiode.
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公开(公告)号:US20230307479A1
公开(公告)日:2023-09-28
申请号:US17832905
申请日:2022-06-06
发明人: Yen-Yu Chen , Yen-Ting Chiang , Bai-Tao Huang , Tse-Hua Lu , Tzu-Hsuan Hsu , Shyh-Fann Ting , Jen-Cheng Liu , Dun-Nian Yaung
IPC分类号: H01L27/146
CPC分类号: H01L27/1463 , H01L27/14603 , H01L27/14643 , H01L27/14636 , H01L27/14689
摘要: Various embodiments of the present disclosure are directed towards an image sensor. The image sensor includes a substrate having a first side and a second side. The substrate includes a pixel region. A photodetector is in the pixel region. A first doped region is in the pixel region. A second doped region is in the pixel region. The second doped region is vertically between the first doped region and the first side of the substrate. A doped well is in the substrate and laterally surrounds the pixel region. The doped well is partially in the second doped region. A portion of the second doped region is vertically between the doped well and the second side of the substrate. A trench isolation structure is in the semiconductor substrate and laterally surrounds the pixel region. A footprint of the trench isolation structure is within a footprint of the doped well.
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公开(公告)号:US11764129B2
公开(公告)日:2023-09-19
申请号:US17355534
申请日:2021-06-23
发明人: Min-Feng Kao , Dun-Nian Yaung , Hsing-Chih Lin , Jen-Cheng Liu , Wei-Tao Tsai
IPC分类号: H01L23/552 , H01L23/48 , H01L25/065 , H01L21/762 , H01L25/00 , H01L27/02 , H01L21/3065 , H01L21/761 , H01L21/768 , H01L23/60 , H01L23/528 , H01L29/66 , H01L23/00 , H01L29/06 , H01L29/78 , H01L23/522
CPC分类号: H01L23/481 , H01L21/3065 , H01L21/761 , H01L21/76224 , H01L21/76898 , H01L23/60 , H01L25/0657 , H01L25/50 , H01L27/0255 , H01L27/0296 , H01L23/5226 , H01L23/5283 , H01L24/05 , H01L24/08 , H01L24/80 , H01L29/0653 , H01L29/66689 , H01L29/7816 , H01L2224/05571 , H01L2224/08147 , H01L2224/80357 , H01L2224/80895 , H01L2224/80896 , H01L2225/06544
摘要: Various embodiments of the present application are directed towards an integrated circuit (IC) in which a shield structure blocks the migration of charge to a semiconductor device from proximate a through substrate via (TSV). In some embodiments, the IC comprises a substrate, an interconnect structure, the semiconductor device, the TSV, and the shield structure. The interconnect structure is on a frontside of the substrate and comprises a wire. The semiconductor device is on the frontside of the substrate, between the substrate and the interconnect structure. The TSV extends completely through the substrate, from a backside of the substrate to the wire, and comprises metal. The shield structure comprises a PN junction extending completely through the substrate and directly between the semiconductor device and the TSV.
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公开(公告)号:US20230109829A1
公开(公告)日:2023-04-13
申请号:US18078455
申请日:2022-12-09
发明人: Seiji Takahashi , Chen-Jong Wang , Dun-Nian Yaung , Feng-Chi Hung , Feng-Jia Shiu , Jen-Cheng Liu , Jhy-Jyi Sze , Chun-Wei Chang , Wei-Cheng Hsu , Wei Chuang Wu , Yimin Huang
IPC分类号: H01L27/146
摘要: In some embodiments, the present disclosure relates to method for forming an image sensor integrated chip. The method includes forming a first photodetector region in a substrate and forming a second photodetector region in the substrate. A floating diffusion node is formed in the substrate between the first photodetector region and the second photodetector region. A pick-up well contact region is formed in the substrate. A first line intersects the floating diffusion node and the pick-up well contact region. One or more transistor gates are formed on the substrate. A second line that is perpendicular to the first line intersects the pick-up well contact region and the one or more transistor gates.
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78.
公开(公告)号:US20220367537A1
公开(公告)日:2022-11-17
申请号:US17867760
申请日:2022-07-19
发明人: Feng-Chi Hung , Dun-Nian Yaung , Jen-Cheng Liu , Wei Chuang Wu , Yen-Yu Chen , Chih-Kuan Yu
IPC分类号: H01L27/146
摘要: Some embodiments are directed towards an image sensor device. A photodetector is disposed in a semiconductor substrate, and a transfer transistor is disposed over photodetector. The transfer transistor includes a transfer gate having a lateral portion extending over a frontside of the semiconductor substrate and a vertical portion extending to a first depth below the frontside of the semiconductor substrate. A gate dielectric separates the lateral portion and the vertical portion from the semiconductor substrate. A backside trench isolation structure extends from a backside of the semiconductor substrate to a second depth below the frontside of the semiconductor substrate. The backside trench isolation structure laterally surrounds the photodetector, and the second depth is less than the first depth such that a lowermost portion of the vertical portion of the transfer transistor has a vertical overlap with an uppermost portion of the backside trench isolation structure.
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公开(公告)号:US11456176B2
公开(公告)日:2022-09-27
申请号:US16685480
申请日:2019-11-15
发明人: Min-Feng Kao , Szu-Ying Chen , Dun-Nian Yaung , Jen-Cheng Liu , Tzu-Hsuan Hsu , Feng-Chi Hung
IPC分类号: H01L29/02 , H01L21/265 , H01L21/762 , H01L21/28 , H01L29/423 , H01L23/544 , H01L29/66 , H01L29/78 , H01L27/146
摘要: A device includes a semiconductor substrate, a gate dielectric over the semiconductor substrate, and a gate electrode over the gate dielectric. The gate electrode has a first portion having a first thickness, and a second portion having a second thickness smaller than the first thickness. The device further includes a source/drain region on a side of the gate electrode with the source/drain region extending into the semiconductor substrate, and a device isolation region. The device isolation region has a part having a sidewall contacting a second sidewall of the source/drain region to form an interface. The interface is overlapped by a joining line of the first portion and the second portion of the gate electrode.
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公开(公告)号:US11387167B2
公开(公告)日:2022-07-12
申请号:US16920430
申请日:2020-07-03
发明人: Min-Feng Kao , Dun-Nian Yaung , Jen-Cheng Liu , Ching-Chun Wang , Kuan-Chieh Huang , Hsing-Chih Lin , Yi-Shin Chu
IPC分类号: H01L23/52 , H01L23/48 , H01L21/48 , H01L21/02 , H01L23/522 , H01L21/768
摘要: Present disclosure provides a semiconductor structure, including a semiconductor substrate, a first metal layer, and a through substrate via (TSV). The semiconductor substrate has an active side. The first metal layer is closest to the active side of the semiconductor substrate, and the first metal layer has a first continuous metal feature. The TSV is extending from the semiconductor substrate to the first continuous metal feature. A width of the TSV at the first metal layer is wider than a width of the first continuous metal feature. Present disclosure also provides a method for manufacturing the semiconductor structure described herein.
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