公开(公告)号：US20100257426A1

公开(公告)日：2010-10-07

申请号：US12743720

申请日：2008-11-26

申请人： Takashi Yokokawa ,  Makiko Yamamoto

发明人： Takashi Yokokawa ,  Makiko Yamamoto

IPC分类号： H03M13/05

CPC分类号： H03M13/1165 ,  H03M13/1137 ,  H03M13/1185 ,  H03M13/255 ,  H03M13/2703 ,  H03M13/2707 ,  H03M13/271 ,  H03M13/6552 ,  H04L1/0057 ,  H04L1/0071

摘要： The present invention relates to a data processing apparatus and a data processing apparatus which can improve the tolerance to an error of a code bit of an LDPC code such as burst errors or erasure. An LDPC encoding section 21 carries out LDPC encoding in accordance with a parity check matrix in which a parity matrix which is a portion corresponding to parity bits of an LDPC (Low Density Parity Check) code has a staircase structure, and outputs an LDPC code. A parity interleaver 23 carries out parity interleave of interleaving the parity bits of the LDPC code outputted from the LDPC encoding section 21 to the positions of other parity bits. The present invention can be applied, for example, to a transmission apparatus which transmits an LDPC code.

摘要翻译： 数据处理装置和数据处理装置技术领域本发明涉及一种数据处理装置和数据处理装置，其可以提高对诸如突发错误或擦除的LDPC码的码位的误差的容限。 LDPC编码部分21根据奇偶校验矩阵执行LDPC编码，其中作为与LDPC（低密度奇偶校验）码的奇偶校验位对应的部分的奇偶校验矩阵具有阶梯结构，并输出LDPC码。 奇偶交织器23执行将从LDPC编码部分21输出的LDPC码的奇偶校验位交织到其他奇偶校验位的位置的奇偶交织。 本发明可以应用于例如发送LDPC码的发送装置。

公开(公告)号：US20100080316A1

公开(公告)日：2010-04-01

申请号：US12568783

申请日：2009-09-29

申请人： Masayuki HATTORI ,  Takashi Yokokawa ,  Hidetoshi Kawauchi ,  Hiroyuki Kamata ,  Ryoji Ikegaya

发明人： Masayuki HATTORI ,  Takashi Yokokawa ,  Hidetoshi Kawauchi ,  Hiroyuki Kamata ,  Ryoji Ikegaya

IPC分类号： H04L12/26 ,  H04B7/02

CPC分类号： H04L27/2656 ,  H04L27/2665

摘要： Disclosed herein is an information processing apparatus including: a demodulation FFT processing section configured to carry out an FFT process on a demodulation-related signal extracted by making use of a demodulation FFT window from every symbol of a received OFDM signal and output the frequency-domain signal; a control FFT processing section configured to carry out a process equivalent to an FFT process on a control-related signal extracted by making use of a control FFT window from every symbol of the received OFDM signal and output the frequency-domain signal; a transmission-line information estimation section; an equalization section; a reception-quality computation/comparison section; and an FFT-window position control section configured to control the demodulation FFT window to be used by the demodulation FFT processing section and the control FFT window to be used by the control FFT processing section on the basis of a comparison result produced by the reception-quality computation/comparison section.

摘要翻译： 这里公开了一种信息处理装置，包括：解调FFT处理部，被配置为对通过使用来自接收的OFDM信号的每个符号的解调FFT窗口提取的解调相关信号执行FFT处理，并输出频域 信号; 控制FFT处理部，被配置为执行与通过利用来自所接收的OFDM信号的每个符号的控制FFT窗口提取的控制相关信号上的FFT处理相当的处理，并输出频域信号; 传输线信息估计部; 均衡部分 接收质量计算/比较部分; FFT窗口位置控制部分，被配置为基于由接收模式产生的比较结果来控制由解调FFT处理部分使用的解调FFT窗口和要由控制FFT处理部件使用的控制FFT窗口， 质量计算/比较部分。

公开(公告)号：US20100074382A1

公开(公告)日：2010-03-25

申请号：US12562469

申请日：2009-09-18

申请人： Toshiyuki MIYAUCHI ,  Takashi Yokokawa ,  Takuya Okamoto

发明人： Toshiyuki MIYAUCHI ,  Takashi Yokokawa ,  Takuya Okamoto

IPC分类号： H04L1/02

CPC分类号： H04L25/03159 ,  H04L5/0048 ,  H04L25/0216 ,  H04L25/0232 ,  H04L27/2607 ,  H04L27/2647

摘要： A receiving device includes a pilot signal extractor, an estimator, an interpolator, a distortion corrector, a calculator, and a determiner.

摘要翻译： 接收装置包括导频信号提取器，估计器，内插器，失真校正器，计算器和确定器。

公开(公告)号：US20090125780A1

公开(公告)日：2009-05-14

申请号：US12260327

申请日：2008-10-29

申请人： Matthew Paul Athol Taylor ,  Samuel Asanbeng Atungsiri ,  Takashi Yokokawa ,  Makiko Yamamoto

发明人： Matthew Paul Athol Taylor ,  Samuel Asanbeng Atungsiri ,  Takashi Yokokawa ,  Makiko Yamamoto

IPC分类号： H03M13/00 ,  H04L27/28 ,  G06F11/00

CPC分类号： H03M13/1168 ,  H03M13/1137 ,  H03M13/1148 ,  H03M13/116 ,  H03M13/1165 ,  H03M13/1185 ,  H03M13/15 ,  H03M13/152 ,  H03M13/255 ,  H03M13/2707 ,  H03M13/271 ,  H03M13/2906 ,  H04L1/0057 ,  H04L1/0071 ,  H04L5/0007 ,  H04L5/0044 ,  H04L5/0064 ,  H04L27/2626 ,  H04L27/2647 ,  H04L27/34

摘要： A data processing apparatus communicates data bits on a predetermined number of sub-carrier signals of an Orthogonal Frequency Division Multiplexed (OFDM) symbol. The data processing apparatus comprises a parity interleaver operable to perform parity interleaving on Low Density Parity Check (LDPC) encoded data bits obtained by performing LDPC encoding according to a parity check matrix of an LDPC code including a parity matrix corresponding to parity bits of the LDPC code, the parity matrix having a stepwise structure, so that a parity bit of the LDPC encoded data bits is interleaved to a different parity bit position. A mapping unit maps the parity interleaved bits onto data symbols corresponding to modulation symbols of a modulation scheme of the OFDM sub-carrier signals. A symbol interleaver is arranged in operation to read-into a symbol interleaver memory the predetermined number of data symbols for mapping onto the OFDM sub-carrier signals, and to read-out of the interleaver memory the data symbols for the OFDM sub-carriers to effect the mapping, the read-out being in a different order than the read-in, the order being determined from a set of addresses, with the effect that the data symbols are interleaved on the sub-carrier signals. The set of addresses are generated by an address generator which has been optimised to interleave the data symbols on to the sub-carrier signals of the OFDM carrier signals for a given operating mode of the OFDM system, such as a 32K operating mode for DVB-T2 or DVB-C2.

摘要翻译： 数据处理装置在正交频分复用（OFDM）符号的预定数量的副载波信号上传送数据位。 数据处理装置包括奇偶校验交织器，其可操作以对通过执行LDPC编码而获得的低密度奇偶校验（LDPC）编码数据比特进行奇偶校验交织，所述LDPC编码数据比特根据LDPC码的奇偶校验矩阵，该LDPC码包括与LDPC码奇偶校验位对应的奇偶校验矩阵 代码，奇偶校验矩阵具有逐步结构，使得LDPC编码数据位的奇偶校验位被交织到不同的奇偶校验位位置。 映射单元将奇偶交织的比特映射到对应于OFDM子载波信号的调制方案的调制符号的数据符号上。 在操作中布置符号交织器以将符号交织器存储器读取用于映射到OFDM子载波信号上的预定数量的数据符号，并且将交织器存储器中的OFDM子载波的数据符号读出到 影响映射，读出的顺序与读入的顺序不同，顺序是从一组地址确定的，其效果是数据符号被交错在子载波信号上。 该地址集由地址发生器产生，该地址发生器已被优化以便在OFDM系统的给定操作模式下将数据符号交织到OFDM载波信号的子载波信号上，诸如用于DVB- T2或DVB-C2。

公开(公告)号：US07051270B2

公开(公告)日：2006-05-23

申请号：US10110670

申请日：2001-08-20

申请人： Toshiyuki Miyauchi ,  Masayuki Hattori ,  Kouhei Yamamoto ,  Takashi Yokokawa

发明人： Toshiyuki Miyauchi ,  Masayuki Hattori ,  Kouhei Yamamoto ,  Takashi Yokokawa

IPC分类号： H03M13/03 ,  H03M13/00

CPC分类号： H03M13/3905 ,  H03M13/258 ,  H03M13/27 ,  H03M13/29 ,  H03M13/2957 ,  H03M13/2972 ,  H03M13/6337 ,  H03M13/6577 ,  H03M13/658

摘要： A decoder that receives, as input, probability information AMP/CR×yt. This probability information is obtained by dividing a channel value obtained by multiplication of received value yt and a predetermined coefficient AMP by the first additive coefficient CR for regulating the amplitude of the received value yt and the probability information 1/CA×APPt obtained by multiplying the a priori probability information APPt by the reciprocal of the second additive coefficient CA for regulating the amplitude of the a priori probability information APPt to a soft-output decoding circuit. The soft-output decoding circuit, which may be a large scale intergrated circuit, generates log soft-output CI×Iλt and/or external information 1/CA×EXt using additive coefficients for regulating the amplitude of arithmetic operations in the inside of the soft-output decoding circuit.

摘要翻译： 接收作为输入的概率信息的解码器。 该概率信息是通过将通过接收值y T 与预定系数AMP乘以获得的信道值除以第一加法系数C SUB来获得的，以用于调节 通过将先验概率信息APP＆lt; T＆gt;＆lt;＆gt;＆lt; T＆gt;获得的概率信息1 / C A xAPP＆lt; SUB>通过第二加法系数C A A A的倒数，用于将先验概率信息APP 的振幅调整到软输出解码电路。 可以是大规模集成电路的软输出解码电路生成日志软输出C 1和/或外部信息1 / C＆lt; 使用用于调节软输出解码电路内部的算术运算幅度的加法系数的XEXT。

公开(公告)号：US20050278604A1

公开(公告)日：2005-12-15

申请号：US10521191

申请日：2004-04-19

申请人： Takashi Yokokawa ,  Makiko Kan ,  Yasuhiro Iida ,  Atsushi Kikuchi

发明人： Takashi Yokokawa ,  Makiko Kan ,  Yasuhiro Iida ,  Atsushi Kikuchi

IPC分类号： H03M13/19 ,  H03M13/11 ,  H03M13/00

CPC分类号： H03M13/616 ,  H03M13/1134 ,  H03M13/116 ,  H03M13/1168 ,  H03M13/1185 ,  H03M13/1188 ,  H03M13/6566 ,  H03M13/6577

摘要： The present invention relates to a decoding method and a decoding apparatus in which, while the circuit scale is suppressed, the operating frequency can be suppressed within a sufficiently feasible range, and control of memory access can be performed easily, and to a program therefor. By using a transformation check matrix obtained by performing one of or both a row permutation and a column permutation on an original check matrix of LDPC (Low Density Parity Check) codes, the LDPC codes are decoded. In this case, by using, as a formation matrix, a P×P unit matrix, a quasi-unit matrix in which one or more is, which are elements of the unit matrix, are substituted with 0, a shift matrix in which the unit matrix or the quasi-unit matrix is cyclically shifted, a sum matrix, which is the sum of two or more of the unit matrix, the quasi-unit matrix, and the shift matrix, and a P×P 0-matrix, the transformation check matrix is represented by a combination of a plurality of the formation matrices. A check node calculator 302 simultaneously performs p check node calculations. A variable node calculator 304 simultaneously performs p variable node calculations.

摘要翻译： 解码方法和解码装置技术领域本发明涉及一种解码方法和解码装置，其中在抑制电路规模的同时，可以在足够可行的范围内抑制工作频率，并且可以容易地执行存储器存取的控制，并提供给其程序。 通过使用通过对LDPC（低密度奇偶校验）码的原始校验矩阵执行行排列和列置换中的一个或两者而获得的变换校验矩阵，对LDPC码进行解码。 在这种情况下，通过使用PxP单位矩阵，其中一个或多个是单位矩阵的元素的准单位矩阵被替换为0，其中单位矩阵 或准单位矩阵循环移位，作为单位矩阵，准单位矩阵和移位矩阵中的两个以上的和的和矩阵，以及PxP 0矩阵，变换检查矩阵为 由多个形成矩阵的组合表示。 校验节点计算器302同时执行p校验节点计算。 可变节点计算器304同时执行p个可变节点计算。

公开(公告)号：US08774286B2

公开(公告)日：2014-07-08

申请号：US12851796

申请日：2010-08-06

申请人： Takashi Yokokawa ,  Satoshi Okada

发明人： Takashi Yokokawa ,  Satoshi Okada

IPC分类号： H04N5/44 ,  H04L27/00

CPC分类号： H04N21/4344 ,  H04N21/4345 ,  H04N21/4346 ,  H04N21/4347 ,  H04N21/6112

摘要： A receiving apparatus includes a buffer configured to store packets of a first packet sequence made up of packets extracted from one transport stream that are common to packets of another transport stream and packets of a second packet sequence made up of common packets, a read control section configured to read the packets of the first packet sequence and the second packet sequence stored in the buffer after the passing of a predetermined time after synchronization is established between the packets of the first packet sequence and the packets of the second packet sequence, thereby reconstructing one transport stream from the first packet sequence and the second packet sequence, and an output section configured to output the reconstructed transport stream.

摘要翻译： 接收装置包括：缓冲器，被配置为存储由从一个传输流提取的分组构成的第一分组序列的分组，所述分组对于另一个传输流的分组是公共的，以及由公共分组组成的第二分组序列的分组;读取控制部分 被配置为在第一分组序列的分组与第二分组序列的分组之间建立同步之后经过预定时间之后，读取存储在缓冲器中的第一分组序列和第二分组序列的分组，从而重新构建一个 从第一分组序列和第二分组序列传输流，以及输出部分，被配置为输出重构的传输流。

公开(公告)号：US08751908B2

公开(公告)日：2014-06-10

申请号：US13235794

申请日：2011-09-19

申请人： Takashi Yokokawa ,  Yutaka Nakada ,  Ryoji Ikegaya

发明人： Takashi Yokokawa ,  Yutaka Nakada ,  Ryoji Ikegaya

IPC分类号： H03M13/00

CPC分类号： H03M13/1105 ,  H03M13/11 ,  H03M13/1102 ,  H03M13/1128 ,  H03M13/3753 ,  H03M13/65 ,  H03M13/6552 ,  H03M13/6555

摘要： Disclosed herein is a decoding device including: an extracting section, a storing section, an allocating section, and a decoding section. The extracting section acquires data containing plural code words and information other than the plural code words in one frame, and extracts the plural code words from the data every one code word. The storing section at least stores the one code word extracted by the extracting section. The allocating section sets time obtained by dividing time for the one frame by the number of code words contained in the one frame as time allocated to decoding of one code word. The decoding section decodes the code word within the time allocated by the allocating section.

摘要翻译： 这里公开了一种解码装置，包括：提取部分，存储部分，分配部分和解码部分。 提取部分在一帧中获取包含多个码字和除了多个码字之外的信息的数据，并且每个码字从数据中提取多个码字。 存储部至少存储由提取部提取的一个码字。 分配部分将通过将一帧的时间除以包含在一帧中的码字的数目获得的时间作为分配给一个码字的解码的时间。 解码部分在由分配部分分配的时间内对码字进行解码。

公开(公告)号：US20140016728A1

公开(公告)日：2014-01-16

申请号：US14006799

申请日：2012-03-23

申请人： Takashi Yokokawa ,  Naoki Yoshimochi ,  Hitoshi Sakai

发明人： Takashi Yokokawa ,  Naoki Yoshimochi ,  Hitoshi Sakai

IPC分类号： H04L27/26

CPC分类号： H04L27/2649 ,  H04N21/4263

摘要： The present technique relates to a reception apparatus, a reception method, a program, and a reception system capable of starting decoding of data in a short time. A reception apparatus according to an aspect of the present technique includes a demodulation unit configured to demodulate a modulated signal used to transmit transmission control information about data and the data to be transmitted, a first decoding unit configured to decode the transmission control information obtained by demodulation performed with the demodulation unit, a storage unit configured to store the data obtained by demodulation performed with the demodulation unit, and a second decoding unit configured to decode the data stored in the storage unit on the basis of the transmission control information decoded by the first decoding unit. The present technique can be applied to a receiver receiving an OFDM signal of DVB-C2.

摘要翻译： 本技术涉及能够在短时间内开始数据解码的接收装置，接收方法，程序和接收系统。 根据本技术的一个方面的接收装置包括解调单元，被配置为对用于发送关于数据的发送控制信息和要发送的数据的调制信号进行解调;第一解码单元，被配置为对通过解调获得的发送控制信息进行解码 用解调单元执行的存储单元，存储单元，被配置为存储通过用解调单元执行的解调获得的数据;以及第二解码单元，被配置为基于由第一个解码单元解码的传输控制信息来解码存储在存储单元中的数据 解码单元。 本技术可以应用于接收DVB-C2的OFDM信号的接收机。

公开(公告)号：US08520754B2

公开(公告)日：2013-08-27

申请号：US12958729

申请日：2010-12-02

申请人： Takashi Yokokawa ,  Satoshi Okada ,  Tomoharu Honda

发明人： Takashi Yokokawa ,  Satoshi Okada ,  Tomoharu Honda

IPC分类号： H04K1/10

CPC分类号： H04L27/2656 ,  H04H60/11 ,  H04L27/2602 ,  H04L27/2666 ,  H04N21/4382 ,  H04N21/6112

摘要： Disclosed herein is a reception apparatus, including: a reception section adapted to receive an OFDM (Orthogonal Frequency Division Multiplexing) signal obtained by modulating a first frame configured so as to include packets of a common packet sequence configured from a packet common to a plurality of streams and a second frame configured so as to include packets of a data packet sequence configured from packets individually unique to the plural streams; an acquisition section adapted to acquire specification information for specifying a combination of a first frame and a second frame obtained by demodulating the received OFDM signal; and a detection section adapted to detect a combination of a packet of the common packet sequence which configures the first frame and a packet of the data packet sequence which configures the second frame, whose combination is specified based on the acquired specification information.

摘要翻译： 这里公开了一种接收装置，包括：接收部分，适于接收通过调制第一帧而获得的OFDM（正交频分复用）信号，所述第一帧被配置为包括由公共数据包共同配置的公共分组序列的分组 流和第二帧，其被配置为包括由对于多个流单独唯一的分组配置的数据分组序列的分组; 获取部分，适于获取用于指定通过解调所接收的OFDM信号而获得的第一帧和第二帧的组合的指定信息; 以及检测部，其适于检测构成所述第一帧的公共分组序列的分组与构成所述第二帧的所述数据分组序列的分组的组合，所述组合基于所获取的规格信息来指定。