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公开(公告)号:US11949004B2
公开(公告)日:2024-04-02
申请号:US17533882
申请日:2021-11-23
Applicant: GLOBALFOUNDRIES U.S. Inc.
Inventor: Judson R. Holt , Vibhor Jain , Alexander M. Derrickson
IPC: H01L29/739 , H01L29/06 , H01L29/66
CPC classification number: H01L29/7393 , H01L29/0649 , H01L29/66325
Abstract: The present disclosure relates to semiconductor structures and, more particularly, to a lateral bipolar transistor and methods of manufacture. The structure includes: an extrinsic base region; an emitter region on a first side of the extrinsic base region; a collector region on a second side of the extrinsic base region; and a gate structure comprising a gate oxide and a gate control in a same channel region as the extrinsic base region.
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公开(公告)号:US20240103237A1
公开(公告)日:2024-03-28
申请号:US17933199
申请日:2022-09-19
Applicant: GlobalFoundries U.S. Inc.
Inventor: Zhuojie Wu , Seungman Choi
IPC: G02B6/42
CPC classification number: G02B6/423 , G02B6/4206 , G02B6/424 , G02B6/4274
Abstract: A photonic integrated circuit (PIC) structure includes a substrate, and a cavity defined in the substrate, the cavity including a shoulder at a side of the cavity. A plurality of z-stop supports for an optical device are also included. Each z-stop support of the plurality of z-stop supports is on a support portion of the shoulder. A wire extends over the side of the cavity and between at least two z-stop supports of the plurality of z-stop supports. An optical device is positioned on the plurality of z-stop supports in the cavity and electrically coupled to the wire. Electrical connections between z-stop supports allows larger sized electrical connections to the optical device to mitigate electromigration issues, and increased options for electrical connections.
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公开(公告)号:US11942423B2
公开(公告)日:2024-03-26
申请号:US17343101
申请日:2021-06-09
Applicant: GLOBALFOUNDRIES U.S. Inc.
Inventor: Venkata Narayana Rao Vanukuru , Zhong-Xiang He
IPC: H01L23/522 , H01F17/00 , H01F41/04 , H01L23/528
CPC classification number: H01L23/5227 , H01F17/0013 , H01F41/041 , H01L23/5283
Abstract: The present disclosure relates to semiconductor structures and, more particularly, to series inductors and methods of manufacture. A structure includes a plurality of wiring levels each of which include a wiring structure connected in series to one another. A second wiring level being located above a first wiring level of the plurality of wiring levels. A wiring structure on the second wiring level being at least partially outside boundaries of the wiring structure of the first wiring level.
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公开(公告)号:US11942325B2
公开(公告)日:2024-03-26
申请号:US17647195
申请日:2022-01-06
Applicant: GlobalFoundries U.S. Inc.
Inventor: Ketankumar Harishbhai Tailor
IPC: H01L27/06 , H01L21/02 , H01L21/266 , H01L21/3215 , H01L29/66
CPC classification number: H01L21/266 , H01L21/0257 , H01L21/3215 , H01L27/0617 , H01L29/66803
Abstract: A transistor structure is disclosed. The transistor structure includes a dielectric layer that has a thinner portion over a first doped well and a second doped well, and a thicker portion adjacent the thinner portion and over the second doped well. The thicker portion has a height greater than the thinner portion above the doped wells. The transistor includes a first gate structure on the thinner portion and a second gate structure on the thicker portion of the dielectric layer. The transistor may include a third gate structure on the thicker portion.
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公开(公告)号:US11935946B2
公开(公告)日:2024-03-19
申请号:US17849867
申请日:2022-06-27
Applicant: GlobalFoundries U.S. Inc.
Inventor: Shesh Mani Pandey , Souvick Mitra , Anindya Nath
IPC: H01L29/745 , H01L29/66
CPC classification number: H01L29/7455 , H01L29/66363
Abstract: Structures for a silicon-controlled rectifier and methods of forming a structure for a silicon-controlled rectifier. The structure comprises a semiconductor substrate, a dielectric layer on the semiconductor substrate, and a first well and a second well in the semiconductor substrate beneath the dielectric layer. The first well has a first conductivity type, the second well has a second conductivity type opposite to the first conductivity type, and the second well adjoins the first well along a p-n junction. The structure further comprises a first terminal and a second terminal above the dielectric layer, a first connection extending through the dielectric layer from the first terminal to the first well, and a second connection extending through the dielectric layer from the second terminal to the second well.
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公开(公告)号:US11935927B2
公开(公告)日:2024-03-19
申请号:US17684321
申请日:2022-03-01
Applicant: GLOBALFOUNDRIES U.S. Inc.
Inventor: Hong Yu , Vibhor Jain
IPC: H01L29/417 , H01L29/08 , H01L29/10 , H01L29/66 , H01L29/735 , H01L29/737
CPC classification number: H01L29/41708 , H01L29/0821 , H01L29/1008 , H01L29/66242 , H01L29/735 , H01L29/737 , H01L29/0808 , H01L29/0817
Abstract: The present disclosure relates to semiconductor structures and, more particularly, to a bipolar transistor with a collector contact and methods of manufacture. The structure includes: a lateral bipolar transistor which includes an emitter, a base and a collector; an emitter contact to the emitter; a base contact to the base; and a collector contact to the collector and extending to an underlying substrate underneath the collector.
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公开(公告)号:US20240085626A1
公开(公告)日:2024-03-14
申请号:US17941055
申请日:2022-09-09
Applicant: GlobalFoundries U.S. Inc.
Inventor: Yusheng Bian
CPC classification number: G02B6/126 , G02B6/1228 , G02B6/13 , G02B2006/12061
Abstract: Structures for a polarization rotator and methods of forming a structure for a polarization rotator. The structure comprises a first waveguide core having a first section, a second section, a first terminating end, and a second terminating end opposite to the first terminating end. The first and second sections of the first waveguide core are arranged between the first terminating end and the second terminating end. The structure further comprises a second waveguide core including a first tapered section having a first overlapping arrangement with the first section of the first waveguide core and a second tapered section having a second overlapping arrangement with the second section of the first waveguide core. The first waveguide core comprises a first material, and the second waveguide core comprises a second material different from the first material.
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公开(公告)号:US20240079405A1
公开(公告)日:2024-03-07
申请号:US17902463
申请日:2022-09-02
Applicant: GlobalFoundries U.S. Inc.
Inventor: Santosh SHARMA , Steven Bentley
IPC: H01L27/06 , H01L21/8252 , H01L29/20 , H01L29/40 , H01L29/66 , H01L29/778 , H01L29/94
CPC classification number: H01L27/0605 , H01L21/8252 , H01L29/2003 , H01L29/402 , H01L29/66181 , H01L29/66462 , H01L29/7786 , H01L29/94
Abstract: The present disclosure relates to semiconductor structures and, more particularly, to a high-electron-mobility transistor and methods of manufacture. The structure includes: at least one depletion mode gate on a conductive material over a semiconductor material; and at least one enhancement mode gate electrically connected to the at least one depletion mode gate and over the semiconductor material.
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公开(公告)号:US11923248B2
公开(公告)日:2024-03-05
申请号:US17861450
申请日:2022-07-11
Applicant: GLOBALFOUNDRIES U.S. INC.
Inventor: Hui Zang , Ruilong Xie
IPC: H01L21/8238 , H01L21/768 , H01L21/8234 , H01L27/088 , H01L29/66 , H01L29/78
CPC classification number: H01L21/823437 , H01L21/76831 , H01L21/823431 , H01L27/0886 , H01L29/66545 , H01L29/66795 , H01L29/785
Abstract: The present disclosure relates to semiconductor structures and, more particularly, to a single diffusion cut for gate structures and methods of manufacture. The structure includes: a plurality of fin structures; a plurality of gate structures extending over the plurality of fin structures; a plurality of diffusion regions adjacent to the each of the plurality of gate structures; a single diffusion break between the diffusion regions of the adjacent gate structures; and a liner separating the single diffusion break from the diffusion regions.
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公开(公告)号:US20240072180A1
公开(公告)日:2024-02-29
申请号:US17896711
申请日:2022-08-26
Applicant: GlobalFoundries U.S. Inc.
Inventor: Saloni Chaurasia , Jeffrey Johnson , Vibhor Jain , Crystal R. Kenney , Sudesh Saroop , Teng-Yin Lin , John J. Pekarik
CPC classification number: H01L29/93 , H01L29/1095 , H01L29/66174
Abstract: Structures for a varactor diode and methods of forming same. The structure comprises a first semiconductor layer including a section on a substrate, a second semiconductor layer on the section of the first semiconductor layer, a third semiconductor layer on the second semiconductor layer, and a doped region in the section of the first semiconductor layer. The section of the first semiconductor layer and the doped region have a first conductivity type, and the second semiconductor layer comprises silicon-germanium having a second conductivity type opposite to the first conductivity type, and the third semiconductor layer has the second conductivity type. The doped region contains a higher concentration of a dopant of the first conductivity type than the section of the first semiconductor layer. The second semiconductor layer abuts the first section of the first semiconductor layer along an interface, and the doped region is positioned adjacent to the interface.
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