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    Routing data communications packets in a parallel computer
    72.
    发明授权
    Routing data communications packets in a parallel computer 有权
    在并行计算机中路由数据通信数据包

    公开(公告)号：US09569399B2

    公开(公告)日：2017-02-14

    申请号：US13668503

    申请日：2012-11-05

    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

    Inventor： Charles J. Archer ,  Michael A. Blocksome ,  Todd A. Inglett ,  Joseph D. Ratterman ,  Brian E. Smith

    IPC: H04L12/781 ,  H04L29/08 ,  G06F9/455 ,  G06F15/173

    CPC classification number: G06F15/17312 ,  G06F9/45558 ,  H04L45/52 ,  H04L67/327

    Abstract: Routing data communications packets in a parallel computer that includes compute nodes organized for collective operations. Each compute node including an operating system kernel and a system-level messaging module that is a module of automated computing machinery that exposes a messaging interface to applications. Each compute node including a routing table that specifies, for each of a multiplicity of route identifiers, a data communications path through the compute node. Including to carry out the steps of: receiving in a compute node a data communications packet that includes a route identifier value; retrieving from the routing table a specification of a data communications path through the compute node; and routing, by the compute node, the data communications packet according to the data communications path identified by the compute node's routing table entry for the data communications packet's route identifier value.

    Abstract translation: 在包括为集体操作组织的计算节点的并行计算机中路由数据通信数据包。 每个计算节点包括操作系统内核和系统级消息传递模块，该模块是将应用程序的消息传递接口公开的自动化计算机的模块。 每个计算节点包括路由表，其为多个路由标识符中的每一个指定通过计算节点的数据通信路径。 包括以下步骤：在计算节点中接收包括路由标识符值的数据通信分组; 从所述路由表中检索通过所述计算节点的数据通信路径的规范; 并且由计算节点根据数据通信分组的路由标识符值的计算节点的路由表项标识的数据通信路径路由数据通信分组。

    NETWORK VIRTUALIZATION APPARATUS AND METHOD
    74.
    发明申请
    NETWORK VIRTUALIZATION APPARATUS AND METHOD 审中-公开
    网络虚拟化设备和方法

    公开(公告)号：US20160359674A1

    公开(公告)日：2016-12-08

    申请号：US15173611

    申请日：2016-06-03

    Applicant: Nicira, Inc.

    Inventor： Teemu Koponen ,  Pankaj Thakkar ,  Martin Casado ,  W. Andrew Lambeth

    IPC: H04L12/24 ,  H04L12/931

    CPC classification number: H04L41/0893 ,  G06F11/07 ,  G06F15/17312 ,  H04L12/4633 ,  H04L41/0816 ,  H04L41/0853 ,  H04L41/0896 ,  H04L45/00 ,  H04L45/586 ,  H04L47/783 ,  H04L49/00 ,  H04L49/1546 ,  H04L49/3063 ,  H04L49/70 ,  H04L61/2007 ,  H04L61/6022

    Abstract: A network control system for managing a plurality of switching elements that implement a plurality of logical datapath sets. The network control system includes first and second controllers for generating requests for modifications to first and second logical datapath sets. The first controller is further for determining whether to make modifications to the first logical datapath set. The second controller is further for determining whether to make modifications to the second logical datapath set. Each controller is further for receiving logical control plane data that specifies logical datapath sets and for converting the logical control plane data to physical control plane data for propagating to the switching elements.

    Abstract translation: 一种用于管理实现多个逻辑数据路径集合的多个交换元件的网络控制系统。 网络控制系统包括用于产生对第一和第二逻辑数据路径组的修改的请求的第一和第二控制器。 第一控制器还用于确定是否对第一逻辑数据路径集进行修改。 第二控制器还用于确定是否对第二逻辑数据路径集进行修改。 每个控制器还用于接收指定逻辑数据路径集合的逻辑控制平面数据，并用于将逻辑控制平面数据转换为物理控制平面数据以传播到开关元件。

    System and method for assigning a message
    78.
    发明授权
    System and method for assigning a message 有权
    用于分配消息的系统和方法

    公开(公告)号：US09330054B2

    公开(公告)日：2016-05-03

    申请号：US13664565

    申请日：2012-10-31

    Applicant: FREESCALE SEMICONDUCTOR, INC.

    Inventor： Tommi N. Jokinen ,  David B. Kramer ,  Kun Xu

    IPC: G06F15/16 ,  G06F15/173 ,  H04L12/863 ,  H04L12/851

    CPC classification number: G06F15/17312 ,  H04L47/2441 ,  H04L47/621

    Abstract: A processor of a plurality of processors includes a processor core and a message manager. The message manager is in communication with the processor core. The message manager to receive a message from a second processor of the plurality of processors, to identify a classification rule for the message based on bits in a header of the message, and to create a queue identifier for the message using bits of a payload of the message, wherein the queue identifier is associated with a queue of the processor core.

    Abstract translation: 多个处理器的处理器包括处理器核心和消息管理器。 消息管理器与处理器核心通信。 所述消息管理器从所述多个处理器的第二处理器接收消息，以基于所述消息的报头中的位来识别所述消息的分类规则，以及使用所述消息的有效载荷的位来创建所述消息的队列标识符 消息，其中队列标识符与处理器核心的队列相关联。

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