Line set-up system
    73.
    发明授权
    Line set-up system 失效
    线路设置系统

    公开(公告)号:US5619490A

    公开(公告)日:1997-04-08

    申请号:US520646

    申请日:1995-08-29

    申请人: Hitoshi Nagafuchi

    发明人: Hitoshi Nagafuchi

    IPC分类号: H04L29/08 H04Q11/04 H04L1/16

    摘要: Line set-up detection circuit 22-1 detects N successive conformities in line information Sa from a network side line terminating set 1 and a signal Sb representing the result of detecting N successive conformities with an error correction code added thereto to the network side line terminating set 1. Network side line set-up control circuit 12 generates a line set-up permission signal Sc or a line set-up inhibition signal Sd on the basis of the signals Sb representing the result of detecting N successive conformities from all user's side line terminating sets 2-1 through 2-3 and transmits it to each of the user's side line terminating sets 2-1 through 2-3. User's side line set-up control circuits 24-1 writes the contents of line set-up primary memory 23-1 into line set-up main memory 25-1 when it receives a line set-up permission signal Sc and inhibits the contents of the line set-up primary memory 23-1 from being written into the line set-up main memory 25-1 when it receives a line set-up inhibition signal Sd.

    摘要翻译: 线路建立检测电路22-1从网络侧线路终端设备1检测线路信息Sa中的N个连续一致性,以及表示检测N个连续一致性的结果的信号Sb,其中添加有纠错码到网络侧线路终端 网络侧线路建立控制电路12基于表示从所有用户侧线检测N个连续一致性的结果的信号Sb生成线路建立许可信号Sc或线路建立禁止信号Sd 终端设备2-1至2-3,并将其发送到用户的侧线终端设备2-1至2-3中的每一个。 用户侧线路建立控制电路24-1在线路建立主存储器25-1接收到线路建立许可信号Sc时将线路建立主存储器23-1的内容写入到线路建立主存储器25-1中, 线路建立主存储器23-1在接收到线路建立禁止信号Sd时被写入线路建立主存储器25-1。

    APPARATUS AND METHOD FOR SCALABLE AND FLEXIBLE ACCESS CONTROL LIST LOOKUP IN A NETWORK SWITCH

    公开(公告)号:US20180219800A1

    公开(公告)日:2018-08-02

    申请号:US15419942

    申请日:2017-01-30

    申请人: CAVIUM, INC.

    IPC分类号: H04L12/935 H04L29/06

    摘要: A network switch to support scalable and flexible access control list (ACL) lookup comprises a packet processing pipeline including a plurality of packet processing units each configured to generate a master key for an ACL lookup request to a memory pool and process a received packet based on ACL search results. The network switch further includes said memory pool including a plurality of memory groups each configured to maintain a plurality of ACL tables to be searched in one or more SRAM memory tiles of the memory group, accept and format the master key generated by the packet processing unit into a compact key based on a bitmap per user configuration, hash the formatted compact key and search the ACL tables stored in the one or more SRAM memory tiles using the formatted compact key, process and provide the ACL search results to the requesting packet processing unit.

    Reliable transport of ethernet packet data with wire-speed and packet data rate match

    公开(公告)号:US09628382B2

    公开(公告)日:2017-04-18

    申请号:US14173782

    申请日:2014-02-05

    申请人: INTEL CORPORATION

    摘要: Method, apparatus, and systems for reliably transferring Ethernet packet data over a link layer and facilitating fabric-to-Ethernet and Ethernet-to-fabric gateway operations at matching wire speed and packet data rate. Ethernet header and payload data is extracted from Ethernet frames received at the gateway and encapsulated in fabric packets to be forwarded to a fabric endpoint hosting an entity to which the Ethernet packet is addressed. The fabric packets are divided into flits, which are bundled in groups to form link packets that are transferred over the fabric at the Link layer using a reliable transmission scheme employing implicit ACKnowledgements. At the endpoint, the fabric packet is regenerated, and the Ethernet packet data is de-encapsulated. The Ethernet frames received from and transmitted to an Ethernet network are encoded using 64b/66b encoding, having an overhead-to-data bit ratio of 1:32. Meanwhile, the link packets have the same ratio, including one overhead bit per flit and a 14-bit CRC plus a 2-bit credit return field or sideband used for credit-based flow control.

    Circuit-switched switching system
    79.
    发明授权
    Circuit-switched switching system 有权
    电路交换切换系统

    公开(公告)号:US07920571B1

    公开(公告)日:2011-04-05

    申请号:US10745857

    申请日:2003-12-26

    IPC分类号: H04L12/28

    摘要: A circuit switched switching system and method includes a plurality of matrix transposition memories. The memories permute the order of incoming and outgoing data, and thereby increase the efficiency of the switch. The switch and matrix transposition memories may be disposed in a satellite. The switch may further include batching circuits for grouping together data from a single terminal device for more efficient transmission through the switch and for more efficient error correction.

    摘要翻译: 电路交换切换系统和方法包括多个矩阵转置存储器。 存储器使输入和输出数据的顺序排列,从而提高开关的效率。 开关和矩阵转置存储器可以设置在卫星中。 开关还可以包括用于将来自单个终端设备的数据分组在一起的用于通过开关的更有效的传输并用于更有效的纠错的批量电路。

    Multiplexing method and apparatus, demultiplexing method and apparatus, and access network system
    80.
    发明授权
    Multiplexing method and apparatus, demultiplexing method and apparatus, and access network system 有权
    多路复用方法和装置,解复用方法和装置,以及接入网系统

    公开(公告)号:US07899041B2

    公开(公告)日:2011-03-01

    申请号:US10050600

    申请日:2002-01-18

    申请人: Yoshitaka Fujita

    发明人: Yoshitaka Fujita

    IPC分类号: H04L12/28 H04J3/16

    摘要: In a multiplexing method of multiplexing communication signals from communication signal transmitting sections and transmitting a multiplexed signal to a multiplexed signal receiving section, each of the communication signals, an identification address preassigned to a predetermined signal identifying section through which a communication signal passes in a multiplexing system including the communication signal transmitting section and the multiplexed signal receiving section is added to each communication signal. The resultant signal is output. The identification address is extracted from each output signal. The respective communication signals are multiplexed on the basis of the extracted identification addresses. A multiplex apparatus, access network system, protocol termination apparatus, and multiplexing/demultiplexing apparatus are also disclosed.

    摘要翻译: 在从通信信号发送部分复用通信信号并将多路复用信号发送到多路复用信号接收部分的复用方法中,每个通信信号,预先分配给通信信号通过多路复用的预定信号识别部分的识别地址 包括通信信号发送部分和复用信号接收部分的系统被添加到每个通信信号。 输出结果信号。 从每个输出信号提取识别地址。 基于所提取的识别地址对相应的通信信号进行多路复用。 还公开了多路复用装置,接入网络系统,协议终端装置和复用/解复用装置。