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公开(公告)号：US20220130733A1
公开(公告)日：2022-04-28
申请号：US17208903
申请日：2021-03-22
申请人： SK hynix Inc.
发明人： Jae Taek KIM , Hye Yeong JUNG
IPC分类号： H01L21/66 , G01R31/26 , G01N23/2251
摘要： In a method of inspecting an error, a lower wiring structure may be formed. A main dummy pattern and a test dummy pattern may be formed on the lower wiring structure, The main dummy pattern may include a via pattern and a wiring pattern having a width greater than a width of the via pattern. The test dummy pattern may be spaced apart from the main dummy pattern by no less than a critical distance. The test dummy pattern may have a width substantially the same as that of the via pattern. The test dummy pattern may have a height substantially the same as that of the main dummy pattern. The test dummy pattern may then be tested to predict an error of the main dummy pattern based on an error of the test dummy pattern.
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公开(公告)号：US20220113346A1
公开(公告)日：2022-04-14
申请号：US16949069
申请日：2020-10-13
申请人： SEMTECH CORPORATION
摘要： Circuitry for testing an integrated capacitor that includes a first capacitor, a supply node for connecting to a voltage supply, a test node for connecting to the integrated capacitor, and a charge monitoring circuit. The circuitry is operable in a sequence of states including a first state in which the first capacitor is connected to the supply node and is disconnected from the test node so as to charge the first capacitor to a test voltage and a second state in which the first capacitor is disconnected from the supply node and is connected to the test node to apply the test voltage to the integrated capacitor. The charge monitoring circuit is configured to monitor a charge transfer from the first capacitor to the integrated capacitor in said second state and to generate a measurement value based on an amount of the charge transfer.
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公开(公告)号：US11295993B2
公开(公告)日：2022-04-05
申请号：US17002250
申请日：2020-08-25
申请人： PDF Solutions, Inc.
摘要： A maintenance tool for semiconductor process equipment and components. Sensor data is evaluated by machine learning tools to determine when to schedule maintenance action.
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公开(公告)号：US20220082608A1
公开(公告)日：2022-03-17
申请号：US17537007
申请日：2021-11-29
IPC分类号： G01R31/26
摘要： A system comprises a noise generator circuit and a noise envelope detector circuit. The noise generator circuit comprises a first amplifier including a single transistor pair that is operable to generate 1/f noise, an output amplifier coupled to the first amplifier and configured to generate a 1/f noise signal as a function of the 1/f noise. The noise envelope detector circuit comprises a low pass filter operable to pass low frequency signals of the 1/f noise signal as a filtered 1/f noise signal, and a second amplifier or a comparator coupled to the low pass filter and operable to output a direct current (DC) voltage signal according to an envelope of the filtered 1/f noise signal, where the DC voltage signal is a function of an envelope of the filtered 1/f noise signal.
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公开(公告)号：US11276614B2
公开(公告)日：2022-03-15
申请号：US16944206
申请日：2020-07-31
发明人： Shun Yan Lee , Sai Kit Wong , Chi Wah Yuen , Ka Yee Mak , Gary Peter Widdowson
摘要： A pick and place LED testing apparatus, comprising: a test station operative in use to power a group of LEDs; a bondhead operative in use to pick said group of LEDs from a source wafer and place said group of LEDs on said test station for testing; and an optical sensor operative in use to measure an optical characteristic of said group of LEDs when tested, wherein at least a portion of said bondhead is translucent to provide an optical path from said group of LEDs to said optical sensor.
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公开(公告)号：US20220065972A1
公开(公告)日：2022-03-03
申请号：US17524850
申请日：2021-11-12
发明人： Sartaj Chaudhary
摘要： Techniques are disclosed related to determining a modulation quality measurement of a device-under-test (DUT). A modulated signal is received from a source a plurality of times, and each received modulated signal is transmitted to each of a first vector signal analyzer (VSA) and a second VSA. The first VSA and the second VSA demodulate the received modulated signals to produce first error vectors and second error vectors, respectively. A cross-correlation calculation is performed on the first error vectors and second error vectors of respective received modulated signals to produce a complex-valued cross-correlation measurement, and a real component of the cross-correlation measurement is averaged over the plurality of received modulated signals. A modulation quality measurement is determined based on the averaged cross-correlation measurement.
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公开(公告)号：US20220065917A1
公开(公告)日：2022-03-03
申请号：US17356574
申请日：2021-06-24
发明人： Tetsutaro IMAGAWA
IPC分类号： G01R31/26
摘要： Provided is a testing apparatus for testing a semiconductor device including a first main terminal to which a first power source voltage is applied and a second main terminal to which a second power source voltage is applied, comprising: a condition setting unit for setting a changing speed of a terminal voltage of the first main terminal at turn-off of the device; an operation controlling unit for turning off the device under a condition set by the condition setting unit; and a determining unit for screening the device based on an operation result of the device, wherein: a time waveform of the terminal voltage at turn-off of the device includes a maximum changing point where a changing speed becomes maximum; and the condition setting unit sets the changing speed at a first set voltage higher than a voltage at the maximum changing point, to a predetermined value.
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公开(公告)号：US11264263B2
公开(公告)日：2022-03-01
申请号：US16712970
申请日：2019-12-12
IPC分类号： G01R31/28 , H01L21/687 , H01L21/67 , H01L21/66 , H01L21/677 , G01R31/26
摘要： A substrate rotator configured to rotate one or more substrates includes a body, a body actuator coupled to the body and configured to rotate the body, and a first and second gripper coupled to the body. A substrate edge metrology system that measures side chips or other defects on all sides of the substrate is also described. The metrology system includes two metrology stations and the substrate rotator. Methods for measuring side chips or other defects on a substrate are also provided. The method includes performing metrology on a first set of sides of the first substrate, rotating the first substrate by a first angle, and performing metrology on the second set of sides of the first substrate.
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公开(公告)号：US11262388B2
公开(公告)日：2022-03-01
申请号：US16267169
申请日：2019-02-04
发明人： Terumitsu Komatsu
摘要： According to an embodiment(s), a current detection circuit has first and second main electrodes, a vertical structure output transistor that includes a first control electrode where a control signal is supplied thereto, a third main electrode that is connected to the first main electrode, a second control electrode that is connected to the first control electrode, and a vertical structure detection transistor that has a fourth main electrode. The current detection circuit has a voltage supply circuit that supplies a divided voltage of a voltage between the first and second main electrodes to the fourth main electrode.
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公开(公告)号：US11262248B2
公开(公告)日：2022-03-01
申请号：US17276896
申请日：2019-09-19
发明人： Angus Bryant
摘要： A method analyzes an operation of a power semiconductor device. The method includes: providing a set of reference voltages of the power semiconductor device and a set of corresponding reference currents; measuring an on-state voltage and a corresponding on-state current of the power semiconductor device to obtain a measurement point; adapting the set of reference voltages by adapting two of the set of reference voltages lying closest to the measurement point by extrapolating the measurement point; and using the adapted set of reference voltages to analyze the operation of the power semiconductor device. The extrapolation is based on a predefined reference increment current and a predefined reference increment voltage.
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